1//===-- RISCVFrameLowering.cpp - RISCV Frame Information ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the RISCV implementation of TargetFrameLowering class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "RISCVFrameLowering.h"
14#include "RISCVMachineFunctionInfo.h"
15#include "RISCVSubtarget.h"
16#include "llvm/CodeGen/MachineFrameInfo.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/MachineInstrBuilder.h"
19#include "llvm/CodeGen/MachineRegisterInfo.h"
20#include "llvm/CodeGen/RegisterScavenging.h"
21#include "llvm/IR/DiagnosticInfo.h"
22#include "llvm/MC/MCDwarf.h"
23
24using namespace llvm;
25
26// Get the ID of the libcall used for spilling and restoring callee saved
27// registers. The ID is representative of the number of registers saved or
28// restored by the libcall, except it is zero-indexed - ID 0 corresponds to a
29// single register.
30static int getLibCallID(const MachineFunction &MF,
31                        const std::vector<CalleeSavedInfo> &CSI) {
32  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
33
34  if (CSI.empty() || !RVFI->useSaveRestoreLibCalls(MF))
35    return -1;
36
37  Register MaxReg = RISCV::NoRegister;
38  for (auto &CS : CSI)
39    // RISCVRegisterInfo::hasReservedSpillSlot assigns negative frame indexes to
40    // registers which can be saved by libcall.
41    if (CS.getFrameIdx() < 0)
42      MaxReg = std::max(MaxReg.id(), CS.getReg());
43
44  if (MaxReg == RISCV::NoRegister)
45    return -1;
46
47  switch (MaxReg) {
48  default:
49    llvm_unreachable("Something has gone wrong!");
50  case /*s11*/ RISCV::X27: return 12;
51  case /*s10*/ RISCV::X26: return 11;
52  case /*s9*/  RISCV::X25: return 10;
53  case /*s8*/  RISCV::X24: return 9;
54  case /*s7*/  RISCV::X23: return 8;
55  case /*s6*/  RISCV::X22: return 7;
56  case /*s5*/  RISCV::X21: return 6;
57  case /*s4*/  RISCV::X20: return 5;
58  case /*s3*/  RISCV::X19: return 4;
59  case /*s2*/  RISCV::X18: return 3;
60  case /*s1*/  RISCV::X9:  return 2;
61  case /*s0*/  RISCV::X8:  return 1;
62  case /*ra*/  RISCV::X1:  return 0;
63  }
64}
65
66// Get the name of the libcall used for spilling callee saved registers.
67// If this function will not use save/restore libcalls, then return a nullptr.
68static const char *
69getSpillLibCallName(const MachineFunction &MF,
70                    const std::vector<CalleeSavedInfo> &CSI) {
71  static const char *const SpillLibCalls[] = {
72    "__riscv_save_0",
73    "__riscv_save_1",
74    "__riscv_save_2",
75    "__riscv_save_3",
76    "__riscv_save_4",
77    "__riscv_save_5",
78    "__riscv_save_6",
79    "__riscv_save_7",
80    "__riscv_save_8",
81    "__riscv_save_9",
82    "__riscv_save_10",
83    "__riscv_save_11",
84    "__riscv_save_12"
85  };
86
87  int LibCallID = getLibCallID(MF, CSI);
88  if (LibCallID == -1)
89    return nullptr;
90  return SpillLibCalls[LibCallID];
91}
92
93// Get the name of the libcall used for restoring callee saved registers.
94// If this function will not use save/restore libcalls, then return a nullptr.
95static const char *
96getRestoreLibCallName(const MachineFunction &MF,
97                      const std::vector<CalleeSavedInfo> &CSI) {
98  static const char *const RestoreLibCalls[] = {
99    "__riscv_restore_0",
100    "__riscv_restore_1",
101    "__riscv_restore_2",
102    "__riscv_restore_3",
103    "__riscv_restore_4",
104    "__riscv_restore_5",
105    "__riscv_restore_6",
106    "__riscv_restore_7",
107    "__riscv_restore_8",
108    "__riscv_restore_9",
109    "__riscv_restore_10",
110    "__riscv_restore_11",
111    "__riscv_restore_12"
112  };
113
114  int LibCallID = getLibCallID(MF, CSI);
115  if (LibCallID == -1)
116    return nullptr;
117  return RestoreLibCalls[LibCallID];
118}
119
120bool RISCVFrameLowering::hasFP(const MachineFunction &MF) const {
121  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
122
123  const MachineFrameInfo &MFI = MF.getFrameInfo();
124  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
125         RegInfo->needsStackRealignment(MF) || MFI.hasVarSizedObjects() ||
126         MFI.isFrameAddressTaken();
127}
128
129bool RISCVFrameLowering::hasBP(const MachineFunction &MF) const {
130  const MachineFrameInfo &MFI = MF.getFrameInfo();
131  const TargetRegisterInfo *TRI = STI.getRegisterInfo();
132
133  return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
134}
135
136// Determines the size of the frame and maximum call frame size.
137void RISCVFrameLowering::determineFrameLayout(MachineFunction &MF) const {
138  MachineFrameInfo &MFI = MF.getFrameInfo();
139  const RISCVRegisterInfo *RI = STI.getRegisterInfo();
140
141  // Get the number of bytes to allocate from the FrameInfo.
142  uint64_t FrameSize = MFI.getStackSize();
143
144  // Get the alignment.
145  Align StackAlign = getStackAlign();
146  if (RI->needsStackRealignment(MF)) {
147    Align MaxStackAlign = std::max(StackAlign, MFI.getMaxAlign());
148    FrameSize += (MaxStackAlign.value() - StackAlign.value());
149    StackAlign = MaxStackAlign;
150  }
151
152  // Set Max Call Frame Size
153  uint64_t MaxCallSize = alignTo(MFI.getMaxCallFrameSize(), StackAlign);
154  MFI.setMaxCallFrameSize(MaxCallSize);
155
156  // Make sure the frame is aligned.
157  FrameSize = alignTo(FrameSize, StackAlign);
158
159  // Update frame info.
160  MFI.setStackSize(FrameSize);
161}
162
163void RISCVFrameLowering::adjustReg(MachineBasicBlock &MBB,
164                                   MachineBasicBlock::iterator MBBI,
165                                   const DebugLoc &DL, Register DestReg,
166                                   Register SrcReg, int64_t Val,
167                                   MachineInstr::MIFlag Flag) const {
168  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
169  const RISCVInstrInfo *TII = STI.getInstrInfo();
170
171  if (DestReg == SrcReg && Val == 0)
172    return;
173
174  if (isInt<12>(Val)) {
175    BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg)
176        .addReg(SrcReg)
177        .addImm(Val)
178        .setMIFlag(Flag);
179  } else {
180    unsigned Opc = RISCV::ADD;
181    bool isSub = Val < 0;
182    if (isSub) {
183      Val = -Val;
184      Opc = RISCV::SUB;
185    }
186
187    Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
188    TII->movImm(MBB, MBBI, DL, ScratchReg, Val, Flag);
189    BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg)
190        .addReg(SrcReg)
191        .addReg(ScratchReg, RegState::Kill)
192        .setMIFlag(Flag);
193  }
194}
195
196// Returns the register used to hold the frame pointer.
197static Register getFPReg(const RISCVSubtarget &STI) { return RISCV::X8; }
198
199// Returns the register used to hold the stack pointer.
200static Register getSPReg(const RISCVSubtarget &STI) { return RISCV::X2; }
201
202static SmallVector<CalleeSavedInfo, 8>
203getNonLibcallCSI(const std::vector<CalleeSavedInfo> &CSI) {
204  SmallVector<CalleeSavedInfo, 8> NonLibcallCSI;
205
206  for (auto &CS : CSI)
207    if (CS.getFrameIdx() >= 0)
208      NonLibcallCSI.push_back(CS);
209
210  return NonLibcallCSI;
211}
212
213void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
214                                      MachineBasicBlock &MBB) const {
215  MachineFrameInfo &MFI = MF.getFrameInfo();
216  auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
217  const RISCVRegisterInfo *RI = STI.getRegisterInfo();
218  const RISCVInstrInfo *TII = STI.getInstrInfo();
219  MachineBasicBlock::iterator MBBI = MBB.begin();
220
221  Register FPReg = getFPReg(STI);
222  Register SPReg = getSPReg(STI);
223  Register BPReg = RISCVABI::getBPReg();
224
225  // Since spillCalleeSavedRegisters may have inserted a libcall, skip past
226  // any instructions marked as FrameSetup
227  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
228    ++MBBI;
229
230  // Debug location must be unknown since the first debug location is used
231  // to determine the end of the prologue.
232  DebugLoc DL;
233
234  // Determine the correct frame layout
235  determineFrameLayout(MF);
236
237  // If libcalls are used to spill and restore callee-saved registers, the frame
238  // has two sections; the opaque section managed by the libcalls, and the
239  // section managed by MachineFrameInfo which can also hold callee saved
240  // registers in fixed stack slots, both of which have negative frame indices.
241  // This gets even more complicated when incoming arguments are passed via the
242  // stack, as these too have negative frame indices. An example is detailed
243  // below:
244  //
245  //  | incoming arg | <- FI[-3]
246  //  | libcallspill |
247  //  | calleespill  | <- FI[-2]
248  //  | calleespill  | <- FI[-1]
249  //  | this_frame   | <- FI[0]
250  //
251  // For negative frame indices, the offset from the frame pointer will differ
252  // depending on which of these groups the frame index applies to.
253  // The following calculates the correct offset knowing the number of callee
254  // saved registers spilt by the two methods.
255  if (int LibCallRegs = getLibCallID(MF, MFI.getCalleeSavedInfo()) + 1) {
256    // Calculate the size of the frame managed by the libcall. The libcalls are
257    // implemented such that the stack will always be 16 byte aligned.
258    unsigned LibCallFrameSize = alignTo((STI.getXLen() / 8) * LibCallRegs, 16);
259    RVFI->setLibCallStackSize(LibCallFrameSize);
260  }
261
262  // FIXME (note copied from Lanai): This appears to be overallocating.  Needs
263  // investigation. Get the number of bytes to allocate from the FrameInfo.
264  uint64_t StackSize = MFI.getStackSize();
265  uint64_t RealStackSize = StackSize + RVFI->getLibCallStackSize();
266
267  // Early exit if there is no need to allocate on the stack
268  if (RealStackSize == 0 && !MFI.adjustsStack())
269    return;
270
271  // If the stack pointer has been marked as reserved, then produce an error if
272  // the frame requires stack allocation
273  if (STI.isRegisterReservedByUser(SPReg))
274    MF.getFunction().getContext().diagnose(DiagnosticInfoUnsupported{
275        MF.getFunction(), "Stack pointer required, but has been reserved."});
276
277  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
278  // Split the SP adjustment to reduce the offsets of callee saved spill.
279  if (FirstSPAdjustAmount) {
280    StackSize = FirstSPAdjustAmount;
281    RealStackSize = FirstSPAdjustAmount;
282  }
283
284  // Allocate space on the stack if necessary.
285  adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup);
286
287  // Emit ".cfi_def_cfa_offset RealStackSize"
288  unsigned CFIIndex = MF.addFrameInst(
289      MCCFIInstruction::cfiDefCfaOffset(nullptr, RealStackSize));
290  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
291      .addCFIIndex(CFIIndex);
292
293  const auto &CSI = MFI.getCalleeSavedInfo();
294
295  // The frame pointer is callee-saved, and code has been generated for us to
296  // save it to the stack. We need to skip over the storing of callee-saved
297  // registers as the frame pointer must be modified after it has been saved
298  // to the stack, not before.
299  // FIXME: assumes exactly one instruction is used to save each callee-saved
300  // register.
301  std::advance(MBBI, getNonLibcallCSI(CSI).size());
302
303  // Iterate over list of callee-saved registers and emit .cfi_offset
304  // directives.
305  for (const auto &Entry : CSI) {
306    int FrameIdx = Entry.getFrameIdx();
307    int64_t Offset;
308    // Offsets for objects with fixed locations (IE: those saved by libcall) are
309    // simply calculated from the frame index.
310    if (FrameIdx < 0)
311      Offset = FrameIdx * (int64_t) STI.getXLen() / 8;
312    else
313      Offset = MFI.getObjectOffset(Entry.getFrameIdx()) -
314               RVFI->getLibCallStackSize();
315    Register Reg = Entry.getReg();
316    unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
317        nullptr, RI->getDwarfRegNum(Reg, true), Offset));
318    BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
319        .addCFIIndex(CFIIndex);
320  }
321
322  // Generate new FP.
323  if (hasFP(MF)) {
324    if (STI.isRegisterReservedByUser(FPReg))
325      MF.getFunction().getContext().diagnose(DiagnosticInfoUnsupported{
326          MF.getFunction(), "Frame pointer required, but has been reserved."});
327
328    adjustReg(MBB, MBBI, DL, FPReg, SPReg,
329              RealStackSize - RVFI->getVarArgsSaveSize(),
330              MachineInstr::FrameSetup);
331
332    // Emit ".cfi_def_cfa $fp, RVFI->getVarArgsSaveSize()"
333    unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
334        nullptr, RI->getDwarfRegNum(FPReg, true), RVFI->getVarArgsSaveSize()));
335    BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
336        .addCFIIndex(CFIIndex);
337  }
338
339  // Emit the second SP adjustment after saving callee saved registers.
340  if (FirstSPAdjustAmount) {
341    uint64_t SecondSPAdjustAmount = MFI.getStackSize() - FirstSPAdjustAmount;
342    assert(SecondSPAdjustAmount > 0 &&
343           "SecondSPAdjustAmount should be greater than zero");
344    adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount,
345              MachineInstr::FrameSetup);
346
347    // If we are using a frame-pointer, and thus emitted ".cfi_def_cfa fp, 0",
348    // don't emit an sp-based .cfi_def_cfa_offset
349    if (!hasFP(MF)) {
350      // Emit ".cfi_def_cfa_offset StackSize"
351      unsigned CFIIndex = MF.addFrameInst(
352          MCCFIInstruction::cfiDefCfaOffset(nullptr, MFI.getStackSize()));
353      BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
354          .addCFIIndex(CFIIndex);
355    }
356  }
357
358  if (hasFP(MF)) {
359    // Realign Stack
360    const RISCVRegisterInfo *RI = STI.getRegisterInfo();
361    if (RI->needsStackRealignment(MF)) {
362      Align MaxAlignment = MFI.getMaxAlign();
363
364      const RISCVInstrInfo *TII = STI.getInstrInfo();
365      if (isInt<12>(-(int)MaxAlignment.value())) {
366        BuildMI(MBB, MBBI, DL, TII->get(RISCV::ANDI), SPReg)
367            .addReg(SPReg)
368            .addImm(-(int)MaxAlignment.value());
369      } else {
370        unsigned ShiftAmount = Log2(MaxAlignment);
371        Register VR =
372            MF.getRegInfo().createVirtualRegister(&RISCV::GPRRegClass);
373        BuildMI(MBB, MBBI, DL, TII->get(RISCV::SRLI), VR)
374            .addReg(SPReg)
375            .addImm(ShiftAmount);
376        BuildMI(MBB, MBBI, DL, TII->get(RISCV::SLLI), SPReg)
377            .addReg(VR)
378            .addImm(ShiftAmount);
379      }
380      // FP will be used to restore the frame in the epilogue, so we need
381      // another base register BP to record SP after re-alignment. SP will
382      // track the current stack after allocating variable sized objects.
383      if (hasBP(MF)) {
384        // move BP, SP
385        BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), BPReg)
386            .addReg(SPReg)
387            .addImm(0);
388      }
389    }
390  }
391}
392
393void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
394                                      MachineBasicBlock &MBB) const {
395  const RISCVRegisterInfo *RI = STI.getRegisterInfo();
396  MachineFrameInfo &MFI = MF.getFrameInfo();
397  auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
398  Register FPReg = getFPReg(STI);
399  Register SPReg = getSPReg(STI);
400
401  // Get the insert location for the epilogue. If there were no terminators in
402  // the block, get the last instruction.
403  MachineBasicBlock::iterator MBBI = MBB.end();
404  DebugLoc DL;
405  if (!MBB.empty()) {
406    MBBI = MBB.getFirstTerminator();
407    if (MBBI == MBB.end())
408      MBBI = MBB.getLastNonDebugInstr();
409    DL = MBBI->getDebugLoc();
410
411    // If this is not a terminator, the actual insert location should be after the
412    // last instruction.
413    if (!MBBI->isTerminator())
414      MBBI = std::next(MBBI);
415
416    // If callee-saved registers are saved via libcall, place stack adjustment
417    // before this call.
418    while (MBBI != MBB.begin() &&
419           std::prev(MBBI)->getFlag(MachineInstr::FrameDestroy))
420      --MBBI;
421  }
422
423  const auto &CSI = getNonLibcallCSI(MFI.getCalleeSavedInfo());
424
425  // Skip to before the restores of callee-saved registers
426  // FIXME: assumes exactly one instruction is used to restore each
427  // callee-saved register.
428  auto LastFrameDestroy = MBBI;
429  if (!CSI.empty())
430    LastFrameDestroy = std::prev(MBBI, CSI.size());
431
432  uint64_t StackSize = MFI.getStackSize();
433  uint64_t RealStackSize = StackSize + RVFI->getLibCallStackSize();
434  uint64_t FPOffset = RealStackSize - RVFI->getVarArgsSaveSize();
435
436  // Restore the stack pointer using the value of the frame pointer. Only
437  // necessary if the stack pointer was modified, meaning the stack size is
438  // unknown.
439  if (RI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) {
440    assert(hasFP(MF) && "frame pointer should not have been eliminated");
441    adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset,
442              MachineInstr::FrameDestroy);
443  }
444
445  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
446  if (FirstSPAdjustAmount) {
447    uint64_t SecondSPAdjustAmount = MFI.getStackSize() - FirstSPAdjustAmount;
448    assert(SecondSPAdjustAmount > 0 &&
449           "SecondSPAdjustAmount should be greater than zero");
450
451    adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount,
452              MachineInstr::FrameDestroy);
453  }
454
455  if (FirstSPAdjustAmount)
456    StackSize = FirstSPAdjustAmount;
457
458  // Deallocate stack
459  adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy);
460}
461
462int RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF,
463                                               int FI,
464                                               Register &FrameReg) const {
465  const MachineFrameInfo &MFI = MF.getFrameInfo();
466  const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
467  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
468
469  // Callee-saved registers should be referenced relative to the stack
470  // pointer (positive offset), otherwise use the frame pointer (negative
471  // offset).
472  const auto &CSI = getNonLibcallCSI(MFI.getCalleeSavedInfo());
473  int MinCSFI = 0;
474  int MaxCSFI = -1;
475
476  int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea() +
477               MFI.getOffsetAdjustment();
478
479  uint64_t FirstSPAdjustAmount = getFirstSPAdjustAmount(MF);
480
481  if (CSI.size()) {
482    MinCSFI = CSI[0].getFrameIdx();
483    MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
484  }
485
486  if (FI >= MinCSFI && FI <= MaxCSFI) {
487    FrameReg = RISCV::X2;
488
489    if (FirstSPAdjustAmount)
490      Offset += FirstSPAdjustAmount;
491    else
492      Offset += MFI.getStackSize();
493  } else if (RI->needsStackRealignment(MF) && !MFI.isFixedObjectIndex(FI)) {
494    // If the stack was realigned, the frame pointer is set in order to allow
495    // SP to be restored, so we need another base register to record the stack
496    // after realignment.
497    if (hasBP(MF))
498      FrameReg = RISCVABI::getBPReg();
499    else
500      FrameReg = RISCV::X2;
501    Offset += MFI.getStackSize();
502    if (FI < 0)
503      Offset += RVFI->getLibCallStackSize();
504  } else {
505    FrameReg = RI->getFrameRegister(MF);
506    if (hasFP(MF)) {
507      Offset += RVFI->getVarArgsSaveSize();
508      if (FI >= 0)
509        Offset -= RVFI->getLibCallStackSize();
510    } else {
511      Offset += MFI.getStackSize();
512      if (FI < 0)
513        Offset += RVFI->getLibCallStackSize();
514    }
515  }
516  return Offset;
517}
518
519void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,
520                                              BitVector &SavedRegs,
521                                              RegScavenger *RS) const {
522  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
523  // Unconditionally spill RA and FP only if the function uses a frame
524  // pointer.
525  if (hasFP(MF)) {
526    SavedRegs.set(RISCV::X1);
527    SavedRegs.set(RISCV::X8);
528  }
529  // Mark BP as used if function has dedicated base pointer.
530  if (hasBP(MF))
531    SavedRegs.set(RISCVABI::getBPReg());
532
533  // If interrupt is enabled and there are calls in the handler,
534  // unconditionally save all Caller-saved registers and
535  // all FP registers, regardless whether they are used.
536  MachineFrameInfo &MFI = MF.getFrameInfo();
537
538  if (MF.getFunction().hasFnAttribute("interrupt") && MFI.hasCalls()) {
539
540    static const MCPhysReg CSRegs[] = { RISCV::X1,      /* ra */
541      RISCV::X5, RISCV::X6, RISCV::X7,                  /* t0-t2 */
542      RISCV::X10, RISCV::X11,                           /* a0-a1, a2-a7 */
543      RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17,
544      RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, 0 /* t3-t6 */
545    };
546
547    for (unsigned i = 0; CSRegs[i]; ++i)
548      SavedRegs.set(CSRegs[i]);
549
550    if (MF.getSubtarget<RISCVSubtarget>().hasStdExtD() ||
551        MF.getSubtarget<RISCVSubtarget>().hasStdExtF()) {
552
553      // If interrupt is enabled, this list contains all FP registers.
554      const MCPhysReg * Regs = MF.getRegInfo().getCalleeSavedRegs();
555
556      for (unsigned i = 0; Regs[i]; ++i)
557        if (RISCV::FPR32RegClass.contains(Regs[i]) ||
558            RISCV::FPR64RegClass.contains(Regs[i]))
559          SavedRegs.set(Regs[i]);
560    }
561  }
562}
563
564void RISCVFrameLowering::processFunctionBeforeFrameFinalized(
565    MachineFunction &MF, RegScavenger *RS) const {
566  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
567  MachineFrameInfo &MFI = MF.getFrameInfo();
568  const TargetRegisterClass *RC = &RISCV::GPRRegClass;
569  // estimateStackSize has been observed to under-estimate the final stack
570  // size, so give ourselves wiggle-room by checking for stack size
571  // representable an 11-bit signed field rather than 12-bits.
572  // FIXME: It may be possible to craft a function with a small stack that
573  // still needs an emergency spill slot for branch relaxation. This case
574  // would currently be missed.
575  if (!isInt<11>(MFI.estimateStackSize(MF))) {
576    int RegScavFI = MFI.CreateStackObject(RegInfo->getSpillSize(*RC),
577                                          RegInfo->getSpillAlign(*RC), false);
578    RS->addScavengingFrameIndex(RegScavFI);
579  }
580}
581
582// Not preserve stack space within prologue for outgoing variables when the
583// function contains variable size objects and let eliminateCallFramePseudoInstr
584// preserve stack space for it.
585bool RISCVFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
586  return !MF.getFrameInfo().hasVarSizedObjects();
587}
588
589// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions.
590MachineBasicBlock::iterator RISCVFrameLowering::eliminateCallFramePseudoInstr(
591    MachineFunction &MF, MachineBasicBlock &MBB,
592    MachineBasicBlock::iterator MI) const {
593  Register SPReg = RISCV::X2;
594  DebugLoc DL = MI->getDebugLoc();
595
596  if (!hasReservedCallFrame(MF)) {
597    // If space has not been reserved for a call frame, ADJCALLSTACKDOWN and
598    // ADJCALLSTACKUP must be converted to instructions manipulating the stack
599    // pointer. This is necessary when there is a variable length stack
600    // allocation (e.g. alloca), which means it's not possible to allocate
601    // space for outgoing arguments from within the function prologue.
602    int64_t Amount = MI->getOperand(0).getImm();
603
604    if (Amount != 0) {
605      // Ensure the stack remains aligned after adjustment.
606      Amount = alignSPAdjust(Amount);
607
608      if (MI->getOpcode() == RISCV::ADJCALLSTACKDOWN)
609        Amount = -Amount;
610
611      adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags);
612    }
613  }
614
615  return MBB.erase(MI);
616}
617
618// We would like to split the SP adjustment to reduce prologue/epilogue
619// as following instructions. In this way, the offset of the callee saved
620// register could fit in a single store.
621//   add     sp,sp,-2032
622//   sw      ra,2028(sp)
623//   sw      s0,2024(sp)
624//   sw      s1,2020(sp)
625//   sw      s3,2012(sp)
626//   sw      s4,2008(sp)
627//   add     sp,sp,-64
628uint64_t
629RISCVFrameLowering::getFirstSPAdjustAmount(const MachineFunction &MF) const {
630  const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
631  const MachineFrameInfo &MFI = MF.getFrameInfo();
632  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
633  uint64_t StackSize = MFI.getStackSize();
634
635  // Disable SplitSPAdjust if save-restore libcall used. The callee saved
636  // registers will be pushed by the save-restore libcalls, so we don't have to
637  // split the SP adjustment in this case.
638  if (RVFI->getLibCallStackSize())
639    return 0;
640
641  // Return the FirstSPAdjustAmount if the StackSize can not fit in signed
642  // 12-bit and there exists a callee saved register need to be pushed.
643  if (!isInt<12>(StackSize) && (CSI.size() > 0)) {
644    // FirstSPAdjustAmount is choosed as (2048 - StackAlign)
645    // because 2048 will cause sp = sp + 2048 in epilogue split into
646    // multi-instructions. The offset smaller than 2048 can fit in signle
647    // load/store instruction and we have to stick with the stack alignment.
648    // 2048 is 16-byte alignment. The stack alignment for RV32 and RV64 is 16,
649    // for RV32E is 4. So (2048 - StackAlign) will satisfy the stack alignment.
650    return 2048 - getStackAlign().value();
651  }
652  return 0;
653}
654
655bool RISCVFrameLowering::spillCalleeSavedRegisters(
656    MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
657    ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
658  if (CSI.empty())
659    return true;
660
661  MachineFunction *MF = MBB.getParent();
662  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
663  DebugLoc DL;
664  if (MI != MBB.end() && !MI->isDebugInstr())
665    DL = MI->getDebugLoc();
666
667  const char *SpillLibCall = getSpillLibCallName(*MF, CSI);
668  if (SpillLibCall) {
669    // Add spill libcall via non-callee-saved register t0.
670    BuildMI(MBB, MI, DL, TII.get(RISCV::PseudoCALLReg), RISCV::X5)
671        .addExternalSymbol(SpillLibCall, RISCVII::MO_CALL)
672        .setMIFlag(MachineInstr::FrameSetup);
673
674    // Add registers spilled in libcall as liveins.
675    for (auto &CS : CSI)
676      MBB.addLiveIn(CS.getReg());
677  }
678
679  // Manually spill values not spilled by libcall.
680  const auto &NonLibcallCSI = getNonLibcallCSI(CSI);
681  for (auto &CS : NonLibcallCSI) {
682    // Insert the spill to the stack frame.
683    Register Reg = CS.getReg();
684    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
685    TII.storeRegToStackSlot(MBB, MI, Reg, true, CS.getFrameIdx(), RC, TRI);
686  }
687
688  return true;
689}
690
691bool RISCVFrameLowering::restoreCalleeSavedRegisters(
692    MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
693    MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
694  if (CSI.empty())
695    return true;
696
697  MachineFunction *MF = MBB.getParent();
698  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
699  DebugLoc DL;
700  if (MI != MBB.end() && !MI->isDebugInstr())
701    DL = MI->getDebugLoc();
702
703  // Manually restore values not restored by libcall. Insert in reverse order.
704  // loadRegFromStackSlot can insert multiple instructions.
705  const auto &NonLibcallCSI = getNonLibcallCSI(CSI);
706  for (auto &CS : reverse(NonLibcallCSI)) {
707    Register Reg = CS.getReg();
708    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
709    TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, TRI);
710    assert(MI != MBB.begin() && "loadRegFromStackSlot didn't insert any code!");
711  }
712
713  const char *RestoreLibCall = getRestoreLibCallName(*MF, CSI);
714  if (RestoreLibCall) {
715    // Add restore libcall via tail call.
716    MachineBasicBlock::iterator NewMI =
717        BuildMI(MBB, MI, DL, TII.get(RISCV::PseudoTAIL))
718            .addExternalSymbol(RestoreLibCall, RISCVII::MO_CALL)
719            .setMIFlag(MachineInstr::FrameDestroy);
720
721    // Remove trailing returns, since the terminator is now a tail call to the
722    // restore function.
723    if (MI != MBB.end() && MI->getOpcode() == RISCV::PseudoRET) {
724      NewMI->copyImplicitOps(*MF, *MI);
725      MI->eraseFromParent();
726    }
727  }
728
729  return true;
730}
731
732bool RISCVFrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const {
733  MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
734  const MachineFunction *MF = MBB.getParent();
735  const auto *RVFI = MF->getInfo<RISCVMachineFunctionInfo>();
736
737  if (!RVFI->useSaveRestoreLibCalls(*MF))
738    return true;
739
740  // Inserting a call to a __riscv_save libcall requires the use of the register
741  // t0 (X5) to hold the return address. Therefore if this register is already
742  // used we can't insert the call.
743
744  RegScavenger RS;
745  RS.enterBasicBlock(*TmpMBB);
746  return !RS.isRegUsed(RISCV::X5);
747}
748
749bool RISCVFrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
750  const MachineFunction *MF = MBB.getParent();
751  MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
752  const auto *RVFI = MF->getInfo<RISCVMachineFunctionInfo>();
753
754  if (!RVFI->useSaveRestoreLibCalls(*MF))
755    return true;
756
757  // Using the __riscv_restore libcalls to restore CSRs requires a tail call.
758  // This means if we still need to continue executing code within this function
759  // the restore cannot take place in this basic block.
760
761  if (MBB.succ_size() > 1)
762    return false;
763
764  MachineBasicBlock *SuccMBB =
765      MBB.succ_empty() ? TmpMBB->getFallThrough() : *MBB.succ_begin();
766
767  // Doing a tail call should be safe if there are no successors, because either
768  // we have a returning block or the end of the block is unreachable, so the
769  // restore will be eliminated regardless.
770  if (!SuccMBB)
771    return true;
772
773  // The successor can only contain a return, since we would effectively be
774  // replacing the successor with our own tail return at the end of our block.
775  return SuccMBB->isReturnBlock() && SuccMBB->size() == 1;
776}
777