Searched refs:RHS2 (Results 1 - 7 of 7) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/ADT/
H A DSparseBitVector.h238 // RHS1 & ~RHS2 into this element
240 const SparseBitVectorElement &RHS2,
246 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i];
686 // Result of RHS1 & ~RHS2 is stored into this bitmap.
688 const SparseBitVector<ElementSize> &RHS2)
691 intersectWithComplement(RHS2);
693 } else if (this == &RHS2) {
694 SparseBitVector RHS2Copy(RHS2);
702 ElementListConstIter Iter2 = RHS2.Elements.begin();
705 // If RHS2 i
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSelect.cpp2738 Value *LHS2, *RHS2; local
2739 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor)
2741 RHS2, SI, SPF, RHS))
2743 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor)
2745 RHS2, SI, SPF, LHS))
H A DInstCombineCompares.cpp2668 Value *LHS2, *RHS2; local
2669 if (!match(UnequalVal, m_Select(m_ICmp(PredB, m_Value(LHS2), m_Value(RHS2)),
2676 std::swap(LHS2, RHS2);
2682 if (PredB == ICmpInst::ICMP_SGT && isa<Constant>(RHS2)) {
2685 getFlippedStrictnessPredicateAndConstant(PredB, cast<Constant>(RHS2));
2689 RHS2 = FlippedStrictness->second;
2694 return PredB == ICmpInst::ICMP_SLT && RHS == RHS2;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp579 SDValue RHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_1, local
592 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5033 SDValue RHS2 = Op2.getOperand(1); local
5043 SDValue *K2 = isa<ConstantSDNode>(LHS2) ? &LHS2 : isa<ConstantSDNode>(RHS2)
5044 ? &RHS2
5048 SDValue V2Tmp = (K2 && *K2 == LHS2) ? RHS2 : LHS2;
5069 : isLowerSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2)
5075 : isUpperSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2)
5441 SDValue RHS1, RHS2; local
5443 expandf64Toi32(RHS, DAG, RHS1, RHS2);
5445 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mas
11143 Register RHS2 = MI.getOperand(4).getReg(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DValueTracking.cpp2641 const Value *LHS2 = nullptr, *RHS2 = nullptr; local
2642 SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor;
2646 if (!match(RHS2, m_APInt(CHigh)))
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp5943 SDValue RHS1, RHS2;
5944 std::tie(RHS1, RHS2) = splitVector(Op.getOperand(1), DAG, dl);
5950 DAG.getNode(Op.getOpcode(), dl, HiVT, LHS2, RHS2));
22106 SDValue RHS1, RHS2;
22107 std::tie(RHS1, RHS2) = splitVector(Op.getOperand(1), DAG, dl);
22114 DAG.getNode(ISD::SETCC, dl, HiVT, LHS2, RHS2, CC));
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