Searched refs:RC2 (Results 1 - 7 of 7) sorted by relevance
/freebsd-13-stable/crypto/openssl/crypto/evp/ |
H A D | e_rc2.c | 35 IMPLEMENT_BLOCK_CIPHER(rc2, ks, RC2, EVP_RC2_KEY, NID_rc2,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEFrameLowering.cpp | 318 const TargetRegisterClass *RC2 = local 323 int FI = MF.getInfo<MipsFunctionInfo>()->getMoveF64ViaSpillFI(MF, RC2); 330 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, 0); 385 const TargetRegisterClass *RC2 = &Mips::GPR32RegClass; local 391 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenInsert.cpp | 341 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1), &RC2 = CM.lookup(VR2); local 342 uint16_t W1 = RC1.width(), W2 = RC2.width(); 344 const BitTracker::BitValue &V1 = RC1[i], &V2 = RC2[i]; 359 const BitTracker::RegisterCell &RC2 = CM.lookup(VR2); local 360 uint16_t W1 = RC1.width(), W2 = RC2.width(); 374 const BitTracker::BitValue &V1 = RC1[Bit1], V2 = RC2[Bit2];
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H A D | HexagonBitSimplify.cpp | 204 const BitTracker::RegisterCell &RC2, uint16_t B2, uint16_t W); 315 uint16_t B1, const BitTracker::RegisterCell &RC2, uint16_t B2, 318 // If RC1[i] is "bottom", it cannot be proven equal to RC2[i]. 321 // Same for RC2[i]. 322 if (RC2[B2+i].Type == BitTracker::BitValue::Ref && RC2[B2+i].RefI.Reg == 0) 324 if (RC1[B1+i] != RC2[B2+i]) 314 isEqual(const BitTracker::RegisterCell &RC1, uint16_t B1, const BitTracker::RegisterCell &RC2, uint16_t B2, uint16_t W) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 2151 CodeGenRegisterClass *RC2 = &*I; local 2152 if (RC1 == RC2) 2155 // Compute the set intersection of RC1 and RC2. 2157 const CodeGenRegister::Vec &Memb2 = RC2->getMembers(); 2168 // If RC1 and RC2 have different spill sizes or alignments, use the 2170 if (RC2->RSI.hasStricterSpillThan(RC1->RSI)) 2171 std::swap(RC1, RC2); 2174 RC1->getName() + "_and_" + RC2->getName());
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 870 auto RC2 = SrcReg2 != 0 ? MRI.getRegClass(SrcReg2) : nullptr; local 892 if (RC2 && isVSSRCRegClass(RC2)) 910 } else if (isVSFRCRegClass(RC1) || (RC2 && isVSFRCRegClass(RC2))) {
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/freebsd-13-stable/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaOverload.cpp | 9676 Expr *RC2 = Cand2.Function->getTrailingRequiresClause(); 9677 if (RC1 && RC2) { 9680 {RC2}, AtLeastAsConstrained1) || 9681 S.IsAtLeastAsConstrained(Cand2.Function, {RC2}, Cand1.Function, 9686 } else if (RC1 || RC2) {
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