Searched refs:RB (Results 1 - 25 of 35) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/clang/lib/Rewrite/
H A DHTMLRewrite.cpp58 void html::HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E, argument
62 RB.InsertTextAfter(B, StartTag);
63 RB.InsertTextBefore(E, EndTag);
77 RB.InsertTextBefore(LastNonWhiteSpace+1, EndTag);
96 RB.InsertTextAfter(i, StartTag);
116 RewriteBuffer &RB = R.getEditBuffer(FID); local
129 RB.ReplaceText(FilePos, 1, " ");
133 RB.ReplaceText(FilePos, 1, "<hr>");
142 RB.ReplaceText(FilePos, 1,
146 RB
209 AddLineNumber(RewriteBuffer &RB, unsigned LineNo, unsigned B, unsigned E) argument
233 RewriteBuffer &RB = R.getEditBuffer(FID); local
[all...]
H A DRewriter.cpp162 const RewriteBuffer &RB = I->second; local
163 EndOff = RB.getMappedOffset(EndOff, opts.IncludeInsertsAtEndOfRange);
164 StartOff = RB.getMappedOffset(StartOff, !opts.IncludeInsertsAtBeginOfRange);
213 const RewriteBuffer &RB = I->second; local
214 EndOff = RB.getMappedOffset(EndOff, true);
215 StartOff = RB.getMappedOffset(StartOff);
223 RewriteBuffer::iterator Start = RB.begin();
398 RewriteBuffer &RB = getEditBuffer(FID); local
406 RB.InsertText(offs, indent, /*InsertAfter=*/false);
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRDFRegisters.h115 bool alias(RegisterRef RA, RegisterRef RB) const {
117 return !isRegMaskId(RB.Reg) ? aliasRR(RA, RB) : aliasRM(RA, RB);
118 return !isRegMaskId(RB.Reg) ? aliasRM(RB, RA) : aliasMM(RA, RB);
152 bool aliasRR(RegisterRef RA, RegisterRef RB) const;
166 static bool isCoverOf(RegisterRef RA, RegisterRef RB, argument
168 return RegisterAggr(PRI).insert(RA).hasCoverOf(RB);
[all...]
/freebsd-13-stable/contrib/llvm-project/clang/lib/Frontend/Rewrite/
H A DRewriteMacros.cpp94 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID());
133 RB.InsertTextAfter(SM.getFileOffset(RawTok.getLocation()), "//");
139 RB.InsertTextAfter(SM.getFileOffset(RawTok.getLocation()), "//");
169 RB.InsertTextAfter(RawOffs, &" /*"[HasSpace]);
187 RB.InsertTextBefore(EndPos, "*/");
203 RB.InsertTextBefore(InsertPos, Expansion);
/freebsd-13-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DMacOSXAPIChecker.cpp77 const MemRegion *RB = R->getBaseRegion(); local
78 const MemSpaceRegion *RS = RB->getMemorySpace();
96 if (const VarRegion *VR = dyn_cast<VarRegion>(RB)) {
/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_ring_buffer.h27 RingBuffer *RB = reinterpret_cast<RingBuffer*>(Ptr); local
29 RB->last_ = RB->next_ = reinterpret_cast<T*>(End - sizeof(T));
30 return RB;
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/Rewrite/Core/
H A DHTMLRewrite.h47 void HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.h64 unsigned ValLength, const RegisterBank &RB);
H A DAArch64InstructionSelector.cpp127 const RegisterBank &RB,
382 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, argument
385 if (RB.getID() == AArch64::GPRRegBankID) {
395 if (RB.getID() == AArch64::FPRRegBankID) {
413 getMinClassForRegBank(const RegisterBank &RB, unsigned SizeInBits, argument
415 unsigned RegBankID = RB.getID();
475 static unsigned getMinSizeForRegBank(const RegisterBank &RB) { argument
476 switch (RB.getID()) {
1338 const RegisterBank &RB = *RBI.getRegBank(LHS, MRI, TRI); local
1339 if (RB
1825 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); local
2001 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); local
2014 << " constant on bank: " << RB local
2034 << " constant on bank: " << RB local
2273 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); local
2346 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); local
2390 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); local
3285 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); local
3680 getInsertVecEltOpInfo(const RegisterBank &RB, unsigned EltSize) argument
4544 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRDFRegisters.cpp131 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const {
133 assert(Register::isPhysicalRegister(RB.Reg));
136 MCRegUnitMaskIterator UMB(RB.Reg, &TRI);
145 // Skip units that are masked off in RB.
147 if (PB.second.any() && (PB.second & RB.Mask).none()) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCSEInfo.cpp333 GISelInstProfileBuilder::addNodeIDRegType(const RegisterBank *RB) const {
334 ID.AddPointer(RB);
380 if (const auto *RB = RCOrRB.dyn_cast<const RegisterBank *>())
381 addNodeIDRegType(RB);
H A DRegisterBankInfo.cpp93 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>())
94 return RB;
140 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); local
142 if (RB && !RB->covers(RC))
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCSEInfo.h183 const GISelInstProfileBuilder &addNodeIDRegType(const RegisterBank *RB) const;
/freebsd-13-stable/sys/contrib/openzfs/module/lua/
H A Dlvm.c552 #define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) macro
619 setobjs2s(L, ra, RB(i));
650 Protect(luaV_gettable(L, RB(i), RKC(i), ra));
674 StkId rb = RB(i);
700 TValue *rb = RB(i);
710 TValue *rb = RB(i);
715 Protect(luaV_objlen(L, ra, RB(i)));
765 TValue *rb = RB(i);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp74 unsigned getLoadStoreOp(const LLT &Ty, const RegisterBank &RB, unsigned Opc,
128 const TargetRegisterClass *getRegClass(LLT Ty, const RegisterBank &RB) const;
170 X86InstructionSelector::getRegClass(LLT Ty, const RegisterBank &RB) const {
171 if (RB.getID() == X86::GPRRegBankID) {
181 if (RB.getID() == X86::VECRRegBankID) {
396 const RegisterBank &RB,
405 if (X86::GPRRegBankID == RB.getID())
408 if (X86::GPRRegBankID == RB.getID())
411 if (X86::GPRRegBankID == RB.getID())
413 if (X86::VECRRegBankID == RB
395 getLoadStoreOp(const LLT &Ty, const RegisterBank &RB, unsigned Opc, Align Alignment) const argument
510 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); local
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/freebsd-13-stable/contrib/llvm-project/clang/lib/Frontend/
H A DPrecompiledPreamble.cpp543 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) {
545 PreambleFileHash::createForMemoryBuffer(RB.second);
547 if (moveOnNoError(VFS->status(RB.first), Status))
550 OverridenFileBuffers[RB.first] = PreambleHash;
552 llvm::SmallString<128> MappedPath(RB.first);
H A DASTUnit.cpp189 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) {
190 std::string MPath(RB.first);
197 Buffer = const_cast<llvm::MemoryBuffer *>(RB.second);
264 for (const auto &RB : PPOpts.RemappedFileBuffers)
265 delete RB.second;
1846 for (const auto &RB : PPOpts.RemappedFileBuffers)
1847 delete RB.second;
H A DCompilerInstance.cpp338 for (const auto &RB : InitOpts.RemappedFileBuffers) {
341 FileMgr.getVirtualFile(RB.first, RB.second->getBufferSize(), 0);
343 Diags.Report(diag::err_fe_remap_missing_from_file) << RB.first;
345 delete RB.second;
351 SourceMgr.overrideFileContents(FromFile, RB.second,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp236 BitValueOrdering(const RegisterOrdering &RB) : BaseOrd(RB) {} argument
530 void buildOrderingBT(RegisterOrdering &RB, RegisterOrdering &RO) const;
627 void HexagonGenInsert::buildOrderingBT(RegisterOrdering &RB,
630 // ordering RB), and then sort it using the RegisterCell comparator.
631 BitValueOrdering BVO(RB);
637 for (RegisterOrdering::iterator I = RB.begin(), E = RB.end(); I != E; ++I)
H A DHexagonVLIWPacketizer.cpp255 MachineBasicBlock::iterator RB = Begin; local
256 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF))
257 ++RB;
260 MachineBasicBlock::iterator RE = RB;
266 // If RB == End, then RE == End.
267 if (RB != End)
268 Packetizer.PacketizeMIs(&MB, RB, RE);
H A DHexagonHardwareLoops.cpp1758 const RegisterBump &RB = I->second; local
1759 if (CmpRegs.count(RB.first)) {
1770 if (MO.isReg() && MO.getReg() == RB.first) {
1791 nonIndI->getOperand(2).getImm() == - RB.second) {
1813 int64_t V = RB.second;
1837 if (MO.isReg() && MO.getReg() == RB.first) {
H A DHexagonEarlyIfConv.cpp473 const MachineOperand &RB = MI.getOperand(3); local
474 assert(RA.isReg() && RB.isReg());
476 if (RA.getSubReg() != 0 || RB.getSubReg() != 0) {
481 const MachineInstr *Def3 = MRI->getVRegDef(RB.getReg());
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/AST/
H A DExprObjC.h860 ObjCMethodDecl *setMethod, SourceLocation RB)
861 : Expr(ObjCSubscriptRefExprClass, T, VK, OK), RBracket(RB),
872 void setRBracket(SourceLocation RB) { RBracket = RB; } argument
858 ObjCSubscriptRefExpr(Expr *base, Expr *key, QualType T, ExprValueKind VK, ExprObjectKind OK, ObjCMethodDecl *getMethod, ObjCMethodDecl *setMethod, SourceLocation RB) argument
/freebsd-13-stable/contrib/llvm-project/clang/lib/AST/
H A DStmt.cpp304 SourceLocation RB)
305 : Stmt(CompoundStmtClass), RBraceLoc(RB) {
319 SourceLocation LB, SourceLocation RB) {
322 return new (Mem) CompoundStmt(Stmts, LB, RB);
303 CompoundStmt(ArrayRef<Stmt *> Stmts, SourceLocation LB, SourceLocation RB) argument
318 Create(const ASTContext &C, ArrayRef<Stmt *> Stmts, SourceLocation LB, SourceLocation RB) argument
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DDAGISelMatcherGen.cpp728 const CodeGenRegBank &RB = CGP.getTargetInfo().getRegBank(); local
731 if (RB.getSubRegIndices().size() > 127) {
732 const CodeGenSubRegIndex *I = RB.findSubRegIdx(Def);

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