Searched refs:R4 (Results 1 - 25 of 61) sorted by relevance

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/freebsd-13-stable/contrib/wpa/src/crypto/
H A Dsha1-internal.c143 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
155 #define R4(v,w,x,y,z,i) \ macro
213 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
214 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
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/freebsd-13-stable/contrib/ldns/
H A Dsha1.c37 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
42 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
86 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
87 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
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/freebsd-13-stable/crypto/openssh/openbsd-compat/
H A Dsha1.c40 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1
46 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
88 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
89 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp42 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7,
52 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7,
90 Reserved.set(MSP430::R4);
115 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP);
159 return TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP;
H A DMSP430FrameLowering.cpp67 .addReg(MSP430::R4, RegState::Kill);
70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::R4)
76 I->addLiveIn(MSP430::R4);
135 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::R4);
157 TII.get(MSP430::MOV16rr), MSP430::SP).addReg(MSP430::R4);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.cpp37 PPC::R3, PPC::R4, PPC::R5, PPC::R6,
62 PPC::R3, PPC::R4, PPC::R5, PPC::R6,
115 static const MCPhysReg LoRegList[] = { PPC::R4, PPC::R6, PPC::R8, PPC::R10 };
137 // Same as above, but for return values, so only allocate for R3 and R4
144 static const MCPhysReg LoRegList[] = { PPC::R4 };
/freebsd-13-stable/contrib/ntp/lib/isc/
H A Dsha1.c105 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1
119 #define R4(v,w,x,y,z,i) \ macro
144 #define nR4(v,w,x,y,z,i) R4(*v,*w,*x,*y,*z,i)
243 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
244 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(
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/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/
H A Dfastmath2_dlib_asm.S61 #define expa R4
72 #define k R4
162 #define expa R4
173 #define k R4
263 #define expa R4
375 #define expo R4
461 #define maxnegl R4
H A Dfastmath2_ldlib_asm.S56 #define expa R4
62 #define k R4
155 #define expa R4
161 #define k R4
260 #define expa R4
H A Dfastmath_dlib_asm.S63 #define expa R4
79 #define k R4
198 #define expa R4
214 #define k R4
327 #define expa R4
339 #define k R4
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiBaseInfo.h51 case Lanai::R4:
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp414 case ARM::R4:
516 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), ARM::R4)
521 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R4)
534 .addReg(ARM::R4, RegState::Implicit)
545 .addReg(ARM::R4, RegState::Implicit)
552 .addReg(ARM::R4, RegState::Kill)
634 case ARM::R4:
728 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
731 emitAligningInstructions(MF, AFI, TII, MBB, MBBI, dl, ARM::R4, MaxAlign,
734 .addReg(ARM::R4, RegStat
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H A DThumb1FrameLowering.cpp221 case ARM::R4:
286 case ARM::R4:
408 // Emit the following sequence, using R4 as a temporary, since we cannot use
414 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
418 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSRri), ARM::R4)
420 .addReg(ARM::R4, RegState::Kill)
424 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSLri), ARM::R4)
426 .addReg(ARM::R4, RegState::Kill)
431 .addReg(ARM::R4, RegState::Kill)
517 assert(!MFI.getPristineRegs(MF).test(ARM::R4)
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H A DARMBaseRegisterInfo.h48 case R4: case R5: case R6: case R7:
H A DARMExpandPseudoInsts.cpp1774 for (int Reg = ARM::R4; Reg < ARM::R8; ++Reg) {
1786 for (int LoReg = ARM::R7, HiReg = ARM::R11; LoReg >= ARM::R4; --LoReg) {
1796 for (int Reg = ARM::R4; Reg < ARM::R8; ++Reg) {
1805 if (JumpReg >= ARM::R4 && JumpReg <= ARM::R7) {
1806 int LoReg = JumpReg == ARM::R4 ? ARM::R5 : ARM::R4;
1819 for (int Reg = ARM::R4; Reg < ARM::R12; ++Reg) {
1835 PopMIB.addReg(ARM::R4 + R, RegState::Define);
1837 .addReg(ARM::R4 + R, RegState::Kill)
1843 PopMIB2.addReg(ARM::R4
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/freebsd-13-stable/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-armv4.pl448 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9));
489 vdup.32 $R4,r6
506 vmull.u32 $D4,$R4,${R0}[1]
508 vmlal.u32 $D0,$R4,${S1}[1]
515 vmlal.u32 $D1,$R4,${S2}[1]
523 vmlal.u32 $D2,$R4,${S3}[1]
526 vmlal.u32 $D3,$R4,${S4}[1]
530 vmlal.u32 $D4,$R0,${R4}[1]
557 @ H4 = H4*R0 + H3*R1 + H2*R2 + H1*R3 + H0 * R4,
623 vtrn.32 $R4,
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H A Dpoly1305-armv8.pl214 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
500 ld1 {$S2,$R3,$S3,$R4},[x15],#64
556 umull $ACC4,$IN23_0,${R4}[2]
638 umlal $ACC4,$IN01_0,${R4}[0]
753 umlal2 $ACC4,$IN23_0,${R4}
791 umlal $ACC4,$IN01_0,${R4}
H A Dpoly1305-x86_64.pl2131 my ($R0,$R1,$R2,$R3,$R4, $S1,$S2,$S3,$S4) = map("%zmm$_",(16..24));
2184 vmovdqu `16*7-64`($ctx),%x#$D4 # ... ${R4}
2199 vpermd $D4,$T2,$R4
2205 vmovdqu64 $R4,0xc0(%rsp,%rax){%k2}
2221 vpmuludq $T0,$R4,$D4 # d4 = r0'*r4
2241 vpsrlq \$32,$R4,$T4
2330 vpermd $R4,$M0,$R4
2336 vpermd $D4,$M0,${R4}{%k1}
2341 vpslld \$2,$R4,
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Support/
H A DMathExtras.h296 #define R4(n) R2(n), R2(n + 2 * 16), R2(n + 1 * 16), R2(n + 3 * 16) macro
297 #define R6(n) R4(n), R4(n + 2 * 4), R4(n + 1 * 4), R4(n + 3 * 4)
300 #undef R4 macro
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp214 XCore::R4, XCore::R5, XCore::R6, XCore::R7,
219 XCore::R4, XCore::R5, XCore::R6, XCore::R7,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h164 case R4: case R5: case R6: case R7:
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp97 BPF::R0, BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.cpp50 Reserved.set(Lanai::R4);
/freebsd-13-stable/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c47 uint32_t R4[5]; /* 20 bytes */ member in struct:poly1305_state_internal_t
155 R = st->R4;
287 T0 = _mm_loadu_si128((const xmmi *) (const void *) &st->R4[0]);
288 T1 = _mm_cvtsi32_si128(st->R4[4]);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp62 AVR::R4, AVR::R5, AVR::R6, AVR::R7,

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