Searched refs:OrigMI (Results 1 - 7 of 7) sorted by relevance
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNDPPCombine.cpp | 74 MachineInstr *createDPPInst(MachineInstr &OrigMI, 80 MachineInstr *createDPPInst(MachineInstr &OrigMI, 162 MachineInstr *GCNDPPCombine::createDPPInst(MachineInstr &OrigMI, argument 168 auto OrigOp = OrigMI.getOpcode(); 175 auto DPPInst = BuildMI(*OrigMI.getParent(), OrigMI, 176 OrigMI.getDebugLoc(), TII->get(DPPOp)) 177 .setMIFlags(OrigMI.getFlags()); 181 auto *Dst = TII->getNamedOperand(OrigMI, AMDGPU::OpName::vdst); 202 if (auto *Mod0 = TII->getNamedOperand(OrigMI, 323 createDPPInst(MachineInstr &OrigMI, MachineInstr &MovMI, RegSubRegPair CombOldVGPR, MachineOperand *OldOpndValue, bool CombBCZ) const argument 464 auto &OrigMI = *Use->getParent(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 105 /// allUsesAvailableAt - Return true if all registers used by OrigMI at 107 bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI, argument 112 for (unsigned i = 0, e = OrigMI->getNumOperands(); i != e; ++i) { 113 const MachineOperand &MO = OrigMI->getOperand(i); 130 // It would be incorrect if OrigMI redefines the register. 151 assert(RM.OrigMI && "No defining instruction for remattable value"); 152 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); 155 if (cheapAsAMove && !TII.isAsCheapAsAMove(*RM.OrigMI)) 159 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) 171 assert(RM.OrigMI [all...] |
H A D | InlineSpiller.cpp | 584 RM.OrigMI = LIS.getInstructionFromIndex(OrigVNI->def); 602 if (RM.OrigMI->canFoldAsLoad() && 603 foldMemoryOperand(Ops, RM.OrigMI)) { 620 // Finally we can rematerialize OrigMI before MI. 624 // We take the DebugLoc from MI, since OrigMI may be attributed to a
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H A D | ModuloSchedule.cpp | 1166 MachineInstr *OrigMI = OrigInstr->second; local 1167 int StageSched = Schedule.getStage(OrigMI); 1168 int CycleSched = Schedule.getCycle(OrigMI); 1176 (CyclePhi <= CycleSched || OrigMI->isPHI()))
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H A D | SplitKit.cpp | 656 RM.OrigMI = LIS.getInstructionFromIndex(OrigVNI->def);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FixupBWInsts.cpp | 84 /// that super register is dead just prior to \p OrigMI, and false if not. 85 bool getSuperRegDestIfDead(MachineInstr *OrigMI, 183 /// Check if after \p OrigMI the only portion of super register 184 /// of the destination register of \p OrigMI that is alive is that 188 bool FixupBWInstPass::getSuperRegDestIfDead(MachineInstr *OrigMI, argument 192 Register OrigDestReg = OrigMI->getOperand(0).getReg(); 251 unsigned Opc = OrigMI->getOpcode(); (void)Opc; 260 for (auto &MO: OrigMI->implicit_operands()) {
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | LiveRangeEdit.h | 99 /// allUsesAvailableAt - Return true if all registers used by OrigMI at 101 bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx, 203 MachineInstr *OrigMI = nullptr; // Instruction defining OrigVNI. It contains member in struct:llvm::LiveRangeEdit::Remat
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