Searched refs:OrigArg (Results 1 - 13 of 13) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp53 bool X86CallLowering::splitToValueTypes(const ArgInfo &OrigArg, argument
59 LLVMContext &Context = OrigArg.Ty->getContext();
63 ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitVTs, &Offsets, 0);
64 assert(OrigArg.Regs.size() == 1 && "Can't handle multple regs yet");
66 if (OrigArg.Ty->isVoidTy())
74 SplitArgs.emplace_back(OrigArg.Regs[0], VT.getTypeForEVT(Context),
75 OrigArg.Flags, OrigArg.IsFixed);
87 PartTy, OrigArg.Flags};
354 ArgInfo OrigArg(VReg
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.h51 void splitToValueTypes(const ArgInfo &OrigArg,
H A DARMCallLowering.cpp190 void ARMCallLowering::splitToValueTypes(const ArgInfo &OrigArg, argument
194 LLVMContext &Ctx = OrigArg.Ty->getContext();
199 ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitVTs, nullptr, nullptr, 0);
200 assert(OrigArg.Regs.size() == SplitVTs.size() && "Regs / types mismatch");
205 auto Flags = OrigArg.Flags[0];
206 Flags.setOrigAlign(DL.getABITypeAlign(OrigArg.Ty));
207 SplitArgs.emplace_back(OrigArg.Regs[0], SplitVTs[0].getTypeForEVT(Ctx),
208 Flags, OrigArg.IsFixed);
216 auto Flags = OrigArg.Flags[0];
230 Register PartReg = OrigArg
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H A DARMISelLowering.h838 SDValue &Chain, const Value *OrigArg,
H A DARMISelLowering.cpp4120 const Value *OrigArg,
4161 MachinePointerInfo(OrigArg, 4 * i));
4118 StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, const Value *OrigArg, unsigned InRegsParamRecordIdx, int ArgOffset, unsigned ArgSize) const argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp240 const ArgInfo &OrigArg, SmallVectorImpl<ArgInfo> &SplitArgs,
243 LLVMContext &Ctx = OrigArg.Ty->getContext();
247 ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitVTs, &Offsets, 0);
255 SplitArgs.emplace_back(OrigArg.Regs[0], SplitVTs[0].getTypeForEVT(Ctx),
256 OrigArg.Flags[0], OrigArg.IsFixed);
261 assert(OrigArg.Regs.size() == SplitVTs.size() && "Regs / types mismatch");
264 OrigArg.Ty, CallConv, false);
267 SplitArgs.emplace_back(OrigArg.Regs[i], SplitTy, OrigArg
239 splitToValueTypes( const ArgInfo &OrigArg, SmallVectorImpl<ArgInfo> &SplitArgs, const DataLayout &DL, MachineRegisterInfo &MRI, CallingConv::ID CallConv) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp188 const ArgInfo &OrigArg, unsigned OrigArgIdx,
193 LLVMContext &Ctx = OrigArg.Ty->getContext();
195 if (OrigArg.Ty->isVoidTy())
199 ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitVTs);
201 assert(OrigArg.Regs.size() == SplitVTs.size());
205 Register Reg = OrigArg.Regs[SplitIdx];
211 if (OrigArg.Flags[0].isSExt()) {
212 assert(OrigArg.Regs.size() == 1 && "expect only simple return values");
214 } else if (OrigArg.Flags[0].isZExt()) {
215 assert(OrigArg
186 splitToValueTypes( MachineIRBuilder &B, const ArgInfo &OrigArg, unsigned OrigArgIdx, SmallVectorImpl<ArgInfo> &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SplitArgTy PerformArgSplit) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.h85 void splitToValueTypes(const DataLayout &DL, const ArgInfo &OrigArg,
H A DMipsCallLowering.cpp666 const DataLayout &DL, const ArgInfo &OrigArg, unsigned OriginalIndex,
673 LLVMContext &Ctx = OrigArg.Ty->getContext();
675 ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitEVTs);
678 ArgInfo Info = ArgInfo{OrigArg.Regs[i], SplitEVTs[i].getTypeForEVT(Ctx)};
679 Info.Flags = OrigArg.Flags;
665 splitToValueTypes( const DataLayout &DL, const ArgInfo &OrigArg, unsigned OriginalIndex, SmallVectorImpl<ArgInfo> &SplitArgs, SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const argument
/freebsd-13-stable/contrib/llvm-project/clang/lib/Edit/
H A DRewriteObjCFoundationAPI.cpp992 const Expr *OrigArg = Arg->IgnoreImpCasts(); local
994 QualType OrigTy = OrigArg->getType();
1016 if (OrigTy->getAs<EnumType>() || isEnumConstant(OrigArg))
1106 SourceRange ArgRange = OrigArg->getSourceRange();
1109 if (isa<ParenExpr>(OrigArg) || isa<IntegerLiteral>(OrigArg))
1130 const Expr *OrigArg = Arg->IgnoreImpCasts(); local
1131 QualType OrigTy = OrigArg->getType();
1136 StrE = dyn_cast<StringLiteral>(OrigArg->IgnoreParens())) {
1145 SourceRange ArgRange = OrigArg
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp47 ArgInfo OrigArg{ArgRegs[i], Arg->getType(), ISD::ArgFlagsTy{},
49 setArgFlags(OrigArg, i + AttributeList::FirstArgIndex, DL, CB);
50 Info.OrigArgs.push_back(OrigArg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/
H A DObjCARCContract.cpp662 Value *OrigArg = Arg; local
694 for (User *U : OrigArg->users())
/freebsd-13-stable/contrib/llvm-project/clang/lib/Sema/
H A DSemaChecking.cpp5772 Expr *OrigArg = TheCall->getArg(NumArgs-1); local
5774 if (OrigArg->isTypeDependent())
5781 OrigArg = UsualUnaryConversions(OrigArg).get();
5783 OrigArg = DefaultFunctionArrayLvalueConversion(OrigArg).get();
5784 TheCall->setArg(NumArgs - 1, OrigArg);
5787 if (!OrigArg->getType()->isRealFloatingType())
5788 return Diag(OrigArg->getBeginLoc(),
5790 << OrigArg
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