Searched refs:NBits (Results 1 - 5 of 5) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonStoreWidening.cpp | 409 unsigned NBits = MMO.getSize()*8; local
410 unsigned Mask = (0xFFFFFFFFU >> (32-NBits));
413 Shift += NBits;
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Object/ |
| H A D | ELF.cpp | 327 const size_t NBits = 8*WordSize - 1; local
352 // Advance base offset by NBits words.
353 Base += NBits * WordSize;
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 1055 /// (1 << NBits) - 1
1057 /// ~(-(1 << NBits))
1062 Value *NBits; local
1063 if (!match(&I, m_Add(m_OneUse(m_Shl(m_One(), m_Value(NBits))), m_AllOnes())))
1066 Constant *MinusOne = Constant::getAllOnesValue(NBits->getType());
1067 Value *NotMask = Builder.CreateShl(MinusOne, NBits, "notmask");
1130 // Extraction should extract high NBits bits, with shift amount calculated as:
1133 // when matching NBits, that will matter for matching later.
1135 Value *NBits; local
1138 m_ZExtOrSelf(m_Sub(m_Constant(C), m_ZExtOrSelf(m_Value(NBits))))) ||
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| H A D | InstCombineShifts.cpp | 1185 Value *NBits; local
1191 m_ZExtOrSelf(m_Value(NBits))))),
1193 m_ZExtOrSelf(m_Deferred(NBits)))))) ||
1207 // Said right-shift must extract high NBits bits - C0 must be it's bitwidth.
1211 m_Sub(m_Constant(C0), m_ZExtOrSelf(m_Specific(NBits))))) ||
1215 // Since the NBits is identical for all shifts, if the outermost and
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3295 SDValue NBits;
3319 &NBits](SDValue Mask) -> bool {
3332 NBits = M0->getOperand(1);
3345 &NBits](SDValue Mask) -> bool {
3359 NBits = M0->getOperand(1);
3364 auto matchShiftAmt = [checkOneUse, &NBits](SDValue ShiftAmt,
3379 NBits = ShiftAmt.getOperand(1);
3447 NBits = CurDAG->getNode(ISD::TRUNCATE, DL, MVT::i8, NBits);
3448 insertDAGNode(*CurDAG, SDValue(Node, 0), NBits);
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