Searched refs:Instrs (Results 1 - 25 of 32) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DExecutionDomainFix.h66 SmallVector<MachineInstr *, 8> Instrs; member in struct:llvm::DomainValue
72 bool isCollapsed() const { return Instrs.empty(); }
112 Instrs.clear();
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDagPredicate.h100 SmallVector<const CodeGenInstruction *, 4> Instrs; member in class:llvm::GIMatchDagOneOfOpcodesPredicate
105 void addOpcode(const CodeGenInstruction *Instr) { Instrs.push_back(Instr); }
112 return Instrs;
H A DGIMatchDagPredicate.cpp44 for (const CodeGenInstruction *Instr : Instrs) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackendDarwin.h36 ArrayRef<MCCFIInstruction> Instrs) const override;
H A DARMAsmBackend.cpp1101 ArrayRef<MCCFIInstruction> Instrs) const {
1107 if (Instrs.empty())
1116 for (size_t i = 0, e = Instrs.size(); i != e; ++i) {
1118 const MCCFIInstruction &Inst = Instrs[i];
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DExecutionDomainFix.cpp116 while (!dv->Instrs.empty())
117 TII->setExecutionDomain(*dv->Instrs.pop_back_val(), domain);
137 A->Instrs.append(B->Instrs.begin(), B->Instrs.end());
379 dv->Instrs.push_back(mi);
H A DMachineTraceMetrics.cpp1214 unsigned Instrs = TBI.InstrDepth;
1217 Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount;
1219 Instrs /= IW;
1221 return std::max(Instrs, PRMax);
1234 auto extraCycles = [this](ArrayRef<const MCSchedClassDesc *> Instrs,
1238 for (const MCSchedClassDesc *SC : Instrs) {
1265 // Instrs: #instructions in current trace outside current block.
1266 unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight;
1269 Instrs += TE.MTM.getResources(MBB)->InstrCount;
1270 Instrs
[all...]
H A DMachineCombiner.cpp110 void instr2instrSC(SmallVectorImpl<MachineInstr *> &Instrs,
368 SmallVectorImpl<MachineInstr *> &Instrs,
370 for (auto *InstrPtr : Instrs) {
H A DCFIInstrInserter.cpp185 const std::vector<MCCFIInstruction> &Instrs = MF->getFrameInstructions(); local
196 const MCCFIInstruction &CFI = Instrs[CFIIndex];
H A DMachineOutliner.cpp655 const std::vector<MCCFIInstruction> &Instrs = local
662 MCCFIInstruction CFI = Instrs[CFIIndex];
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp597 ArrayRef<MCCFIInstruction> Instrs) const override {
598 if (Instrs.empty())
605 for (size_t i = 0, e = Instrs.size(); i != e; ++i) {
606 const MCCFIInstruction &Inst = Instrs[i];
627 const MCCFIInstruction &LRPush = Instrs[++i];
630 const MCCFIInstruction &FPPush = Instrs[++i];
660 const MCCFIInstruction &Inst2 = Instrs[++i];
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoadStoreVectorizer.cpp175 bool vectorizeInstructions(ArrayRef<Instruction *> Instrs);
610 SmallVector<Instruction *, 16> Instrs; local
614 Instrs.push_back(I);
616 Instrs.push_back(GEP);
620 for (Instruction *I : Instrs)
908 bool Vectorizer::vectorizeInstructions(ArrayRef<Instruction *> Instrs) { argument
909 LLVM_DEBUG(dbgs() << "LSV: Vectorizing " << Instrs.size()
916 for (int i = 0, e = Instrs.size(); i < e; ++i) {
922 if (isConsecutiveAccess(Instrs[i], Instrs[
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp235 std::string Instrs = InstrsForCase[i]; local
236 if (Instrs.size() > 70) {
237 Instrs.erase(Instrs.begin()+70, Instrs.end());
238 Instrs += "...";
241 if (!Instrs.empty())
242 UniqueOperandCommands[i] = " // " + Instrs + "\n" +
H A DCodeGenDAGPatterns.cpp3614 getInstructionsInTree(TreePatternNode *Tree, SmallVectorImpl<Record*> &Instrs) { argument
3618 Instrs.push_back(Tree->getOperator());
3620 getInstructionsInTree(Tree->getChild(i), Instrs);
3824 std::vector<Record*> Instrs = Records.getAllDerivedDefinitions("Instruction"); local
3826 for (Record *Instr : Instrs) {
4029 SmallVector<Record*, 8> Instrs; local
4030 getInstructionsInTree(PTM.getDstPattern(), Instrs);
4031 if (Instrs.empty())
4038 for (const Record *Instr : Instrs) {
4073 (Instrs
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/
H A DMCWin64EH.cpp471 const auto &Instrs = InstrsIter->second; local
473 if (Instrs.size() != EpilogInstrs.size())
477 for (unsigned i = 0; i < Instrs.size(); ++i)
478 if (Instrs[i].Operation != EpilogInstrs[i].Operation ||
479 Instrs[i].Offset != EpilogInstrs[i].Offset ||
480 Instrs[i].Register != EpilogInstrs[i].Register) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.cpp471 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle); local
472 for (auto I = Instrs.begin(), N = Instrs.end(); I != N; ++I) {
735 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle);
736 const MCOperand *I = Instrs.begin() + State.Index - 1;
739 assert(I != Instrs.begin() - 1 && "Couldn't find producer");
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp145 SmallVector<MachineInstr*, 4> Instrs; member in struct:__anon4029::ARMLoadStoreOpt::MergeCandidate
147 /// Index in Instrs of the instruction being latest in the schedule.
150 /// Index in Instrs of the instruction being earliest in the schedule.
179 ArrayRef<MachineInstr*> Instrs);
185 ArrayRef<MachineInstr*> Instrs) const;
630 ArrayRef<MachineInstr*> Instrs) {
827 MIB.cloneMergedMemRefs(Instrs);
837 ArrayRef<MachineInstr*> Instrs) const {
853 MIB.cloneMergedMemRefs(Instrs);
859 const MachineInstr *First = Cand.Instrs
625 CreateLoadStoreMulti( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, int Offset, unsigned Base, bool BaseKill, unsigned Opcode, ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL, ArrayRef<std::pair<unsigned, bool>> Regs, ArrayRef<MachineInstr*> Instrs) argument
[all...]
/freebsd-13-stable/contrib/llvm-project/clang/lib/Analysis/
H A DThreadSafetyTIL.cpp155 for (auto *Instr : Instrs)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86DomainReassignment.cpp306 SmallVector<MachineInstr *, 8> Instrs; member in class:__anon4424::Closure
345 Instrs.push_back(I);
349 return Instrs;
362 for (MachineInstr *MI : Instrs) {
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/Analysis/Analyses/
H A DThreadSafetyTIL.h1535 Args(std::move(As)), Instrs(std::move(Is)), TermInstr(T) {}
1555 InstrArray &instructions() { return Instrs; }
1556 const InstrArray &instructions() const { return Instrs; }
1588 Instrs.reserveCheck(1, Arena);
1589 Instrs.push_back(V);
1600 void reserveInstructions(unsigned Nins) { Instrs.reserve(Nins, Arena); }
1614 typename V::template Container<SExpr*> Nis(Vs, Instrs.size());
1623 for (const auto *E : Instrs) {
1671 InstrArray Instrs; member in class:clang::threadSafety::BasicBlock
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp1410 generateCompactUnwindEncoding(ArrayRef<MCCFIInstruction> Instrs) const override {
1411 if (Instrs.empty()) return 0;
1428 for (unsigned i = 0, e = Instrs.size(); i != e; ++i) {
1429 const MCCFIInstruction &Inst = Instrs[i];
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DLoopAccessAnalysis.h169 const SmallVectorImpl<Instruction *> &Instrs) const;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp1464 std::vector<MachineInstr*> Instrs;
1466 Instrs.push_back(&*I);
1468 for (auto I = Instrs.begin(), E = Instrs.end(); I != E; ++I) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DModuleSummaryAnalysis.cpp398 auto AddRefEdges = [&](const std::vector<const Instruction *> &Instrs,
401 for (const auto *I : Instrs) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp3137 SmallVector<TagStoreInstr, 4> Instrs;
3138 Instrs.emplace_back(&MI, Offset, Size);
3155 Instrs.emplace_back(&MI, Offset, Size);
3175 MachineBasicBlock::iterator InsertI = Instrs.back().MI;
3178 llvm::stable_sort(Instrs,
3184 int64_t CurOffset = Instrs[0].Offset;
3185 for (auto &Instr : Instrs) {
3195 for (auto &Instr : Instrs) {

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