/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.h | 21 bool IsCPSRDead(const InstrType *Instr); 24 inline bool isV8EligibleForIT(const InstrType *Instr) { argument 25 switch (Instr->getOpcode()) { 52 return IsCPSRDead(Instr); 78 return Instr->getOperand(2).getReg() != ARM::PC; 83 return Instr->getOperand(0).getReg() != ARM::PC; 85 return Instr->getOperand(0).getReg() != ARM::PC && 86 Instr->getOperand(2).getReg() != ARM::PC; 89 return Instr->getOperand(0).getReg() != ARM::PC && 90 Instr [all...] |
H A D | MVEVPTOptimisationsPass.cpp | 55 MachineInstr &Instr, 97 static ARMCC::CondCodes GetCondCode(MachineInstr &Instr) { argument 98 assert(IsVCMP(Instr.getOpcode()) && "Inst must be a VCMP"); 99 return ARMCC::CondCodes(Instr.getOperand(3).getImm()); 129 // Returns true if Instr writes to VCCR. 130 static bool IsWritingToVCCR(MachineInstr &Instr) { argument 131 if (Instr.getNumOperands() == 0) 133 MachineOperand &Dst = Instr.getOperand(0); 139 MachineRegisterInfo &RegInfo = Instr.getMF()->getRegInfo(); 145 // <Instr tha 152 ReplaceRegisterUseWithVPNOT( MachineBasicBlock &MBB, MachineInstr &Instr, MachineOperand &User, Register Target) argument [all...] |
H A D | Thumb2InstrInfo.h | 82 // Recomputes the Block Mask of Instr, a VPT or VPST instruction. 87 void recomputeVPTBlockMask(MachineInstr &Instr);
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/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/ |
H A D | GIMatchDagPredicate.cpp | 27 GIMatchDagContext &Ctx, StringRef Name, const CodeGenInstruction &Instr) 30 Instr(Instr) {} 33 OS << "$mi.getOpcode() == " << Instr.TheDef->getName(); 44 for (const CodeGenInstruction *Instr : Instrs) { 45 OS << Separator << Instr->TheDef->getName(); 26 GIMatchDagOpcodePredicate( GIMatchDagContext &Ctx, StringRef Name, const CodeGenInstruction &Instr) argument
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H A D | GIMatchDagPredicate.h | 80 const CodeGenInstruction &Instr; member in class:llvm::GIMatchDagOpcodePredicate 84 const CodeGenInstruction &Instr); 90 const CodeGenInstruction *getInstr() const { return &Instr; } 105 void addOpcode(const CodeGenInstruction *Instr) { Instrs.push_back(Instr); } argument
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H A D | GIMatchTree.cpp | 109 void GIMatchTreeBuilderLeafInfo::declareInstr(const GIMatchDagInstr *Instr, unsigned ID) { argument 112 Instr, GIMatchTreeInstrInfo(ID, Instr))); 115 if (Instr == nullptr) 118 if (!Instr->getUserAssignedName().empty()) 119 Info.bindInstrVariable(Instr->getUserAssignedName(), ID); 120 for (const auto &VarBinding : Instr->user_assigned_operand_names()) 125 MatchDag.instr_nodes_end(), Instr); 126 assert(NodeI != MatchDag.instr_nodes_end() && "Instr isn't in this DAG"); 139 if (Dep.value()->getRequiredMI() == Instr 152 const GIMatchDagInstr *Instr = InstrIDToInfo.lookup(InstrID)->getInstrNode(); local 576 const GIMatchDagInstr *Instr = InstrInfo->getInstrNode(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
H A D | LanaiDisassembler.h | 30 getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef<uint8_t> Bytes,
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H A D | LanaiDisassembler.cpp | 90 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { argument 94 if (isRMOpcode(Instr.getOpcode())) 96 else if (isSPLSOpcode(Instr.getOpcode())) 98 else if (isRRMOpcode(Instr.getOpcode())) { 112 if (Instr.getOperand(2).isReg()) { 113 Instr.getOperand(2).setReg(Lanai::R0); 115 if (Instr.getOperand(2).isImm()) 116 Instr.getOperand(2).setImm(0); 127 Instr.addOperand(MCOperand::createImm(AluOp)); 132 LanaiDisassembler::getInstruction(MCInst &Instr, uint64_ argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyDebugValueManager.h | 28 WebAssemblyDebugValueManager(MachineInstr *Instr);
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H A D | WebAssemblyDebugValueManager.cpp | 22 MachineInstr *Instr) { 23 Instr->collectDebugValues(DbgValues); 21 WebAssemblyDebugValueManager( MachineInstr *Instr) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | DbgEntityHistoryCalculator.h | 58 Entry(const MachineInstr *Instr, EntryKind Kind) argument 59 : Instr(Instr, Kind), EndIndex(NoEntry) {} 61 const MachineInstr *getInstr() const { return Instr.getPointer(); } 63 EntryKind getEntryKind() const { return Instr.getInt(); } 72 PointerIntPair<const MachineInstr *, 1, EntryKind> Instr; member in class:llvm::DbgValueHistoryMap::Entry
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.h | 27 getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef<uint8_t> Bytes,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600OptimizeVectorRegisters.cpp | 70 MachineInstr *Instr; member in class:__anon3963::RegSeqInfo 74 RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) { 76 for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) { 77 MachineOperand &MO = Instr->getOperand(i); 78 unsigned Chan = Instr->getOperand(i + 1).getImm(); 89 return RSI.Instr == Instr; 204 Register Reg = RSI->Instr->getOperand(0).getReg(); 205 MachineBasicBlock::iterator Pos = RSI->Instr; 209 Register SrcVec = BaseRSI->Instr [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
H A D | BPFDisassembler.cpp | 68 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, 164 DecodeStatus BPFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, argument 181 Result = decodeInstruction(DecoderTableBPFALU3264, Instr, Insn, Address, 184 Result = decodeInstruction(DecoderTableBPF64, Instr, Insn, Address, this, 189 switch (Instr.getOpcode()) { 201 auto& Op = Instr.getOperand(1); 211 auto Op = Instr.getOperand(0); 212 Instr.clear(); 213 Instr.addOperand(MCOperand::createReg(BPF::R6)); 214 Instr [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXProxyRegErasure.cpp | 56 void replaceRegisterUsage(MachineInstr &Instr, MachineOperand &From, 109 void NVPTXProxyRegErasure::replaceRegisterUsage(MachineInstr &Instr, argument 112 for (auto &Op : Instr.uses()) {
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H A D | NVPTXImageOptimizer.cpp | 64 Instruction &Instr = *I; local 72 Changed |= replaceIsTypePSampler(Instr); 75 Changed |= replaceIsTypePSurface(Instr); 78 Changed |= replaceIsTypePTexture(Instr);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64PromoteConstant.cpp | 272 static bool shouldConvertUse(const Constant *Cst, const Instruction *Instr, 276 if (isa<const ShuffleVectorInst>(Instr) && OpIdx == 2) 280 if (isa<const ExtractValueInst>(Instr) && OpIdx > 0) 284 if (isa<const InsertValueInst>(Instr) && OpIdx > 1) 287 if (isa<const AllocaInst>(Instr) && OpIdx > 0) 291 if (isa<const LoadInst>(Instr) && OpIdx > 0) 295 if (isa<const StoreInst>(Instr) && OpIdx > 1) 299 if (isa<const GetElementPtrInst>(Instr) && OpIdx > 0) 304 if (isa<const LandingPadInst>(Instr)) 308 if (isa<const SwitchInst>(Instr)) [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | VectorUtils.h | 588 InterleaveGroup(InstTy *Instr, int32_t Stride, Align Alignment) argument 589 : Alignment(Alignment), InsertPos(Instr) { 594 Members[0] = Instr; 606 /// Try to insert a new member \p Instr with index \p Index and 611 bool insertMember(InstTy *Instr, int32_t Index, Align NewAlign) { 644 Members[Key] = Instr; 662 uint32_t getIndex(const InstTy *Instr) const { 664 if (I.second == Instr) 765 /// Check if \p Instr belongs to any interleave group. 766 bool isInterleaved(Instruction *Instr) cons 848 createInterleaveGroup(Instruction *Instr, int Stride, Align Alignment) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | RegBankSelect.h | 206 MachineInstr &Instr; member in class:llvm::RegBankSelect::InstrInsertPoint 208 /// Does the insertion point is before or after Instr. 215 return Instr; 216 return Instr.getNextNode() ? *Instr.getNextNode() 217 : Instr.getParent()->end(); 221 return *Instr.getParent(); 225 /// Create an insertion point before (\p Before=true) or after \p Instr. 226 InstrInsertPoint(MachineInstr &Instr, bool Before = true);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | CorrelatedValuePropagation.cpp | 616 static bool processUDivOrURem(BinaryOperator *Instr, LazyValueInfo *LVI) { argument 617 assert(Instr->getOpcode() == Instruction::UDiv || 618 Instr->getOpcode() == Instruction::URem); 619 if (Instr->getType()->isVectorTy()) 622 // Find the smallest power of two bitwidth that's sufficient to hold Instr's 624 auto OrigWidth = Instr->getType()->getIntegerBitWidth(); 626 for (Value *Operand : Instr->operands()) { 628 LVI->getConstantRange(Operand, Instr->getParent())); 639 IRBuilder<> B{Instr}; 640 auto *TruncTy = Type::getIntNTy(Instr [all...] |
H A D | GuardWidening.cpp | 131 /// Try to eliminate instruction \p Instr by widening it into an earlier 136 Instruction *Instr, const df_iterator<DomTreeNode *> &DFSI, 328 Instruction *Instr, const df_iterator<DomTreeNode *> &DFSI, 334 if (isa<ConstantInt>(getCondition(Instr))) 350 auto E = Instr->getParent() == CurBB 351 ? std::find(GuardsInCurBB.begin(), GuardsInCurBB.end(), Instr) 368 assert((i == (e - 1)) == (Instr->getParent() == CurBB) && "Bad DFS?"); 371 auto Score = computeWideningScore(Instr, Candidate, InvertCondition); 372 LLVM_DEBUG(dbgs() << "Score between " << *getCondition(Instr) 383 LLVM_DEBUG(dbgs() << "Did not eliminate guard " << *Instr << "\ 327 eliminateInstrViaWidening( Instruction *Instr, const df_iterator<DomTreeNode *> &DFSI, const DenseMap<BasicBlock *, SmallVector<Instruction *, 8>> & GuardsInBlock, bool InvertCondition) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreLowerThreadLocal.cpp | 78 createReplacementInstr(ConstantExpr *CE, Instruction *Instr) { argument 79 IRBuilder<NoFolder> Builder(Instr); 146 } else if (Instruction *Instr = dyn_cast<Instruction>(WU)) { 147 Instruction *NewInst = createReplacementInstr(CE, Instr); 148 Instr->replaceUsesOfWith(CE, NewInst);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
H A D | MachO_arm64.cpp | 291 uint32_t Instr = *(const ulittle32_t *)FixupContent; 292 if ((Instr & 0x7fffffff) != 0x14000000) 326 uint32_t Instr = *(const ulittle32_t *)FixupContent; 327 if ((Instr & 0xffffffe0) != 0x90000000) 345 uint32_t Instr = *(const ulittle32_t *)FixupContent; 346 if ((Instr & 0xfffffc00) != 0xf9400000) 520 static unsigned getPageOffset12Shift(uint32_t Instr) { argument 525 if ((Instr & LDRLiteralMask) == 0x39400000) 526 return Instr >> 30; 530 if ((Instr [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
H A D | DWARFDebugFrame.cpp | 225 bool IsEH, const Instruction &Instr, 228 uint8_t Opcode = Instr.Opcode; 274 assert(Instr.Expression && "missing DWARFExpression object"); 276 Instr.Expression->print(OS, MRI, nullptr, IsEH); 283 for (const auto &Instr : Instructions) { 284 uint8_t Opcode = Instr.Opcode; 289 for (unsigned i = 0; i < Instr.Ops.size(); ++i) 290 printOperand(OS, MRI, IsEH, Instr, i, Instr.Ops[i]); 224 printOperand(raw_ostream &OS, const MCRegisterInfo *MRI, bool IsEH, const Instruction &Instr, unsigned OperandIdx, uint64_t Operand) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
H A D | ARCDisassembler.cpp | 43 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, 296 DecodeStatus ARCDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, 321 decodeInstruction(DecoderTable64, Instr, Insn64, Address, this, STI); 333 return decodeInstruction(DecoderTable32, Instr, Insn32, Address, this, STI); 341 decodeInstruction(DecoderTable48, Instr, Insn48, Address, this, STI); 356 return decodeInstruction(DecoderTable16, Instr, Insn16, Address, this, STI);
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