Lines Matching refs:Instr
55 MachineInstr &Instr,
97 static ARMCC::CondCodes GetCondCode(MachineInstr &Instr) {
98 assert(IsVCMP(Instr.getOpcode()) && "Inst must be a VCMP");
99 return ARMCC::CondCodes(Instr.getOperand(3).getImm());
129 // Returns true if Instr writes to VCCR.
130 static bool IsWritingToVCCR(MachineInstr &Instr) {
131 if (Instr.getNumOperands() == 0)
133 MachineOperand &Dst = Instr.getOperand(0);
139 MachineRegisterInfo &RegInfo = Instr.getMF()->getRegInfo();
145 // <Instr that uses %A ('User' Operand)>
148 // <Instr that uses %K ('User' Operand)>
153 MachineBasicBlock &MBB, MachineInstr &Instr, MachineOperand &User,
158 BuildMI(MBB, &Instr, Instr.getDebugLoc(), TII->get(ARM::MVE_VPNOT))
379 for (MachineInstr &Instr : MBB.instrs()) {
381 if (MachineOperand *MO = Instr.findRegisterUseOperand(
390 if (getVPTInstrPredicate(Instr) != ARMVCC::None)
394 if (!IsVCMP(Instr.getOpcode())) {
396 if (IsWritingToVCCR(Instr))
401 if (!PrevVCMP || !IsVPNOTEquivalent(Instr, *PrevVCMP)) {
402 PrevVCMP = &Instr;
412 BuildMI(MBB, &Instr, Instr.getDebugLoc(), TII->get(ARM::MVE_VPNOT))
413 .add(Instr.getOperand(0))
418 Instr.dump());
427 DeadInstructions.push_back(&Instr);