Searched refs:InRegs (Results 1 - 9 of 9) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.h402 std::vector<int> checkRegUsageImpact(std::set<unsigned> &InRegs,
469 std::set<unsigned> InRegs; local
471 InRegs.insert(RegMaskPair.RegUnit);
473 return InRegs;
H A DSIMachineScheduler.cpp1502 std::set<unsigned> InRegs = DAG->getInRegs(); local
1503 addLiveRegs(InRegs);
1740 SIScheduleBlockScheduler::checkRegUsageImpact(std::set<unsigned> &InRegs, argument
1745 for (unsigned Reg : InRegs) {
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DFastISel.h97 SmallVector<Register, 4> InRegs; member in struct:llvm::FastISel::CallLoweringInfo
196 InRegs.clear();
/freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DTargetInfo.cpp3981 llvm::Value *InRegs = nullptr;
3987 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
3988 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
3997 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
4003 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
5899 llvm::Value *InRegs = nullptr;
5900 InRegs
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1036 for (auto Reg : CLI.InRegs)
1047 MIB->setPhysRegsDeadExcept(CLI.InRegs, TRI);
1261 CLI.Call->setPhysRegsDeadExcept(CLI.InRegs, TRI);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3176 auto &InRegs = CLI.InRegs; local
3571 InRegs.push_back(VA.getLocReg());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1304 CLI.InRegs.push_back(RVLocs[0].getLocReg());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1544 CLI.InRegs.push_back(SourcePhysReg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3180 CLI.InRegs.push_back(RVLocs[0].getLocReg());

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