Searched refs:AddRHS (Results 1 - 5 of 5) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 1780 Value *AddLHS, *AddRHS;
1781 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS));
1785 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS))
1786 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS);
1790 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS))
1791 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS);
1811 (m_One().match(AddLHS) || m_One().match(AddRHS)))
1812 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS);
1816 (m_One().match(AddLHS) || m_One().match(AddRHS)))
1817 return L.match(AddLHS) && R.match(AddRHS)
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 137 const APInt& AddRHS = OpRHS->getValue(); local
140 if ((AddRHS & (AndRHSV - 1)).isNullValue()) {
145 if ((AddRHS & AndRHSV).isNullValue()) { // Bit is not set, noop
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| H A D | InstructionCombining.cpp | 2805 ConstantInt *AddRHS; local
2806 if (match(Cond, m_Add(m_Value(Op0), m_ConstantInt(AddRHS)))) {
2809 Constant *NewCase = ConstantExpr::getSub(Case.getCaseValue(), AddRHS);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 10041 SDValue AddRHS = RHS; local
10048 AddRHS = DAG.getZExtOrTrunc(AddRHS, SL, MVT::i64);
10049 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false);
10055 AddRHS = DAG.getSExtOrTrunc(AddRHS, SL, MVT::i64);
10056 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 3758 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1));
3759 if (!AddRHS || AddRHS->getNumOperands() != 2 ||
3760 !AddRHS->getOperand(0)->isAllOnesValue())
3763 return AddRHS->getOperand(1);
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