Searched refs:nlm_write_nae_reg (Results 1 - 7 of 7) sorted by relevance

/freebsd-12-stable/sys/mips/nlm/dev/net/
H A Dsgmii.c56 nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF1), data1);
61 nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF2), data2);
65 nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF1), data1);
68 nlm_write_nae_reg(nae_base, SGMII_MAX_FRAME(block, port), mtu);
119 nlm_write_nae_reg(nae_base,
136 nlm_write_nae_reg(nae_base, SGMII_MAC_CONF1(nblock, iface), mac_cfg1);
137 nlm_write_nae_reg(nae_base, SGMII_MAC_CONF2(nblock, iface), mac_cfg2);
138 nlm_write_nae_reg(nae_base, SGMII_NET_IFACE_CTRL(nblock, iface),
161 nlm_write_nae_reg(base,
167 nlm_write_nae_reg(bas
[all...]
H A Dmdio.c66 nlm_write_nae_reg(nae_base,
71 nlm_write_nae_reg(nae_base,
76 nlm_write_nae_reg(nae_base,
86 nlm_write_nae_reg(nae_base,
116 nlm_write_nae_reg(nae_base,
122 nlm_write_nae_reg(nae_base,
126 nlm_write_nae_reg(nae_base,
130 nlm_write_nae_reg(nae_base,
140 nlm_write_nae_reg(nae_base,
157 nlm_write_nae_reg(nae_bas
[all...]
H A Dnae.c55 nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP, fifo_mask);
60 nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP, 0);
75 nlm_write_nae_reg(nae_base, NAE_PARSER_SEQ_FIFO_CFG, val);
106 nlm_write_nae_reg(nae_base,
134 nlm_write_nae_reg(nae_base, NAE_EGR_NIOR_CAL_LEN_REG, tx_slots - 1);
142 nlm_write_nae_reg(nae_base,
163 nlm_write_nae_reg(nae_base, NAE_FREE_IN_FIFO_CFG, value);
219 nlm_write_nae_reg(nae_base, NAE_POE_CLASS_SETUP_CFG, val);
235 nlm_write_nae_reg(nae_base, NAE_VFBID_DESTMAP_CMD, val);
242 nlm_write_nae_reg(nae_bas
[all...]
H A Dxaui.c76 nlm_write_nae_reg(nae_base,
92 nlm_write_nae_reg(nae_base,
152 nlm_write_nae_reg(base, XAUI_MAC_FILTER_CFG(nblock), val);
159 nlm_write_nae_reg(base,
166 nlm_write_nae_reg(base,
171 nlm_write_nae_reg(base,
174 nlm_write_nae_reg(base,
194 nlm_write_nae_reg(nae_base,
207 nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock), val);
211 nlm_write_nae_reg(nae_bas
[all...]
H A Dxlpge.c263 nlm_write_nae_reg(sc->base, NAE_FREE_IN_FIFO_CFG,
281 nlm_write_nae_reg(sc->base, NAE_TX_IF_BURSTMAX_CMD, data);
285 nlm_write_nae_reg(sc->base, NAE_TX_DDR_ACTVLIST_CMD, data);
294 nlm_write_nae_reg(sc->base, NAE_DMA_TX_CREDIT_TH, data);
297 nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD1,
302 nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD0, data | 1);
303 nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD0, data);
415 nlm_write_nae_reg(nae_base, NAE_LANE_CFG_SOFTRESET, 0x0);
420 nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val);
425 nlm_write_nae_reg(nae_bas
[all...]
/freebsd-12-stable/sys/mips/nlm/hal/
H A Ducore_loader.h72 nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG,
78 nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
90 nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG,
96 nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
113 nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG,
135 nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
139 nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg);
H A Dnae.h484 #define nlm_write_nae_reg(b, r, v) nlm_write_reg_xkphys(b, r, v) macro

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