Searched refs:isShiftedInt (Results 1 - 8 of 8) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.h193 return isShiftedInt<N, S>(minConstant(MCI, Index));
H A DHexagonMCDuplexInfo.cpp552 if (!isShiftedInt<7, 0>(Value))
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp534 Ok = isShiftedInt<12, 1>(Imm);
540 Ok = isShiftedInt<20, 1>(Imm);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp302 // modifiers and isShiftedInt<N-1, 1>(Op).
313 IsValid = isShiftedInt<N - 1, 1>(Imm);
558 return IsConstantImm && (Imm != 0) && isShiftedInt<6, 4>(Imm) &&
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Support/
H A DMathExtras.h351 constexpr inline bool isShiftedInt(int64_t x) { function in namespace:llvm
353 N > 0, "isShiftedInt<0> doesn't make sense (refers to a 0-bit number.");
354 static_assert(N + S <= 64, "isShiftedInt<N, S> with N + S > 64 is too wide.");
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp1330 isShiftedInt<Bits, ShiftAmount>(getConstantMemOff())))
1334 return IsReloc && isShiftedInt<Bits, ShiftAmount>(Res.getConstant());
1381 isShiftedInt<Bits, ShiftLeftAmount>(getConstantImm()))
1389 return Success && isShiftedInt<Bits, ShiftLeftAmount>(Res.getConstant());
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp3901 isShiftedInt<6,3>(MI.getOperand(1).getImm()))
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp14787 if (isShiftedInt<16, 16>(Value))

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