/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVTargetTransformInfo.cpp | 55 case Instruction::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUAtomicOptimizer.cpp | 126 case AtomicRMWInst::Xor: 191 Op = AtomicRMWInst::Xor; 261 case AtomicRMWInst::Xor: 262 return B.CreateBinOp(Instruction::Xor, LHS, RHS); 394 case AtomicRMWInst::Xor: 542 case AtomicRMWInst::Xor: 636 case AtomicRMWInst::Xor:
|
H A D | SILowerControlFlow.cpp | 232 MachineInstr *Xor = nullptr; local 234 Xor = 238 setImpSCCDefDead(*Xor, ImpDefSCC.isDead()); 264 LIS->InsertMachineInstrInMaps(*Xor); 320 MachineInstr *Xor = local 340 LIS->InsertMachineInstrInMaps(*Xor);
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | TruncInstCombine.cpp | 55 case Instruction::Xor: 117 case Instruction::Xor: { 348 case Instruction::Xor: {
|
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | Instruction.h | 176 return Opcode == And || Opcode == Or || Opcode == Xor; 483 /// In LLVM, the Add, Mul, And, Or, and Xor operators are associative. 487 return Opcode == And || Opcode == Or || Opcode == Xor || 503 case And: case Or: case Xor: 528 /// In LLVM, the Xor operator is nilpotent. 532 return Opcode == Xor;
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | ExpandReductions.cpp | 46 return Instruction::Xor;
|
H A D | AtomicExpandPass.cpp | 319 (Op == AtomicRMWInst::Or || Op == AtomicRMWInst::Xor || 542 case AtomicRMWInst::Xor: 702 case AtomicRMWInst::Xor: 704 llvm_unreachable("Or/Xor/And handled by widenPartwordAtomicRMW"); 780 assert((Op == AtomicRMWInst::Or || Op == AtomicRMWInst::Xor || 1327 case AtomicRMWInst::Xor: 1554 case AtomicRMWInst::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAtomicRMW.cpp | 42 case AtomicRMWInst::Xor:
|
H A D | InstCombineAndOrXor.cpp | 829 APInt Xor = *C1 ^ *C2; local 830 if (Xor.isPowerOf2()) { 837 Value *Or = Builder.CreateOr(X, ConstantInt::get(X->getType(), Xor)); 1575 if (LogicOpc == Instruction::Xor) 1740 if (Instruction *Xor = foldAndToXor(I, Builder)) 1741 return Xor; 1819 case Instruction::Xor: 2465 if (Instruction *Xor = foldOrToXor(I, Builder)) 2466 return Xor; 2629 B->getOpcode() == Instruction::Xor)) { [all...] |
H A D | InstCombineShifts.cpp | 517 case Instruction::Xor: 634 case Instruction::Xor: 676 case Instruction::Xor: 768 case Instruction::Xor: {
|
H A D | InstCombineCompares.cpp | 1562 BinaryOperator *Xor, 1564 Value *X = Xor->getOperand(0); 1565 Value *Y = Xor->getOperand(1); 1577 // the operation, just stop using the Xor. 1580 Worklist.Add(Xor); 1593 if (Xor->hasOneUse()) { 2826 case Instruction::Xor: 2952 case Instruction::Xor: 3968 case Instruction::Xor: { 3982 if (BO0->getOpcode() == Instruction::Xor 1561 foldICmpXorConstant(ICmpInst &Cmp, BinaryOperator *Xor, const APInt &C) argument 4175 Value *Xor = Builder.CreateXor(C, NC); local 4253 Value *Xor = Builder.CreateXor(A, B, I.getName() + ".unshifted"); local 4265 Value *Xor = Builder.CreateXor(A, B, I.getName() + ".unshifted"); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LowerExpectIntrinsic.cpp | 133 if (!BinOp || BinOp->getOpcode() != Instruction::Xor) 149 case Instruction::Xor:
|
H A D | LowerAtomic.cpp | 71 case AtomicRMWInst::Xor:
|
H A D | SpeculativeExecution.cpp | 225 case Instruction::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTDC.cpp | 105 LI->getOpcode() == Instruction::Xor)) { 303 case Instruction::Xor:
|
H A D | SystemZTargetTransformInfo.cpp | 127 case Instruction::Xor: 471 if (Opcode == Instruction::Xor) { 477 I->getOpcode() == Instruction::Xor)) 484 if (I->hasOneUse() && I->getOpcode() == Instruction::Xor) 494 if (Opcode == Instruction::Xor && ScalarBits == 1) { 965 case Instruction::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonLoopIdiomRecognition.cpp | 987 case Instruction::Xor: 1239 case Instruction::Xor: 1274 case Instruction::Xor: 1577 case Instruction::Xor: 1599 case Instruction::Xor: 1612 if (I->getOpcode() != Instruction::Xor) 1695 case Instruction::Xor: 1713 case Instruction::Xor: 1740 Instruction *Xor = dyn_cast<Instruction>(I->getOperand(0)); 1742 if (!Xor || !C [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCExpr.h | 448 Xor ///< Bitwise exclusive or. enumerator in enum:llvm::MCBinaryExpr::Opcode 559 return create(Xor, LHS, RHS, Ctx);
|
/freebsd-12-stable/contrib/llvm-project/clang/include/clang/AST/ |
H A D | StmtVisitor.h | 135 BINOP_FALLBACK(And) BINOP_FALLBACK(Xor) BINOP_FALLBACK(Or)
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreLowerThreadLocal.cpp | 103 case Instruction::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/FuzzMutate/ |
H A D | Operations.cpp | 31 Ops.push_back(binOpDescriptor(1, Instruction::Xor)); 109 case Instruction::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 2920 SDValue Xor = IsRHSZero ? LHS : local 2923 SDValue(CurDAG->getMachineNode(PPC::CNTLZW, dl, MVT::i32, Xor), 0); 2932 SDValue Xor = IsRHSZero ? LHS : local 2935 SDValue(CurDAG->getMachineNode(PPC::CNTLZW, dl, MVT::i32, Xor), 0); 3114 SDValue Xor = IsRHSZero ? LHS : local 3117 SDValue(CurDAG->getMachineNode(PPC::CNTLZW, dl, MVT::i32, Xor), 0); 3265 SDValue Xor = IsRHSZero ? LHS : local 3268 SDValue(CurDAG->getMachineNode(PPC::CNTLZD, dl, MVT::i64, Xor), 0); 3278 SDValue Xor = IsRHSZero ? LHS : local 3282 Xor, 3437 SDValue Xor = IsRHSZero ? LHS : local [all...] |
/freebsd-12-stable/contrib/llvm-project/lldb/source/Expression/ |
H A D | IRInterpreter.cpp | 588 case Instruction::Xor: 705 case Instruction::Xor: { 788 case Instruction::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | DemandedBits.cpp | 260 case Instruction::Xor:
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | BypassSlowDivision.cpp | 196 case Instruction::Xor:
|