Searched refs:WRITE_OFFSET32 (Results 1 - 5 of 5) sorted by relevance

/freebsd-12-stable/sys/dev/qlxgb/
H A Dqla_misc.c233 WRITE_OFFSET32(ha, Q8_CRB_WINDOW_2M, offset);
248 WRITE_OFFSET32(ha, ((addr & 0xFFFF) | 0x1E0000), *val);
266 WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_ADDR_LO, (uint32_t)addr);
267 WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_ADDR_HI, (uint32_t)(addr >> 32));
270 WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_LO, val->data_lo);
271 WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_HI, val->data_hi);
272 WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_ULO, val->data_ulo);
273 WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_UHI, val->data_uhi);
274 WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_CTRL, 0x07); /* Write */
276 WRITE_OFFSET32(h
[all...]
H A Dqla_inline.h43 WRITE_OFFSET32(ha, Q8_ASIC_RESET, 0xFFFFFFFF);
75 WRITE_OFFSET32(ha, id_reg, id_val);
H A Dqla_ioctl.c106 WRITE_OFFSET32(ha, rv->reg, rv->val);
H A Dqla_reg.h248 #define WRITE_OFFSET32(ha, off, val)\ macro
H A Dqla_hw.c432 WRITE_OFFSET32(ha, Q8_NX_CDRP_SIGNATURE, signature);
434 WRITE_OFFSET32(ha, Q8_NX_CDRP_ARG1, (cdrp->cmd_arg1));
435 WRITE_OFFSET32(ha, Q8_NX_CDRP_ARG2, (cdrp->cmd_arg2));
436 WRITE_OFFSET32(ha, Q8_NX_CDRP_ARG3, (cdrp->cmd_arg3));
438 WRITE_OFFSET32(ha, Q8_NX_CDRP_CMD_RSP, cdrp->cmd);

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