Searched refs:TCSR_DIV_256 (Results 1 - 2 of 2) sorted by relevance
| /freebsd-12-stable/sys/mips/ingenic/ | ||
| H A D | jz4780_machdep.c | 103 writereg(JZ_TCU_BASE + JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256); |
| H A D | jz4780_regs.h | 65 #define TCSR_DIV_256 0x20 macro |
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