/freebsd-12-stable/bin/sh/tests/ |
H A D | functional_test.sh | 35 export SH=$(atf_config_get bin.sh.test_shell /bin/sh) 42 atf_check -s exit:${tc##*.} ${err_flag} ${out_flag} ${SH} "${SRCDIR}/${tc}"
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/freebsd-12-stable/contrib/ntp/scripts/deprecated/ |
H A D | html2man.in | 79 print MANOUT ".SH NAME\n"; 86 print MANOUT "$name\n.SH \\ \n\n"; 130 print MANOUT "\n\n.SH $text\n"; 142 print MANOUT "\n.SH AUTHOR\n$text\n"; 230 print MANOUT "\n.SH SEE ALSO\n\n";
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/freebsd-12-stable/contrib/libucl/tests/ |
H A D | Makefile.am | 10 TESTS_ENVIRONMENT = $(SH) \
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCInstPrinter.cpp | 97 unsigned char SH = MI->getOperand(2).getImm(); local 101 if (SH <= 31 && MB == 0 && ME == (31-SH)) { 104 if (SH <= 31 && MB == (32-SH) && ME == 31) { 106 SH = 32-SH; 112 O << ", " << (unsigned int)SH; 131 unsigned char SH = MI->getOperand(2).getImm(); local 133 // rldicr RA, RS, SH, 6 [all...] |
/freebsd-12-stable/contrib/netbsd-tests/share/mk/ |
H A D | t_test.sh | 31 # The first argument must be one of C, CXX or SH, and this indicates the 108 one_test SH t_fake
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/freebsd-12-stable/contrib/dma/ |
H A D | Makefile | 11 SH?= sh macro 13 version= $(shell ${SH} get-version.sh) 14 debversion= $(shell ${SH} get-version.sh | sed -Ee 's/^v//;s/[.]([[:digit:]]+)[.](g[[:xdigit:]]+)$$/+\1+\2/')
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/freebsd-12-stable/contrib/sendmail/contrib/ |
H A D | expn.pl | 1234 .SH NAME 1236 .SH SYNOPSIS 1245 .SH DESCRIPTION 1256 .SH OPTIONS 1308 .SH ENVIRONMENT 1310 .SH FILES 1315 .SH SEE ALSO 1320 .SH BUGS 1349 .SH CREDITS 1354 .SH AVAILABILIT [all...] |
/freebsd-12-stable/usr.sbin/makefs/cd9660/ |
H A D | cd9660_eltorito.h | 135 boot_catalog_section_header SH; member in union:boot_catalog_entry::__anon17465
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H A D | cd9660_eltorito.c | 314 sh = &entry->entry_data.SH; 487 head->entry_data.SH.num_section_entries[0]++; 510 head->entry_data.SH.header_indicator[0] = ET_SECTION_HEADER_LAST;
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | ScalarEvolutionExpander.h | 207 Value *expandCodeFor(const SCEV *SH, Type *Ty, Instruction *I); 213 Value *expandCodeFor(const SCEV *SH, Type *Ty = nullptr);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsNaClELFStreamer.cpp | 236 case Mips::SH:
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 232 case RISCV::SH:
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H A D | RISCVMergeBaseOffset.cpp | 222 case RISCV::SH:
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H A D | RISCVInstrInfo.cpp | 71 case RISCV::SH:
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 192 unsigned &SH, unsigned &MB, unsigned &ME); 588 bool isShiftMask, unsigned &SH, 622 SH = Shift & 31; 729 unsigned Value, SH = 0; local 759 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value; 774 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value; 778 SH &= 31; 779 SDValue Ops[] = { Op0, Op1, getI32Imm(SH, dl), getI32Imm(MB, dl), 4380 unsigned Imm, Imm2, SH, MB, ME; local 4386 isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, M 587 isRotateAndMask(SDNode *N, unsigned Mask, bool isShiftMask, unsigned &SH, unsigned &MB, unsigned &ME) argument 4811 unsigned Imm, SH, MB, ME; local 4825 unsigned Imm, SH, MB, ME; local [all...] |
H A D | PPCInstrInfo.cpp | 1917 int64_t SH = MI->getOperand(2).getImm(); 1926 if (MB <= ME && MBInLoHWord == MEInLoHWord && SH == 0) { 1934 (ME - MB + 1 == SH) && (MB >= 16)) { 1938 Mask = ((1LLU << 32) - 1) & ~((1LLU << (32 - SH)) - 1); 2872 int64_t SH = MI.getOperand(2).getImm(); 2876 InVal = InVal.rotl(SH); 2896 int64_t SH = MI.getOperand(2).getImm(); 2900 InVal = InVal.rotl(SH); 3809 uint64_t SH = ShAmt == 0 ? 0 : RightShift ? 32 - ShAmt : ShAmt; 3812 replaceInstrOperandWithImm(MI, III.OpNoForForwarding, SH); [all...] |
/freebsd-12-stable/crypto/openssl/crypto/ |
H A D | mem_sec.c | 292 } SH; typedef in typeref:struct:sh_st 294 static SH sh;
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/freebsd-12-stable/contrib/binutils/opcodes/ |
H A D | ppc-opc.c | 411 /* The SH field in an X or M form instruction. */ 412 #define SH RSO + 1 415 #define EVUIMM SH 418 /* The SH field in an MD form instruction. This is split. */ 419 #define SH6 SH + 1 423 /* The SH field of the tlbwe instruction, which is optional. */ 541 /* SH field starting at bit position 16. */ 1137 /* The SH field in an MD form instruction. This is split. */ 1351 /* An M_MASK with the SH and ME fields fixed. */ 1361 /* An MD_MASK with the SH fiel 410 #define SH macro [all...] |
/freebsd-12-stable/sys/powerpc/powerpc/ |
H A D | db_disasm.c | 929 u_int SH; local 930 SH = extract_field(instr, 31 - 20, 5); 931 APP_PSTR("%d", SH);
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/freebsd-12-stable/contrib/binutils/gas/config/ |
H A D | tc-arm.c | 14974 tCE(and, 0000000, and, 3, (RR, oRR, SH), arit, t_arit3c), 14975 tC3(ands, 0100000, ands, 3, (RR, oRR, SH), arit, t_arit3c), 14976 tCE(eor, 0200000, eor, 3, (RR, oRR, SH), arit, t_arit3c), 14977 tC3(eors, 0300000, eors, 3, (RR, oRR, SH), arit, t_arit3c), 14978 tCE(sub, 0400000, sub, 3, (RR, oRR, SH), arit, t_add_sub), 14979 tC3(subs, 0500000, subs, 3, (RR, oRR, SH), arit, t_add_sub), 14982 tCE(adc, 0a00000, adc, 3, (RR, oRR, SH), arit, t_arit3c), 14983 tC3(adcs, 0b00000, adcs, 3, (RR, oRR, SH), arit, t_arit3c), 14984 tCE(sbc, 0c00000, sbc, 3, (RR, oRR, SH), arit, t_arit3), 14985 tC3(sbcs, 0d00000, sbcs, 3, (RR, oRR, SH), ari [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonBitSimplify.cpp | 218 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH, 430 // For a REG_SEQUENCE, set SL to the low subregister and SH to the high 433 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH, 445 SH = I.getOperand(3); 449 SH = I.getOperand(1); 1684 BitTracker::RegisterRef SL, SH; 1685 if (HBS::parseRegSequence(MI, SL, SH, MRI)) { 1690 Changed |= HBS::replaceSubWithSub(RD.Reg, SubHi, SH.Reg, SH.Sub, MRI);
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H A D | HexagonConstExtenders.cpp | 298 ExtExpr(Register RS, bool NG, unsigned SH) : Rs(RS), S(SH), Neg(NG) {} argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ScalarEvolutionExpander.cpp | 1761 Value *SCEVExpander::expandCodeFor(const SCEV *SH, Type *Ty, argument 1764 return expandCodeFor(SH, Ty); 1767 Value *SCEVExpander::expandCodeFor(const SCEV *SH, Type *Ty) { argument 1769 Value *V = expand(SH); 1771 assert(SE.getTypeSizeInBits(Ty) == SE.getTypeSizeInBits(SH->getType()) &&
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 169 // Attempts to reduce SB/SH instruction into SB16/SH16, 256 {RT_OneInstr, OpCodes(Mips::SH, Mips::SH16_MM), ReduceSXtoSX16,
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H A D | MipsInstructionSelector.cpp | 195 return Mips::SH;
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