Searched refs:SEH (Results 1 - 5 of 5) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp88 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I8_POSTRA ? Mips::SEB : Mips::SEH;
313 unsigned SEOp = Mips::SEH;
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
H A DMipsFastISel.cpp1860 emitInst(Mips::SEH, DestReg).addReg(SrcReg);
H A DMipsISelLowering.cpp1628 BuildMI(BB, DL, TII->get(Mips::SEH), DstReg).addReg(SrcReg);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp80 unsigned SEH = MRI->getEncodingValue(Reg); local
81 MRI->mapLLVMRegToSEHReg(Reg, SEH);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp501 // Given a load or a store instruction, generate an appropriate unwinding SEH
518 llvm_unreachable("No SEH Opcode for this instruction");
622 // Fix up the SEH opcode associated with the save/restore instruction.
629 llvm_unreachable("Fix the offset in the SEH instruction");
706 // Get rid of the SEH code associated with the old instruction.
708 auto SEH = std::next(MBBI); local
709 if (AArch64InstrInfo::isSEHInstruction(*SEH))
710 SEH->eraseFromParent();
733 // Generate a new SEH code that corresponds to the new instruction.
799 "Expecting a SEH instructio
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