/freebsd-12-stable/sys/contrib/dev/acpica/compiler/ |
H A D | asltransform.c | 626 ACPI_PARSE_OBJECT *NewOp; local 683 NewOp = TrCreateLeafOp (PARSEOP_ELSE); 684 NewOp->Asl.Parent = Conditional->Asl.Parent; 685 TrAmlInitLineNumbers (NewOp, NewOp->Asl.Parent); 689 TrAmlInsertPeer (Conditional, NewOp); 690 CurrentParentNode = NewOp; 712 NewOp = NewOp2; 715 NewOp->Asl.Next = NewOp2; 718 NewOp [all...] |
H A D | aslprintf.c | 262 ACPI_PARSE_OBJECT *NewOp; local 299 NewOp = TrAllocateOp (PARSEOP_STRING_LITERAL); 300 NewOp->Asl.Value.String = NewString; 301 NewOp->Asl.AmlOpcode = AML_STRING_OP; 302 NewOp->Asl.AcpiBtype = ACPI_BTYPE_STRING; 303 NewOp->Asl.LogicalLineNumber = Op->Asl.LogicalLineNumber; 305 OpcCreateConcatenateNode(Op, NewOp); 360 NewOp = TrAllocateOp (PARSEOP_STRING_LITERAL); 361 NewOp->Asl.Value.String = ""; 362 NewOp [all...] |
H A D | aslopcodes.c | 788 ACPI_PARSE_OBJECT *NewOp; local 816 NewOp = TrAllocateOp (PARSEOP_INTEGER); 818 NewOp->Asl.AmlOpcode = AML_BYTE_OP; 819 NewOp->Asl.Value.Integer = 16; 820 NewOp->Asl.Parent = Op; 822 Op->Asl.Child = NewOp; 823 Op = NewOp; 827 NewOp = TrAllocateOp (PARSEOP_RAW_DATA); 828 NewOp->Asl.AmlOpcode = AML_RAW_DATA_BUFFER; 829 NewOp [all...] |
H A D | aslpld.c | 202 ACPI_PARSE_OBJECT *NewOp; local 690 NewOp = TrAllocateOp (PARSEOP_INTEGER); 692 NewOp->Asl.AmlOpcode = AML_BYTE_OP; 693 NewOp->Asl.Value.Integer = 20; 694 NewOp->Asl.Parent = Op; 696 Op->Asl.Child = NewOp; 697 Op = NewOp; 701 NewOp = TrAllocateOp (PARSEOP_RAW_DATA); 702 NewOp->Asl.AmlOpcode = AML_RAW_DATA_BUFFER; 703 NewOp [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 251 int NewOp = QII->getInvertedPredicatedOpcode(MI.getOpcode()); local 252 MI.setDesc(QII->get(NewOp)); 262 unsigned NewOp = 0; local 268 NewOp = Op; 271 NewOp = Hexagon::C2_muxir; 274 NewOp = Hexagon::C2_muxri; 277 if (NewOp) { 281 QII->get(NewOp), MI.getOperand(0).getReg()) 288 } // if (NewOp)
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H A D | HexagonInstrInfo.cpp | 3674 int NewOp = MI.getOpcode(); local 3675 if (isPredicated(NewOp) && isPredicatedNew(NewOp)) { // Get predicate old form 3676 NewOp = Hexagon::getPredOldOpcode(NewOp); 3681 switch (NewOp) { 3683 NewOp = Hexagon::J2_jumpt; 3686 NewOp = Hexagon::J2_jumpf; 3689 NewOp = Hexagon::J2_jumprt; 3692 NewOp [all...] |
H A D | HexagonISelLoweringHVX.cpp | 1504 SDValue NewOp; local 1509 NewOp = DAG.getMergeValues( 1518 NewOp = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store0, Store1); 1521 return NewOp;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
H A D | ValueList.cpp | 184 Value *NewOp; local 187 NewOp = *I; 190 NewOp = RealVal; 197 NewOp = operator[](It->second); 200 NewOps.push_back(cast<Constant>(NewOp));
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VPlanSLP.cpp | 426 VPInstruction *NewOp = buildGraph(Ops.second); local 427 Ops.first->replaceAllUsesWith(NewOp); 430 CombinedOperands[i] = NewOp; 432 Ops.first = NewOp;
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/freebsd-12-stable/sys/contrib/dev/acpica/components/parser/ |
H A D | psobject.c | 443 * NewOp - Returned Op 455 ACPI_PARSE_OBJECT **NewOp) 516 *NewOp = NamedOp; 574 WalkState->Op = *NewOp = Op; 452 AcpiPsCreateOp( ACPI_WALK_STATE *WalkState, UINT8 *AmlOpStart, ACPI_PARSE_OBJECT **NewOp) argument
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/freebsd-12-stable/sys/contrib/dev/acpica/include/ |
H A D | acparser.h | 264 ACPI_PARSE_OBJECT **NewOp);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | CorrelatedValuePropagation.cpp | 501 Value *NewOp = local 503 setDeducedOverflowingFlags(NewOp, Opcode, NSW, NUW); 509 Value *NewI = B.CreateInsertValue(Struct, NewOp, 0); 515 if (auto *BO = dyn_cast<BinaryOperator>(NewOp))
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H A D | SeparateConstOffsetFromGEP.cpp | 708 BinaryOperator::BinaryOps NewOp = BO->getOpcode(); local 723 NewOp = Instruction::Add; 728 NewBO = BinaryOperator::Create(NewOp, NextInChain, TheOther, "", IP); 730 NewBO = BinaryOperator::Create(NewOp, TheOther, NextInChain, "", IP);
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H A D | Reassociate.cpp | 758 BinaryOperator *NewOp; local 761 NewOp = BinaryOperator::Create(Instruction::BinaryOps(Opcode), 763 if (NewOp->getType()->isFPOrFPVectorTy()) 764 NewOp->setFastMathFlags(I->getFastMathFlags()); 766 NewOp = NodesToRewrite.pop_back_val(); 770 Op->setOperand(0, NewOp); 775 Op = NewOp;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineMulDivRem.cpp | 196 Value *NewOp; local 199 if (match(&I, m_Mul(m_Shl(m_Value(NewOp), m_Constant(C2)), 205 BinaryOperator *BO = BinaryOperator::CreateMul(NewOp, Shl); 214 if (match(&I, m_Mul(m_Value(NewOp), m_Constant(C1)))) { 216 if (Constant *NewCst = getLogBase2(NewOp->getType(), C1)) { 217 BinaryOperator *Shl = BinaryOperator::CreateShl(NewOp, NewCst);
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H A D | InstCombineShifts.cpp | 896 Value *NewOp = Builder.CreateBinOp(TBO->getOpcode(), NewShift, local 898 return SelectInst::Create(Cond, NewOp, NewShift); 915 Value *NewOp = Builder.CreateBinOp(FBO->getOpcode(), NewShift, local 917 return SelectInst::Create(Cond, NewShift, NewOp);
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H A D | InstCombineAndOrXor.cpp | 1516 Value *NewOp = Builder.CreateBinOp(LogicOpc, X, TruncC); local 1517 return new ZExtInst(NewOp, DestTy); 1526 Value *NewOp = Builder.CreateBinOp(LogicOpc, X, TruncC); local 1527 return new SExtInst(NewOp, DestTy); 1569 Value *NewOp = Builder.CreateBinOp(LogicOpc, Cast0Src, Cast1Src, local 1571 return CastInst::Create(CastOpcode, NewOp, DestTy);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 7460 static SDValue tryAdvSIMDModImm64(unsigned NewOp, SDValue Op, SelectionDAG &DAG, argument 7471 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, 7481 static SDValue tryAdvSIMDModImm32(unsigned NewOp, SDValue Op, SelectionDAG &DAG, argument 7513 Mov = DAG.getNode(NewOp, dl, MovTy, *LHS, 7517 Mov = DAG.getNode(NewOp, dl, MovTy, 7529 static SDValue tryAdvSIMDModImm16(unsigned NewOp, SDValue Op, SelectionDAG &DAG, argument 7553 Mov = DAG.getNode(NewOp, dl, MovTy, *LHS, 7557 Mov = DAG.getNode(NewOp, dl, MovTy, 7569 static SDValue tryAdvSIMDModImm321s(unsigned NewOp, SDValue Op, argument 7589 SDValue Mov = DAG.getNode(NewOp, d 7600 tryAdvSIMDModImm8(unsigned NewOp, SDValue Op, SelectionDAG &DAG, const APInt &Bits) argument 7621 tryAdvSIMDModImmFP(unsigned NewOp, SDValue Op, SelectionDAG &DAG, const APInt &Bits) argument 7774 SDValue NewOp; local 7833 SDValue NewOp; local 10297 SDValue NewOp; local 11571 unsigned NewOp = IsLaneOp ? AArch64ISD::LD1LANEpost : AArch64ISD::LD1DUPpost; local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 139 SDValue NewOp = Ops[i]; local 140 Entry.Node = NewOp; 142 Entry.IsSExt = shouldSignExtendTypeInLibCall(NewOp.getValueType(), 522 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC); local 523 return TLO.CombineTo(Op, NewOp); 1048 SDValue NewOp = TLO.DAG.getVectorShuffle(VT, dl, Op0, Op1, ShuffleMask); local 1049 return TLO.CombineTo(Op, NewOp); 1105 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); local 1106 return TLO.CombineTo(Op, NewOp); 1154 SDValue NewOp local 1200 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); local 1881 SDValue NewOp = local 2004 SDValue NewOp = local 2022 SDValue NewOp = local 2042 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Neg1, Flags); local [all...] |
H A D | LegalizeFloatTypes.cpp | 227 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); local 229 NewOp.getValueType().getVectorElementType(), 230 NewOp, N->getOperand(1)); 2240 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); local 2241 EVT IVT = NewOp.getValueType().getVectorElementType(); 2245 NewOp, N->getOperand(1));
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H A D | FastISel.cpp | 2046 unsigned NewOp = createResultReg(RegClass); local 2048 TII.get(TargetOpcode::COPY), NewOp).addReg(Op); 2049 return NewOp;
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H A D | DAGCombiner.cpp | 1158 SDValue NewOp = PromoteOperand(Op, PVT, Replace); local 1159 if (!NewOp.getNode()) 1161 AddToWorklist(NewOp.getNode()); 1164 ReplaceLoadWithPromotedLoad(Op.getNode(), NewOp.getNode()); 1165 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, NewOp.getValueType(), NewOp, 1173 SDValue NewOp = PromoteOperand(Op, PVT, Replace); local 1174 if (!NewOp.getNode()) 1176 AddToWorklist(NewOp.getNode()); 1179 ReplaceLoadWithPromotedLoad(Op.getNode(), NewOp 2872 unsigned NewOp = Opcode == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY; local 16902 SDValue NewOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT, local 19690 SDValue NewOp = DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N), VT, local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | ScalarEvolution.h | 556 SmallVector<const SCEV *, 4> NewOp(Operands.begin(), Operands.end()); 557 return getAddRecExpr(NewOp, L, Flags);
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/freebsd-12-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGDecl.cpp | 1026 auto *NewOp = constWithPadding(CGM, isPattern, CurOp); local 1027 if (CurOp != NewOp) 1029 Values.push_back(NewOp);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 1455 auto NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSZext, RHSZext}); local 1460 {NewOp, MIRBuilder.buildConstant(WideTy, Mask.getZExtValue())}); 1461 // There is no overflow if the AndOp is the same as NewOp. 1462 MIRBuilder.buildICmp(CmpInst::ICMP_NE, MI.getOperand(1).getReg(), NewOp, 1464 // Now trunc the NewOp to the original result. 1465 MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), NewOp); 1501 // The correct result is NewOp - (Difference in widety and current ty). 4094 unsigned NewOp = MI.getOpcode() == TargetOpcode::G_FMINNUM ? local 4118 MIRBuilder.buildInstr(NewOp, {Dst}, {Src0, Src1}, MI.getFlags());
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