Searched refs:MCII (Results 1 - 25 of 75) sorted by relevance

123

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.h44 MCInstrInfo const &MCII; member in class:llvm::Hexagon::PacketIterator
51 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst);
52 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t);
80 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
85 bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI);
92 bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
99 MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst,
107 void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
111 unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI);
114 unsigned getAddrMode(MCInstrInfo const &MCII, MCIns
[all...]
H A DHexagonMCInstrInfo.cpp38 Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII, argument
40 : MCII(MCII), BundleCurrent(Inst.begin() +
44 Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII, argument
46 : MCII(MCII), BundleCurrent(Inst.end()), BundleEnd(Inst.end()),
62 if (HexagonMCInstrInfo::isDuplex(MCII, Inst)) {
87 MCInstrInfo const &MCII, MCInst &MCB,
91 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
95 new (Context) MCInst(HexagonMCInstrInfo::deriveExtender(MCII, MC
86 addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI) argument
102 bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI) argument
122 canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCB, HexagonMCChecker *Check) argument
159 deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst, MCOperand const &MO) argument
202 extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI) argument
209 getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI) argument
216 getAddrMode(MCInstrInfo const &MCII, MCInst const &MCI) argument
223 getDesc(MCInstrInfo const &MCII, MCInst const &MCI) argument
284 getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI) argument
291 getExtendableOperand(MCInstrInfo const &MCII, MCInst const &MCI) argument
302 getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI) argument
308 getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI) argument
314 isExtentSigned(MCInstrInfo const &MCII, MCInst const &MCI) argument
321 getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI) argument
332 getMinValue(MCInstrInfo const &MCII, MCInst const &MCI) argument
342 getName(MCInstrInfo const &MCII, MCInst const &MCI) argument
347 getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI) argument
353 getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI) argument
372 getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI) argument
379 getNewValueOperand2(MCInstrInfo const &MCII, MCInst const &MCI) argument
391 getType(MCInstrInfo const &MCII, MCInst const &MCI) argument
398 getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI) argument
409 getOtherReservedSlots(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI) argument
432 hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI) argument
461 hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI) argument
468 hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI) argument
493 isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI) argument
527 isCanon(MCInstrInfo const &MCII, MCInst const &MCI) argument
532 isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI) argument
537 isCofRelax1(MCInstrInfo const &MCII, MCInst const &MCI) argument
543 isCofRelax2(MCInstrInfo const &MCII, MCInst const &MCI) argument
549 isCompound(MCInstrInfo const &MCII, MCInst const &MCI) argument
554 isCVINew(MCInstrInfo const &MCII, MCInst const &MCI) argument
564 isDuplex(MCInstrInfo const &MCII, MCInst const &MCI) argument
568 isExtendable(MCInstrInfo const &MCII, MCInst const &MCI) argument
574 isExtended(MCInstrInfo const &MCII, MCInst const &MCI) argument
580 isFloat(MCInstrInfo const &MCII, MCInst const &MCI) argument
585 isHVX(MCInstrInfo const &MCII, MCInst const &MCI) argument
610 isNewValue(MCInstrInfo const &MCII, MCInst const &MCI) argument
617 isOpExtendable(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short O) argument
628 isPredicated(MCInstrInfo const &MCII, MCInst const &MCI) argument
634 isPrefix(MCInstrInfo const &MCII, MCInst const &MCI) argument
638 isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI) argument
645 isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI) argument
651 isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI) argument
663 isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI) argument
669 isRestrictSlot1AOK(MCInstrInfo const &MCII, MCInst const &MCI) argument
676 isRestrictNoSlot1Store(MCInstrInfo const &MCII, MCInst const &MCI) argument
684 isSolo(MCInstrInfo const &MCII, MCInst const &MCI) argument
755 isVector(MCInstrInfo const &MCII, MCInst const &MCI) argument
817 predicateInfo(MCInstrInfo const &MCII, MCInst const &MCI) argument
827 prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI) argument
834 hasTmpDst(MCInstrInfo const &MCII, MCInst const &MCI) argument
[all...]
H A DHexagonMCShuffler.h31 HexagonMCShuffler(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, argument
33 : HexagonShuffler(Context, Fatal, MCII, STI) {
37 HexagonMCShuffler(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, argument
40 : HexagonShuffler(Context, Fatal, MCII, STI) {
56 bool HexagonMCShuffle(MCContext &Context, bool Fatal, MCInstrInfo const &MCII,
58 bool HexagonMCShuffle(MCContext &Context, MCInstrInfo const &MCII,
61 bool HexagonMCShuffle(MCContext &Context, MCInstrInfo const &MCII,
H A DHexagonMCShuffler.cpp39 LLVM_DEBUG(dbgs() << "Shuffling: " << MCII.getName(MI.getOpcode())
41 assert(!HexagonMCInstrInfo::getDesc(MCII, MI).isPseudo());
44 append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, MI));
59 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI));
63 assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo());
66 append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, MI));
72 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI));
105 MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
107 HexagonMCShuffler MCS(Context, Fatal, MCII, STI, MCB);
132 llvm::HexagonMCShuffle(MCContext &Context, MCInstrInfo const &MCII, argument
104 HexagonMCShuffle(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &MCB) argument
182 HexagonMCShuffle(MCContext &Context, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &MCB, MCInst const &AddMI, int fixupCount) argument
[all...]
H A DHexagonMCChecker.cpp56 if (HexagonMCInstrInfo::isDuplex(MCII, Inst)) {
68 if (HexagonMCInstrInfo::isPredicated(MCII, MCI) && isPredicateRegister(R)) {
71 isTrue = HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI);
74 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MCI))
87 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MCI);
120 HexagonMCInstrInfo::isPredicateLate(MCII, MCI))
159 else if (HexagonMCInstrInfo::isPredicateLate(MCII, MCI) &&
163 else if (i == 0 && HexagonMCInstrInfo::getType(MCII, MCI) ==
171 else if (i <= 1 && HexagonMCInstrInfo::hasNewValue2(MCII, MCI))
181 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MC
191 HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &mcb, MCRegisterInfo const &ri, bool ReportErrors) argument
260 isNeitherAnorX(MCInstrInfo const &MCII, MCInst const &ID) argument
[all...]
H A DHexagonShuffler.cpp145 MCInstrInfo const &MCII, unsigned s,
148 unsigned T = HexagonMCInstrInfo::getType(MCII, *id);
155 setLoad(HexagonMCInstrInfo::getDesc(MCII, *id).mayLoad());
156 setStore(HexagonMCInstrInfo::getDesc(MCII, *id).mayStore());
200 MCInstrInfo const &MCII,
202 : Context(Context), MCII(MCII), STI(STI), ReportErrors(ReportErrors) {
214 HexagonInstr PI(&TUL, MCII, &ID, Extender, S);
230 if (HexagonMCInstrInfo::isRestrictSlot1AOK(MCII, Inst)) {
238 unsigned Type = HexagonMCInstrInfo::getType(MCII, Ins
144 HexagonCVIResource(TypeUnitsAndLanes *TUL, MCInstrInfo const &MCII, unsigned s, MCInst const *id) argument
199 HexagonShuffler(MCContext &Context, bool ReportErrors, MCInstrInfo const &MCII, MCSubtargetInfo const &STI) argument
[all...]
H A DHexagonMCCodeEmitter.h36 MCInstrInfo const &MCII; member in class:llvm::HexagonMCCodeEmitter
50 : MCT(MCT), MCII(MII) {}
78 Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
H A DHexagonShuffler.h93 HexagonCVIResource(TypeUnitsAndLanes *TUL, MCInstrInfo const &MCII,
115 MCInstrInfo const &MCII, MCInst const *id,
117 : ID(id), Extender(Extender), Core(s), CVI(T, MCII, s, id) {}
152 MCInstrInfo const &MCII; member in class:llvm::HexagonShuffler
165 MCInstrInfo const &MCII, MCSubtargetInfo const &STI);
114 HexagonInstr(HexagonCVIResource::TypeUnitsAndLanes *T, MCInstrInfo const &MCII, MCInst const *id, MCInst const *Extender, unsigned s) argument
H A DHexagonMCCodeEmitter.cpp342 bool Duplex = HexagonMCInstrInfo::isDuplex(MCII, MCI);
414 assert(!HexagonMCInstrInfo::getDesc(MCII, MI).isPseudo() &&
417 << HexagonMCInstrInfo::getName(MCII, MI) << "'\n");
426 << HexagonMCInstrInfo::getName(MCII, MI) << "'\n");
469 MCInstrInfo const &MCII, const MCInst &MI, const MCOperand &MO,
471 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI);
472 unsigned InsnType = HexagonMCInstrInfo::getType(MCII, MI);
483 const MCInstrDesc &NextD = HexagonMCInstrInfo::getDesc(MCII, NextI);
485 HexagonMCInstrInfo::getType(MCII, NextI) == HexagonII::TypeCR)
591 bool InstExtendable = HexagonMCInstrInfo::isExtendable(MCII, M
468 getFixupNoBits( MCInstrInfo const &MCII, const MCInst &MI, const MCOperand &MO, const MCSymbolRefExpr::VariantKind VarKind) const argument
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstComments.h23 const MCInstrInfo &MCII);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCTargetDesc.h36 MCCodeEmitter *createBPFMCCodeEmitter(const MCInstrInfo &MCII,
39 MCCodeEmitter *createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
H A DBPFMCCodeEmitter.cpp33 const MCInstrInfo &MCII; member in class:__anon5127::BPFMCCodeEmitter
40 : MCII(mcii), MRI(mri), IsLittleEndian(IsLittleEndian) {}
74 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII, argument
77 return new BPFMCCodeEmitter(MCII, MRI, true);
80 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII, argument
83 return new BPFMCCodeEmitter(MCII, MRI, false);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCTargetDesc.h35 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
38 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-mca/
H A DCodeRegionGenerator.h52 const MCInstrInfo &MCII; member in class:llvm::mca::final
59 : CodeRegionGenerator(SM), TheTarget(T), Ctx(C), MAI(A), STI(S), MCII(I),
/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.h54 const llvm::MCInstrInfo &MCII; member in class:llvm::mca::InstructionInfoView
65 : STI(ST), MCII(II), CE(C), PrintEncodings(ShouldPrintEncodings),
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRMCCodeEmitter.h39 AVRMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx) argument
40 : MCII(MCII), Ctx(Ctx) {}
108 const MCInstrInfo &MCII; member in class:llvm::AVRMCCodeEmitter
H A DAVRMCELFStreamer.h26 std::unique_ptr<MCInstrInfo> MCII; member in class:llvm::AVRMCELFStreamer
34 MCII(createAVRMCInstrInfo()) {}
42 MCII(createAVRMCInstrInfo()) {}
H A DAVRMCTargetDesc.h38 MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyMCCodeEmitter.cpp39 const MCInstrInfo &MCII; member in class:__anon5380::final
51 WebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) : MCII(MCII) {} argument
55 MCCodeEmitter *llvm::createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) { argument
56 return new WebAssemblyMCCodeEmitter(MCII);
83 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCTargetDesc.h34 MCCodeEmitter *createLanaiMCCodeEmitter(const MCInstrInfo &MCII,
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MCA/
H A DInstrBuilder.h40 const MCInstrInfo &MCII; member in class:llvm::mca::InstrBuilder
62 InstrBuilder(const MCSubtargetInfo &STI, const MCInstrInfo &MCII,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.h32 const MCInstrInfo &MCII; member in class:llvm::AMDGPUMCCodeEmitter
34 AMDGPUMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
H A DAMDGPUMCTargetDesc.h36 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
41 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp37 MCInstrInfo const &MCII; member in class:llvm::MSP430MCCodeEmitter
74 MSP430MCCodeEmitter(MCContext &ctx, MCInstrInfo const &MCII) argument
75 : Ctx(ctx), MCII(MCII) {}
85 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
202 MCCodeEmitter *createMSP430MCCodeEmitter(const MCInstrInfo &MCII, argument
205 return new MSP430MCCodeEmitter(Ctx, MCII);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp68 const MCInstrInfo &MCII,
70 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass();
111 const MCInstrInfo &MCII,
113 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass();
67 computeInstrLatency(const MCSubtargetInfo &STI, const MCInstrInfo &MCII, const MCInst &Inst) const argument
110 getReciprocalThroughput(const MCSubtargetInfo &STI, const MCInstrInfo &MCII, const MCInst &Inst) const argument

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