1//===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// Provides AMDGPU specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13//
14
15#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
16#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
17
18#include "llvm/Support/DataTypes.h"
19
20#include <memory>
21
22namespace llvm {
23class MCAsmBackend;
24class MCCodeEmitter;
25class MCContext;
26class MCInstrInfo;
27class MCObjectTargetWriter;
28class MCRegisterInfo;
29class MCSubtargetInfo;
30class MCTargetOptions;
31class StringRef;
32class Target;
33class Triple;
34class raw_pwrite_stream;
35
36MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
37                                       const MCRegisterInfo &MRI,
38                                       MCContext &Ctx);
39MCInstrInfo *createR600MCInstrInfo();
40
41MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
42                                     const MCRegisterInfo &MRI,
43                                     MCContext &Ctx);
44
45MCAsmBackend *createAMDGPUAsmBackend(const Target &T,
46                                     const MCSubtargetInfo &STI,
47                                     const MCRegisterInfo &MRI,
48                                     const MCTargetOptions &Options);
49
50std::unique_ptr<MCObjectTargetWriter>
51createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
52                            bool HasRelocationAddend, uint8_t ABIVersion);
53} // End llvm namespace
54
55#define GET_REGINFO_ENUM
56#include "AMDGPUGenRegisterInfo.inc"
57#undef GET_REGINFO_ENUM
58
59#define GET_REGINFO_ENUM
60#include "R600GenRegisterInfo.inc"
61#undef GET_REGINFO_ENUM
62
63#define GET_INSTRINFO_ENUM
64#define GET_INSTRINFO_OPERAND_ENUM
65#define GET_INSTRINFO_SCHED_ENUM
66#include "AMDGPUGenInstrInfo.inc"
67#undef GET_INSTRINFO_SCHED_ENUM
68#undef GET_INSTRINFO_OPERAND_ENUM
69#undef GET_INSTRINFO_ENUM
70
71#define GET_INSTRINFO_ENUM
72#define GET_INSTRINFO_OPERAND_ENUM
73#define GET_INSTRINFO_SCHED_ENUM
74#include "R600GenInstrInfo.inc"
75#undef GET_INSTRINFO_SCHED_ENUM
76#undef GET_INSTRINFO_OPERAND_ENUM
77#undef GET_INSTRINFO_ENUM
78
79#define GET_SUBTARGETINFO_ENUM
80#include "AMDGPUGenSubtargetInfo.inc"
81#undef GET_SUBTARGETINFO_ENUM
82
83#define GET_SUBTARGETINFO_ENUM
84#include "R600GenSubtargetInfo.inc"
85#undef GET_SUBTARGETINFO_ENUM
86
87#endif
88