/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RegisterPressure.h | 41 LaneBitmask LaneMask; member in struct:llvm::RegisterMaskPair 43 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask) argument 44 : RegUnit(RegUnit), LaneMask(LaneMask) {} 264 LaneBitmask LaneMask; 266 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) 267 : Index(Index), LaneMask(LaneMask) {} 300 return I->LaneMask; 303 /// Mark the \p Pair.LaneMask lane [all...] |
H A D | ScheduleDAGInstrs.h | 54 LaneBitmask LaneMask; member in struct:llvm::VReg2SUnit 57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) argument 58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} 69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, argument 71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {}
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H A D | LiveInterval.h | 683 /// A live range for subregisters. The LaneMask specifies which parts of the 689 LaneBitmask LaneMask; 692 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} 695 SubRange(LaneBitmask LaneMask, const LiveRange &Other, 697 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} 775 LaneBitmask LaneMask) { 776 SubRange *Range = new (Allocator) SubRange(LaneMask); [all...] |
H A D | MachineBasicBlock.h | 74 LaneBitmask LaneMask; member in struct:llvm::MachineBasicBlock::RegisterMaskPair 76 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask) argument 77 : PhysReg(PhysReg), LaneMask(LaneMask) {} 316 LaneBitmask LaneMask = LaneBitmask::getAll()) { 317 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask)); 338 LaneBitmask LaneMask = LaneBitmask::getAll()); 342 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
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H A D | LiveRangeCalc.h | 166 /// of the live interval @p LI, corresponding to lane mask @p LaneMask, 170 /// If @p LR is a main range, the @p LaneMask should be set to ~0, i.e. 172 void extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask,
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H A D | TargetRegisterInfo.h | 54 const LaneBitmask LaneMask; member in class:llvm::TargetRegisterClass 204 return LaneMask; 576 /// Transforms a LaneMask computed for one subregister to the lanemask that 594 LaneBitmask LaneMask) const { 596 return LaneMask; 597 return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask);
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H A D | RegisterScavenging.h | 186 void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | LaneBitmask.h | 93 inline Printable PrintLaneMask(LaneBitmask LaneMask) { argument 94 return Printable([LaneMask](raw_ostream &OS) { 95 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger());
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | RegisterPressure.cpp | 101 if (!P.LaneMask.all()) 102 dbgs() << ':' << PrintLaneMask(P.LaneMask); 109 if (!P.LaneMask.all()) 110 dbgs() << ':' << PrintLaneMask(P.LaneMask); 367 LaneBitmask::getNone(), Pair.LaneMask); 378 return I->LaneMask; 384 assert(Pair.LaneMask.any()); 391 I->LaneMask |= Pair.LaneMask; 403 I->LaneMask [all...] |
H A D | ScheduleDAGInstrs.cpp | 384 return (RegUse->LaneMask & getLaneMaskForMO(MO)).none(); 434 LaneBitmask LaneMask = I->LaneMask; local 436 if ((LaneMask & KillLaneMask).none()) { 441 if ((LaneMask & DefLaneMask).any()) { 451 LaneMask &= ~KillLaneMask; 453 if (LaneMask.any()) { 454 I->LaneMask = LaneMask; 472 LaneBitmask LaneMask 519 LaneBitmask LaneMask = TrackLaneMasks ? getLaneMaskForMO(MO) local [all...] |
H A D | MachineVerifier.cpp | 252 LaneBitmask LaneMask) const; 258 void report_context_lanemask(LaneBitmask LaneMask) const; 267 LaneBitmask LaneMask = LaneBitmask::getNone()); 271 LaneBitmask LaneMask = LaneBitmask::getNone()); 287 LaneBitmask LaneMask = LaneBitmask::getNone()); 528 LaneBitmask LaneMask) const { 531 if (LaneMask.any()) 532 report_context_lanemask(LaneMask); 563 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { 564 errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\ 1869 checkLivenessAtUse(const MachineOperand *MO, unsigned MONum, SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit, LaneBitmask LaneMask) argument 1891 checkLivenessAtDef(const MachineOperand *MO, unsigned MONum, SlotIndex DefIdx, const LiveRange &LR, unsigned VRegOrUnit, bool SubRangeCheck, LaneBitmask LaneMask) argument 2385 verifyLiveRangeValue(const LiveRange &LR, const VNInfo *VNI, unsigned Reg, LaneBitmask LaneMask) argument 2477 verifyLiveRangeSegment(const LiveRange &LR, const LiveRange::const_iterator I, unsigned Reg, LaneBitmask LaneMask) argument 2692 verifyLiveRange(const LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) argument [all...] |
H A D | RenameIndependentSubregs.cpp | 183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); local 187 if ((SR.LaneMask & LaneMask).none()) 227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); local 232 if ((SR.LaneMask & LaneMask).none()) 285 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask);
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H A D | LiveIntervals.cpp | 367 unsigned Reg, LaneBitmask LaneMask) { 378 if ((SR.LaneMask & M).any()) { 379 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); 387 const LiveRange &OldRange = getSubRange(LI, LaneMask); 434 assert(LaneMask.any() && 437 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes); 569 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); local 570 if ((LaneMask & SR.LaneMask).none()) 598 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); 365 extendSegmentsToUses(LiveRange &Segments, ShrinkToUsesWorkList &WorkList, unsigned Reg, LaneBitmask LaneMask) argument 1007 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg) local 1032 updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) argument 1229 handleMoveUp(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) argument 1411 findLastUseBefore(SlotIndex Before, unsigned Reg, LaneBitmask LaneMask) argument 1492 repairOldRegInRange(const MachineBasicBlock::iterator Begin, const MachineBasicBlock::iterator End, const SlotIndex endIdx, LiveRange &LR, const unsigned Reg, LaneBitmask LaneMask) argument [all...] |
H A D | RDFRegisters.cpp | 37 if (RC->LaneMask != RI.RegClass->LaneMask) { 67 UI.Mask = RC->LaneMask; 172 if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask) 232 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask
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H A D | LiveInterval.cpp | 881 /// of the mask describe by \p LaneMask and if not, remove that value 884 LaneBitmask LaneMask, 914 if ((ExpectedDefMask & LaneMask).none()) 931 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, 935 LaneBitmask ToApply = LaneMask; 937 LaneBitmask SRMask = SR.LaneMask; 938 LaneBitmask Matching = SRMask & LaneMask; 944 // The subrange fits (it does not cover bits outside \p LaneMask). 949 SR.LaneMask = SRMask & ~Matching; 956 stripValuesNotDefiningMask(reg, SR, SR.LaneMask, Indexe [all...] |
H A D | MachineBasicBlock.cpp | 400 if (!LI.LaneMask.all()) 401 OS << ":0x" << PrintLaneMask(LI.LaneMask); 448 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { 454 I->LaneMask &= ~LaneMask; 455 if (I->LaneMask.none()) 466 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { 469 return I != livein_end() && (I->LaneMask & LaneMask).any(); 483 LaneBitmask LaneMask [all...] |
H A D | VirtRegMap.cpp | 292 LaneBitmask LaneMask; local 301 LaneMask |= SR->LaneMask; 303 if (LaneMask.none()) 306 MBB->addLiveIn(PhysReg, LaneMask); 368 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex))
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H A D | LiveRangeEdit.cpp | 49 LI.createSubRange(Alloc, S.LaneMask); 251 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); local 253 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill())
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H A D | LiveRegUnits.cpp | 81 LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
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H A D | RegisterCoalescer.cpp | 148 /// A LaneMask to remember on which subregister live ranges we need to call 239 /// LaneMask are split as necessary. @p LaneMask are the lanes that 243 LaneBitmask LaneMask, CoalescerPair &CP, 249 LaneBitmask LaneMask, const CoalescerPair &CP); 967 MaskA |= SA.LaneMask; 970 Allocator, SA.LaneMask, 987 if ((SB.LaneMask & MaskA).any()) 1386 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); 2212 const LaneBitmask LaneMask; member in class:__anon4631::JoinVals 2373 JoinVals(LiveRange &LR, unsigned Reg, unsigned SubIdx, LaneBitmask LaneMask, SmallVectorImpl<VNInfo*> &newVNInfo, const CoalescerPair &cp, LiveIntervals *lis, const TargetRegisterInfo *TRI, bool SubRangeJoin, bool TrackSubRegLiveness) argument 3250 joinSubRegRanges(LiveRange &LRange, LiveRange &RRange, LaneBitmask LaneMask, const CoalescerPair &CP) argument 3313 mergeSubRangeInto(LiveInterval &LI, const LiveRange &ToMerge, LaneBitmask LaneMask, CoalescerPair &CP, unsigned ComposeSubRegIdx) argument [all...] |
H A D | SplitKit.cpp | 410 if (S.LaneMask == LM) 427 auto &PS = getSubRangeForMask(S.LaneMask, Edit->getParent()); 451 if ((S.LaneMask & LM).any()) 529 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubIdx); local 530 DestLI.refineSubRanges(Allocator, LaneMask, 539 LaneBitmask LaneMask, MachineBasicBlock &MBB, 542 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) { 568 if (SubRegMask == LaneMask) { 573 // The index must not cover any lanes outside \p LaneMask 538 buildCopy(unsigned FromReg, unsigned ToReg, LaneBitmask LaneMask, MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, bool Late, unsigned RegIdx) argument 656 LaneBitmask LaneMask; local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFormMemoryClauses.cpp | 65 void forAllLanes(unsigned Reg, LaneBitmask LaneMask, Callable Func) const; 154 void SIFormMemoryClauses::forAllLanes(unsigned Reg, LaneBitmask LaneMask, argument 156 if (LaneMask.all() || Register::isPhysicalRegister(Reg) || 157 LaneMask == MRI->getMaxLaneMaskForVReg(Reg)) { 171 if (SubRegMask == LaneMask) { 176 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) 194 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) 198 LaneMask [all...] |
H A D | GCNRegPressure.cpp | 246 I->LaneMask |= UsedMask; 265 LiveMask |= S.LaneMask; 325 AtMIPressure.inc(U.RegUnit, LiveMask, LiveMask | U.LaneMask, *MRI); 348 LiveMask |= U.LaneMask; 384 It.second &= ~S.LaneMask;
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/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 107 if (LaneMask.any()) 108 return LaneMask; 111 LaneMask = LaneBitmask::getAll(); 118 LaneMask = M; 119 return LaneMask; 1436 Idx.LaneMask = LaneBitmask::getLane(Bit); 1439 Idx.LaneMask = LaneBitmask::getNone(); 1458 unsigned DstBit = Idx.LaneMask.getHighestLane(); 1459 assert(Idx.LaneMask == LaneBitmask::getLane(DstBit) && 1478 assert(Idx2.LaneMask 1535 LaneBitmask LaneMask; local 2059 LaneBitmask LaneMask = SubRegIndex->LaneMask; local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | RDFCopy.cpp | 124 if ((RC.LaneMask & RR.Mask) == RC.LaneMask)
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