Searched refs:LC0 (Results 1 - 8 of 8) sorted by relevance
| /freebsd-12-stable/sys/dev/xdma/controller/ |
| H A D | pl330.h | 64 #define LC0(n) (0x40C + 0x20 * (n)) /* Loop counter 0 for DMA channel n */ macro
|
| H A D | pl330.c | 168 dprintf("%s: 0x%x, LC0 %x, SAR %x DAR %x\n",
169 __func__, pending, READ4(sc, LC0(0)),
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.h | 106 return (Hexagon::SA0 == R || Hexagon::LC0 == R || Hexagon::SA1 == R ||
|
| H A D | HexagonMCChecker.cpp | 45 Defs[Hexagon::LC0].insert(Unconditional);
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 151 Reserved.set(Hexagon::LC0); // C1
|
| H A D | HexagonHardwareLoops.cpp | 999 static const unsigned Regs01[] = { LC0, SA0, LC1, SA1 };
|
| H A D | HexagonISelLowering.cpp | 299 .Case("lc0", Hexagon::LC0)
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 650 /* 0 */ SA0, LC0, SA1, LC1,
|
Completed in 126 milliseconds