Searched refs:JZ_VPUCDR (Results 1 - 2 of 2) sorted by relevance

/freebsd-12-stable/sys/mips/ingenic/
H A Djz4780_clock.c217 MUX(JZ_VPUCDR, 30, 2, 0xe),
218 DIV(JZ_VPUCDR, 0, 0, 4, 29, 28, 27),
H A Djz4780_regs.h211 #define JZ_VPUCDR 0x00000030 /* VPU clock divider register */ macro

Completed in 142 milliseconds