Searched refs:JZ_MSC1CDR (Results 1 - 2 of 2) sorted by relevance
/freebsd-12-stable/sys/mips/ingenic/ | ||
H A D | jz4780_regs.h | 218 #define JZ_MSC1CDR 0x000000a4 /* MSC1 clock divider register */ macro |
H A D | jz4780_clock.c | 267 DIV(JZ_MSC1CDR, 0, 1, 8, 29, 28, 27), |
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