Searched refs:JZ_BCHCDR (Results 1 - 2 of 2) sorted by relevance

/freebsd-12-stable/sys/mips/ingenic/
H A Djz4780_clock.c336 MUX(JZ_BCHCDR, 30, 2, 0x7),
337 DIV(JZ_BCHCDR, 0, 0, 4, 29, 28, 27),
H A Djz4780_regs.h244 #define JZ_BCHCDR 0x000000ac /* BCH clock divider register */ macro

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