/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | CodeGenCWrappers.h | 25 inline Optional<CodeModel::Model> unwrap(LLVMCodeModel Model, bool &JIT) { argument 26 JIT = false; 29 JIT = true;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcTargetMachine.h | 31 CodeGenOpt::Level OL, bool JIT, bool is64bit); 52 CodeGenOpt::Level OL, bool JIT); 63 CodeGenOpt::Level OL, bool JIT); 73 CodeGenOpt::Level OL, bool JIT);
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H A D | SparcTargetMachine.cpp | 75 bool Is64Bit, bool JIT) { 84 if (JIT) 95 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) 99 CM, getEffectiveRelocModel(RM), is64bit, JIT), 197 CodeGenOpt::Level OL, bool JIT) 198 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} 207 CodeGenOpt::Level OL, bool JIT) 208 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} 217 CodeGenOpt::Level OL, bool JIT) 218 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, fals 74 getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, bool Is64Bit, bool JIT) argument 92 SparcTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) argument 192 SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument 202 SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument 212 SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetMachine.h | 34 CodeGenOpt::Level OL, bool JIT, bool IsLittleEndian); 65 bool JIT); 77 bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsTargetMachine.h | 43 CodeGenOpt::Level OL, bool JIT, bool isLittle); 79 CodeGenOpt::Level OL, bool JIT); 91 CodeGenOpt::Level OL, bool JIT);
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H A D | MipsTargetMachine.cpp | 99 static Reloc::Model getEffectiveRelocModel(bool JIT, argument 101 if (!RM.hasValue() || JIT) 116 CodeGenOpt::Level OL, bool JIT, 119 CPU, FS, Options, getEffectiveRelocModel(JIT, RM), 145 CodeGenOpt::Level OL, bool JIT) 146 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} 155 CodeGenOpt::Level OL, bool JIT) 156 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} 111 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool isLittle) argument 140 MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument 150 MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFTargetMachine.h | 28 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430TargetMachine.h | 33 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCTargetMachine.h | 31 CodeGenOpt::Level OL, bool JIT);
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H A D | ARCTargetMachine.cpp | 35 CodeGenOpt::Level OL, bool JIT) 30 ARCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRTargetMachine.h | 34 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonTargetMachine.h | 33 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiTargetMachine.h | 37 CodeGenOpt::Level OptLevel, bool JIT);
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H A D | LanaiTargetMachine.cpp | 61 CodeGenOpt::Level OptLevel, bool JIT) 56 LanaiTargetMachine(const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CodeModel, CodeGenOpt::Level OptLevel, bool JIT) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVTargetMachine.h | 31 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetMachine.cpp | 126 // - When creating JIT code, stubs will be in range of BRASL if the 128 // in range of LARL. However, the JIT environment has no equivalent 133 bool JIT) { 141 if (JIT) 151 CodeGenOpt::Level OL, bool JIT) 155 getEffectiveSystemZCodeModel(CM, getEffectiveRelocModel(RM), JIT), 132 getEffectiveSystemZCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, bool JIT) argument 146 SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
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H A D | SystemZTargetMachine.h | 35 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VETargetMachine.h | 33 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TargetMachine.h | 33 // True if this is used in JIT. 40 CodeGenOpt::Level OL, bool JIT);
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H A D | X86TargetMachine.cpp | 161 bool JIT, 165 // JIT codegen should use static relocations by default, since it's 167 if (JIT) 203 bool JIT, bool Is64Bit) { 209 if (JIT) 221 CodeGenOpt::Level OL, bool JIT) 224 getEffectiveRelocModel(TT, JIT, RM), 225 getEffectiveX86CodeModel(CM, JIT, TT.getArch() == Triple::x86_64), 227 TLOF(createTLOF(getTargetTriple())), IsJIT(JIT) { 160 getEffectiveRelocModel(const Triple &TT, bool JIT, Optional<Reloc::Model> RM) argument 202 getEffectiveX86CodeModel(Optional<CodeModel::Model> CM, bool JIT, bool Is64Bit) argument 216 X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreTargetMachine.h | 34 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetMachine.h | 84 CodeGenOpt::Level OL, bool JIT); 94 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXTargetMachine.h | 81 CodeGenOpt::Level OL, bool JIT); 90 CodeGenOpt::Level OL, bool JIT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/ |
H A D | ExecutionEngineBindings.cpp | 139 builder.setEngineKind(EngineKind::JIT) 142 if (ExecutionEngine *JIT = builder.create()) { 143 *OutJIT = wrap(JIT); 198 builder.setEngineKind(EngineKind::JIT) 202 bool JIT; local 203 if (Optional<CodeModel::Model> CM = unwrap(options.CodeModel, JIT)) 208 if (ExecutionEngine *JIT = builder.create()) { 209 *OutJIT = wrap(JIT); 414 /*===-- JIT Event Listener functions -------------------------------------===*/
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUTargetMachine.h | 77 CodeGenOpt::Level OL, bool JIT); 102 CodeGenOpt::Level OL, bool JIT);
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