Searched refs:IXGBE_WRITE_REG (Results 1 - 17 of 17) sorted by relevance

/freebsd-12-stable/sys/dev/ixgbe/
H A Dixgbe_dcb_82598.c130 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg);
140 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);
152 IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg);
159 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg);
164 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg);
195 IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg);
210 IXGBE_WRITE_REG(hw, IXGBE_TDTQ2TCCR(i), reg);
239 IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg);
253 IXGBE_WRITE_REG(hw, IXGBE_TDPT2TCCR(i), reg);
259 IXGBE_WRITE_REG(h
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H A Dixgbe_dcb_82599.c136 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);
148 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
161 IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg);
169 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);
192 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i);
193 IXGBE_WRITE_REG(hw, IXGBE_RTTDT1C, 0);
209 IXGBE_WRITE_REG(hw, IXGBE_RTTDT2C(i), reg);
217 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);
247 IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg);
259 IXGBE_WRITE_REG(h
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H A Dixgbe_82598.c110 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr);
272 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);
280 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
520 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg);
521 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg);
529 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl);
530 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), fcrth);
532 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0);
533 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0);
541 IXGBE_WRITE_REG(h
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H A Dixgbe_common.c355 IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg);
362 IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg);
418 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
467 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i);
468 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, 0);
476 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval);
483 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
1130 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
1137 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(i), IXGBE_TXDCTL_SWFLSH);
1144 IXGBE_WRITE_REG(h
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H A Dixgbe_82599.c136 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
202 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value);
301 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
600 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);
690 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);
709 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);
766 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);
1091 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
1130 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2);
1165 IXGBE_WRITE_REG(h
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H A Dif_ix.c603 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
605 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
613 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]);
652 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
685 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
693 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg);
706 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j),
708 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
709 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j),
732 IXGBE_WRITE_REG(h
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H A Dixgbe_vf.c40 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
118 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
123 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
124 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
128 IXGBE_WRITE_REG(h
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H A Dif_sriov.c252 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr);
253 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir);
328 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte);
346 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre);
432 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MTA(vec_reg), mta_reg);
436 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(vf->pool), vmolr);
506 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
725 IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), IXGBE_VF_BIT(adapter->pool));
726 IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), IXGBE_VF_BIT(adapter->pool));
732 IXGBE_WRITE_REG(h
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H A Dif_ixv.c647 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, IXGBE_EICS_RTX_QUEUE);
650 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(adapter->vector), IXGBE_LINK_ITR);
676 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
690 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, mask);
724 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, reg);
730 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, IXGBE_EIMS_OTHER);
1235 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1238 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VFTDH(j), 0);
1239 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VFTDT(j), 0);
1255 IXGBE_WRITE_REG(h
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H A Dixgbe_mbx.c297 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_VFU);
342 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ);
376 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK);
424 IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);
510 IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
532 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);
577 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);
616 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);
H A Dixgbe_x540.c238 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
268 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT);
702 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup);
715 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup);
803 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw),
828 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync);
877 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync);
957 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swsm);
961 IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm);
1025 IXGBE_WRITE_REG(h
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H A Dif_fdir.c66 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
H A Dixgbe_phy.c595 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
626 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
698 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
706 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
735 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
2286 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2342 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2368 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2417 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2491 IXGBE_WRITE_REG(h
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H A Dixgbe_common.h42 IXGBE_WRITE_REG(hw, reg, (u32) value); \
43 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
H A Dixgbe_x550.c335 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
893 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);
919 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);
976 IXGBE_WRITE_REG(hw, IXGBE_DMCTH(tc), reg);
996 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);
1003 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);
1063 IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp);
1064 IXGBE_WRITE_REG(hw, IXGBE_PFFLPH, (u32)(pfflp >> 32));
1089 IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof);
1152 IXGBE_WRITE_REG(h
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H A Dix_txrx.c261 IXGBE_WRITE_REG(&sc->hw, txr->tail, pidx);
356 IXGBE_WRITE_REG(&sc->hw, rxr->tail, pidx);
H A Dixgbe_osdep.h231 #define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val) macro

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