1/******************************************************************************
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4  Copyright (c) 2001-2017, Intel Corporation
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33******************************************************************************/
34/*$FreeBSD$*/
35
36#ifndef _IXGBE_OSDEP_H_
37#define _IXGBE_OSDEP_H_
38
39#include <sys/types.h>
40#include <sys/param.h>
41#include <sys/endian.h>
42#include <sys/systm.h>
43#include <sys/mbuf.h>
44#include <sys/protosw.h>
45#include <sys/socket.h>
46#include <sys/malloc.h>
47#include <sys/kernel.h>
48#include <sys/bus.h>
49#include <machine/bus.h>
50#include <sys/rman.h>
51#include <machine/resource.h>
52#include <vm/vm.h>
53#include <vm/pmap.h>
54#include <machine/clock.h>
55#include <dev/pci/pcivar.h>
56#include <dev/pci/pcireg.h>
57
58#define ASSERT(x) if(!(x)) panic("IXGBE: x")
59#define EWARN(H, W) printf(W)
60
61enum {
62	IXGBE_ERROR_SOFTWARE,
63	IXGBE_ERROR_POLLING,
64	IXGBE_ERROR_INVALID_STATE,
65	IXGBE_ERROR_UNSUPPORTED,
66	IXGBE_ERROR_ARGUMENT,
67	IXGBE_ERROR_CAUTION,
68};
69
70/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
71#define usec_delay(x) DELAY(x)
72#define msec_delay(x) DELAY(1000*(x))
73
74#define DBG 0
75#define MSGOUT(S, A, B)     printf(S "\n", A, B)
76#define DEBUGFUNC(F)        DEBUGOUT(F);
77#if DBG
78	#define DEBUGOUT(S)         printf(S "\n")
79	#define DEBUGOUT1(S,A)      printf(S "\n",A)
80	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
81	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
82	#define DEBUGOUT4(S,A,B,C,D)  printf(S "\n",A,B,C,D)
83	#define DEBUGOUT5(S,A,B,C,D,E)  printf(S "\n",A,B,C,D,E)
84	#define DEBUGOUT6(S,A,B,C,D,E,F)  printf(S "\n",A,B,C,D,E,F)
85	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
86	#define ERROR_REPORT1 ERROR_REPORT
87	#define ERROR_REPORT2 ERROR_REPORT
88	#define ERROR_REPORT3 ERROR_REPORT
89	#define ERROR_REPORT(level, format, arg...) do { \
90		switch (level) { \
91		case IXGBE_ERROR_SOFTWARE: \
92		case IXGBE_ERROR_CAUTION: \
93		case IXGBE_ERROR_POLLING: \
94		case IXGBE_ERROR_INVALID_STATE: \
95		case IXGBE_ERROR_UNSUPPORTED: \
96		case IXGBE_ERROR_ARGUMENT: \
97			device_printf(ixgbe_dev_from_hw(hw), format, ## arg); \
98			break; \
99		default: \
100			break; \
101		} \
102	} while (0)
103#else
104	#define DEBUGOUT(S)
105	#define DEBUGOUT1(S,A)
106	#define DEBUGOUT2(S,A,B)
107	#define DEBUGOUT3(S,A,B,C)
108	#define DEBUGOUT4(S,A,B,C,D)
109	#define DEBUGOUT5(S,A,B,C,D,E)
110	#define DEBUGOUT6(S,A,B,C,D,E,F)
111	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
112
113	#define ERROR_REPORT1(S,A)
114	#define ERROR_REPORT2(S,A,B)
115	#define ERROR_REPORT3(S,A,B,C)
116#endif
117
118#define FALSE               0
119#define false               0 /* shared code requires this */
120#define TRUE                1
121#define true                1
122#define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
123#define PCI_COMMAND_REGISTER            PCIR_COMMAND
124
125/* Shared code dropped this define.. */
126#define IXGBE_INTEL_VENDOR_ID		0x8086
127
128/* Bunch of defines for shared code bogosity */
129#define UNREFERENCED_PARAMETER(_p)
130#define UNREFERENCED_1PARAMETER(_p)
131#define UNREFERENCED_2PARAMETER(_p, _q)
132#define UNREFERENCED_3PARAMETER(_p, _q, _r)
133#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
134
135#define IXGBE_NTOHL(_i)	ntohl(_i)
136#define IXGBE_NTOHS(_i)	ntohs(_i)
137
138/* XXX these need to be revisited */
139#define IXGBE_CPU_TO_LE16 htole16
140#define IXGBE_CPU_TO_LE32 htole32
141#define IXGBE_LE32_TO_CPU le32toh
142#define IXGBE_LE32_TO_CPUS(x)
143#define IXGBE_CPU_TO_BE16 htobe16
144#define IXGBE_CPU_TO_BE32 htobe32
145#define IXGBE_BE32_TO_CPU be32toh
146
147typedef uint8_t		u8;
148typedef int8_t		s8;
149typedef uint16_t	u16;
150typedef int16_t		s16;
151typedef uint32_t	u32;
152typedef int32_t		s32;
153typedef uint64_t	u64;
154#ifndef __bool_true_false_are_defined
155typedef boolean_t	bool;
156#endif
157
158/* shared code requires this */
159#define __le16  u16
160#define __le32  u32
161#define __le64  u64
162#define __be16  u16
163#define __be32  u32
164#define __be64  u64
165
166#define le16_to_cpu
167
168#if __FreeBSD_version < 800000
169#if defined(__i386__) || defined(__amd64__)
170#define mb()	__asm volatile("mfence" ::: "memory")
171#define wmb()	__asm volatile("sfence" ::: "memory")
172#define rmb()	__asm volatile("lfence" ::: "memory")
173#else
174#define mb()
175#define rmb()
176#define wmb()
177#endif
178#endif
179
180#if defined(__i386__) || defined(__amd64__)
181static __inline
182void prefetch(void *x)
183{
184	__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
185}
186#else
187#define prefetch(x)
188#endif
189
190/*
191 * Optimized bcopy thanks to Luigi Rizzo's investigative work.  Assumes
192 * non-overlapping regions and 32-byte padding on both src and dst.
193 */
194static __inline int
195ixgbe_bcopy(void *restrict _src, void *restrict _dst, int l)
196{
197	uint64_t *src = _src;
198	uint64_t *dst = _dst;
199
200	for (; l > 0; l -= 32) {
201		*dst++ = *src++;
202		*dst++ = *src++;
203		*dst++ = *src++;
204		*dst++ = *src++;
205	}
206	return (0);
207}
208
209struct ixgbe_osdep
210{
211	bus_space_tag_t    mem_bus_space_tag;
212	bus_space_handle_t mem_bus_space_handle;
213};
214
215/* These routines need struct ixgbe_hw declared */
216struct ixgbe_hw;
217
218/* These routines are needed by the shared code */
219extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
220#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
221
222extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
223#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
224
225#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
226
227extern u32 ixgbe_read_reg(struct ixgbe_hw *, u32);
228#define IXGBE_READ_REG(a, reg) ixgbe_read_reg(a, reg)
229
230extern void ixgbe_write_reg(struct ixgbe_hw *, u32, u32);
231#define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val)
232
233extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32);
234#define IXGBE_READ_REG_ARRAY(a, reg, offset) \
235    ixgbe_read_reg_array(a, reg, offset)
236
237extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32);
238#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \
239    ixgbe_write_reg_array(a, reg, offset, val)
240
241#endif /* _IXGBE_OSDEP_H_ */
242