Searched refs:FSub (Results 1 - 25 of 58) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAtomicRMW.cpp28 case AtomicRMWInst::FSub: // +0.0
65 case AtomicRMWInst::FSub:
H A DInstCombineSelect.cpp1692 (TI->getOpcode() == Instruction::FSub &&
1698 (FI->getOpcode() == Instruction::FSub &&
2472 Instruction *FSub; local
2475 match(TrueVal, m_Instruction(FSub)) && FSub->hasNoNaNs() &&
2477 Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, FalseVal, FSub);
2483 match(FalseVal, m_Instruction(FSub)) && FSub->hasNoNaNs() &&
2485 Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, TrueVal, FSub);
H A DInstCombineAddSub.cpp354 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub) {
377 if (Opcode == Instruction::FSub)
435 I->getOpcode() == Instruction::FSub) && "Expect add/sub");
1434 I.getOpcode() == Instruction::FSub) && "Expecting fadd/fsub");
2254 // Handle special cases for FSub with selects feeding the operation
H A DInstCombineVectorOps.cpp1156 case Instruction::FSub:
1220 case Instruction::FSub:
1318 case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsOs16.cpp82 case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DFloat2Int.cpp116 case Instruction::FSub: return Instruction::Sub;
217 case Instruction::FSub:
266 case Instruction::FSub:
496 case Instruction::FSub:
H A DLowerAtomic.cpp93 case AtomicRMWInst::FSub:
H A DSpeculativeExecution.cpp240 case Instruction::FSub:
H A DReassociate.cpp936 isReassociableOp(V0, Instruction::Sub, Instruction::FSub))
940 isReassociableOp(V1, Instruction::Sub, Instruction::FSub))
945 isReassociableOp(VB, Instruction::Sub, Instruction::FSub)))
1997 I->getOpcode() == Instruction::FSub) && "Expected fadd/fsub");
2009 bool IsFSub = I->getOpcode() == Instruction::FSub;
2142 I->getOpcode() == Instruction::FSub) {
2193 cast<Instruction>(BO->user_back())->getOpcode() == Instruction::FSub)
H A DLowerMatrixIntrinsics.cpp288 case Instruction::FSub:
832 case Instruction::FSub:
H A DGVNSink.cpp449 case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/lib/FuzzMutate/
H A DOperations.cpp47 Ops.push_back(binOpDescriptor(1, Instruction::FSub));
112 case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DIVDescriptors.cpp580 case Instruction::FSub:
826 InductionBinOp->getOpcode() == Instruction::FSub))) &&
884 } else if (BOp->getOpcode() == Instruction::FSub)
H A DCFLGraph.h564 case Instruction::FSub:
H A DObjCARCInstKind.cpp255 case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/
H A DExecutionEngine.cpp781 case Instruction::FSub:
816 case Instruction::FSub:
831 case Instruction::FSub:
852 case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/
H A DOperator.h385 case Instruction::FSub:
H A DPatternMatch.h802 inline BinaryOp_match<LHS, RHS, Instruction::FSub> m_FSub(const LHS &L,
804 return BinaryOp_match<LHS, RHS, Instruction::FSub>(L, R);
818 if (FPMO->getOpcode() == Instruction::FSub) {
845 inline BinaryOp_match<cstfp_pred_ty<is_any_zero_fp>, RHS, Instruction::FSub>
H A DInstrTypes.h266 return CreateWithCopiedFlags(Instruction::FSub, V1, V2, FMFSource, Name);
286 return CreateWithCopiedFlags(Instruction::FSub, Zero, Op, FMFSource, Name);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp422 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
461 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
970 // case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/lib/IR/
H A DInstruction.cpp315 case FSub: return "fsub";
/freebsd-12-stable/contrib/llvm-project/llvm/lib/AsmParser/
H A DLLLexer.cpp844 INSTKEYWORD(sub, Sub); INSTKEYWORD(fsub, FSub);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp844 case Instruction::FSub:
/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-stress/
H A Dllvm-stress.cpp396 case 1:{Op = (isFloat?Instruction::FSub : Instruction::Sub); break; }
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp457 case Instruction::FSub:

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