Searched refs:DispatchPtr (Results 1 - 8 of 8) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUArgumentUsageInfo.cpp | 59 << " DispatchPtr: " << FI.second.DispatchPtr 119 return std::make_pair(DispatchPtr ? &DispatchPtr : nullptr,
|
H A D | AMDGPULowerKernelAttributes.cpp | 242 Function *DispatchPtr = Mod->getFunction(DispatchPtrName); local 243 if (!DispatchPtr) // Dispatch ptr not used. 249 for (auto *U : DispatchPtr->users()) {
|
H A D | SIMachineFunctionInfo.cpp | 32 DispatchPtr(false), 133 DispatchPtr = true; 197 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( 200 return ArgInfo.DispatchPtr.getRegister(); 454 Any |= convertArg(AI.DispatchPtr, ArgInfo.DispatchPtr);
|
H A D | AMDGPUArgumentUsageInfo.h | 125 ArgDescriptor DispatchPtr; member in struct:llvm::AMDGPUFunctionArgInfo
|
H A D | SIMachineFunctionInfo.h | 188 Optional<SIArgument> DispatchPtr; member in struct:llvm::yaml::SIArgumentInfo 212 YamlIO.mapOptional("dispatchPtr", AI.DispatchPtr); 389 bool DispatchPtr : 1; 596 return DispatchPtr;
|
H A D | AMDGPUPromoteAlloca.cpp | 239 CallInst *DispatchPtr = Builder.CreateCall(DispatchPtrFn, {}); local 240 DispatchPtr->addAttribute(AttributeList::ReturnIndex, Attribute::NoAlias); 241 DispatchPtr->addAttribute(AttributeList::ReturnIndex, Attribute::NonNull); 244 DispatchPtr->addDereferenceableAttr(AttributeList::ReturnIndex, 64); 248 DispatchPtr, PointerType::get(I32Ty, AMDGPUAS::CONSTANT_ADDRESS));
|
H A D | AMDGPUTargetMachine.cpp | 1104 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchPtr, 1105 AMDGPU::SReg_64RegClass, MFI->ArgInfo.DispatchPtr,
|
H A D | SIISelLowering.cpp | 1740 ArgInfo.DispatchPtr = allocateSGPR64Input(CCInfo);
|
Completed in 90 milliseconds