Searched refs:DemandedBits (Results 1 - 21 of 21) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DDemandedBits.h1 //===- llvm/Analysis/DemandedBits.h - Determine demanded bits ---*- C++ -*-===//
40 class DemandedBits { class in namespace:llvm
42 DemandedBits(Function &F, AssumptionCache &AC, DominatorTree &DT) : function in class:llvm::DemandedBits
87 mutable Optional<DemandedBits> DB;
100 DemandedBits &getDemandedBits() { return *DB; }
105 /// An analysis that produces \c DemandedBits for a function.
113 using Result = DemandedBits;
117 DemandedBits run(Function &F, FunctionAnalysisManager &AM);
120 /// Printer pass for DemandedBits
H A DIVDescriptors.h23 #include "llvm/Analysis/DemandedBits.h"
173 DemandedBits *DB = nullptr,
183 DemandedBits *DB = nullptr,
H A DVectorUtils.h171 class DemandedBits;
268 DemandedBits &DB,
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/
H A DLoopVectorize.h68 class DemandedBits;
139 DemandedBits *DB;
152 DemandedBits &DB_, AliasAnalysis &AA_, AssumptionCache &AC_,
H A DSLPVectorizer.h35 class DemandedBits;
73 DemandedBits *DB = nullptr;
82 DominatorTree *DT_, AssumptionCache *AC_, DemandedBits *DB_,
H A DLoopVectorizationLegality.h204 LoopVectorizationRequirements *R, LoopVectorizeHints *H, DemandedBits *DB,
462 DemandedBits *DB;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DDemandedBits.cpp1 //===- DemandedBits.cpp - Determine demanded bits -------------------------===//
21 #include "llvm/Analysis/DemandedBits.h"
86 void DemandedBits::determineLiveOperandBits(
307 void DemandedBits::performAnalysis() {
324 LLVM_DEBUG(dbgs() << "DemandedBits: Root: " << I << "\n");
358 LLVM_DEBUG(dbgs() << "DemandedBits: Visiting: " << *UserI);
420 APInt DemandedBits::getDemandedBits(Instruction *I) {
432 bool DemandedBits::isInstructionDead(Instruction *I) {
439 bool DemandedBits::isUseDead(Use *U) {
464 void DemandedBits
[all...]
H A DIVDescriptors.cpp112 DemandedBits *DB,
192 DemandedBits *DB,
612 DemandedBits *DB, AssumptionCache *AC,
H A DVectorUtils.cpp15 #include "llvm/Analysis/DemandedBits.h"
369 llvm::computeMinimumValueSizes(ArrayRef<BasicBlock *> Blocks, DemandedBits &DB,
372 // DemandedBits will give us every value's live-out bits. But we want
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DBDCE.cpp20 #include "llvm/Analysis/DemandedBits.h"
40 static void clearAssumptionsOfUsers(Instruction *I, DemandedBits &DB) {
89 static bool bitTrackingDCE(Function &F, DemandedBits &DB) {
113 // DemandedBits only detects dead integer uses.
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp580 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, argument
587 bool Simplified = SimplifyDemandedBits(Op, DemandedBits, Known, TLO);
595 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, argument
604 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, Depth,
611 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
622 if (DemandedBits == 0 || DemandedElts == 0)
637 Src, DemandedBits, DemandedElts, DAG, Depth + 1))
649 APInt Sub = DemandedBits.extractBits(NumSrcEltBits, Offset);
673 DemandedSrcBits.insertBits(DemandedBits, Offset);
691 if (DemandedBits
610 SimplifyMultipleUseDemandedBits( SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, SelectionDAG &DAG, unsigned Depth) const argument
813 APInt DemandedBits = OriginalDemandedBits; local
2623 APInt DemandedBits = APInt::getAllOnesValue(EltSizeInBits); local
2704 SimplifyDemandedBitsForTargetNode( SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, KnownBits &Known, TargetLoweringOpt &TLO, unsigned Depth) const argument
2717 SimplifyMultipleUseDemandedBitsForTargetNode( SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, SelectionDAG &DAG, unsigned Depth) const argument
[all...]
H A DSelectionDAG.cpp2162 /// the bits specified by DemandedBits are used.
2165 SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits) {
2170 return GetDemandedBits(V, DemandedBits, DemandedElts);
2174 /// the bits specified by DemandedBits are used in the elements specified by
2178 SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits,
2187 APInt NewVal = CVal & DemandedBits;
2195 return TLI->SimplifyMultipleUseDemandedBits(V, DemandedBits, DemandedElts,
2206 if (Amt >= DemandedBits.getBitWidth())
2208 APInt SrcDemandedBits = DemandedBits << Amt;
2220 if (DemandedBits
[all...]
H A DDAGCombiner.cpp305 APInt DemandedBits = APInt::getAllOnesValue(BitWidth); local
306 return SimplifyDemandedBits(Op, DemandedBits);
309 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits) { argument
313 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts);
325 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
1056 bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits, argument
1060 if (!TLI.SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO))
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3122 /// Look at Op. At this point, we know that only the DemandedBits bits of the
3135 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
3142 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
3153 /// through" ops that don't contribute to the DemandedBits/DemandedElts -
3155 SDValue SimplifyMultipleUseDemandedBits(SDValue Op, const APInt &DemandedBits,
3237 const APInt &DemandedBits,
3244 /// through" ops that don't contribute to the DemandedBits/DemandedElts -
3247 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
H A DSelectionDAG.h1490 /// only the bits specified by DemandedBits are used. If so, return the
1495 SDValue GetDemandedBits(SDValue V, const APInt &DemandedBits);
1498 /// only the bits specified by DemandedBits are used in the elements specified
1504 SDValue GetDemandedBits(SDValue V, const APInt &DemandedBits,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h962 const APInt &DemandedBits,
969 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
H A DX86ISelLowering.cpp[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp84 #include "llvm/Analysis/DemandedBits.h"
966 const TargetLibraryInfo *TLI, DemandedBits *DB,
1497 DemandedBits *DB;
7552 TargetLibraryInfo *TLI, DemandedBits *DB, AssumptionCache *AC,
7897 DemandedBits &DB_, AliasAnalysis &AA_, AssumptionCache &AC_,
H A DSLPVectorizer.cpp38 #include "llvm/Analysis/DemandedBits.h"
540 DominatorTree *Dt, AssumptionCache *AC, DemandedBits *DB,
2212 DemandedBits *DB;
5614 AssumptionCache *AC_, DemandedBits *DB_,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp978 uint64_t DemandedBits = Demanded.getZExtValue(); local
981 Imm &= DemandedBits;
991 uint64_t NonDemandedBits = ~DemandedBits;
992 uint64_t InvertedImm = ~Imm & DemandedBits;
1013 uint64_t Hi = Imm >> EltSize, DemandedBitsHi = DemandedBits >> EltSize;
1016 if (((Imm ^ Hi) & (DemandedBits & DemandedBitsHi) & Mask) != 0)
1019 // Merge the upper and lower halves of Imm and DemandedBits.
1021 DemandedBits |= DemandedBitsHi;
/freebsd-12-stable/lib/clang/libllvm/
H A DMakefile65 SRCS_MIN+= Analysis/DemandedBits.cpp

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