Searched refs:D0 (Results 1 - 25 of 43) sorted by relevance

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/freebsd-12-stable/sys/contrib/libsodium/src/libsodium/crypto_pwhash/argon2/
H A Dblamka-round-ssse3.h31 #define G1(A0, B0, C0, D0, A1, B1, C1, D1) \
36 D0 = _mm_xor_si128(D0, A0); \
39 D0 = _mm_roti_epi64(D0, -32); \
42 C0 = fBlaMka(C0, D0); \
52 #define G2(A0, B0, C0, D0, A1, B1, C1, D1) \
57 D0 = _mm_xor_si128(D0, A0); \
60 D0
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H A Dblamka-round-avx2.h12 #define G1_AVX2(A0, A1, B0, B1, C0, C1, D0, D1) \
17 D0 = _mm256_xor_si256(D0, A0); \
18 D0 = rotr32(D0); \
20 ml = _mm256_mul_epu32(C0, D0); \
22 C0 = _mm256_add_epi64(C0, _mm256_add_epi64(D0, ml)); \
41 #define G2_AVX2(A0, A1, B0, B1, C0, C1, D0, D1) \
46 D0 = _mm256_xor_si256(D0, A
[all...]
H A Dblamka-round-avx512f.h17 #define G1_AVX512F(A0, B0, C0, D0, A1, B1, C1, D1) \
22 D0 = _mm512_xor_si512(D0, A0); \
25 D0 = ror64(D0, 32); \
28 C0 = muladd(C0, D0); \
38 #define G2_AVX512F(A0, B0, C0, D0, A1, B1, C1, D1) \
43 D0 = _mm512_xor_si512(D0, A0); \
46 D0
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/freebsd-12-stable/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-x86.pl393 my ($D0,$D1,$D2,$D3,$D4,$T0,$T1,$T2)=map("xmm$_",(0..7));
407 &movdqa ($D0,$D4);
411 &pand ($D0,$MASK); # -> base 2^26
425 &movdqa (&QWP(16*0,"esp"),$D0);
448 &pshufd ($T1,$D0,0b01000100);
467 &pmuludq ($D4,$D0); # h4*r0
468 &pmuludq ($D3,$D0); # h3*r0
469 &pmuludq ($D2,$D0); # h2*r0
470 &pmuludq ($D1,$D0); # h1*r0
471 &pmuludq ($D0,
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H A Dpoly1305-c64xplus.pl34 ($D0,$D1,$D2,$D3)= ("A9","B9","A11","B11");
121 [A2] LDNW *${INPB}++[4],$D0 ; load inp[0]
130 || SWAP2 $D0,$D0
134 || SWAP4 $D0,$D0
137 ADDU $D0,B24,$D0:$H0 ; h0+=inp[0]
138 || ADD $D0,B24,B27 ; B-copy of h0+inp[0]
151 || ADDU $D0,
[all...]
H A Dpoly1305-x86_64.pl342 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
835 vpshufd \$0x44,$D4,$D0 # xx12 -> 1212
837 vmovdqa $D0,0x00(%rsp)
839 vmovdqu `16*3-64`($ctx),$D0
848 vpshufd \$0xEE,$D0,$D4
850 vpshufd \$0x44,$D0,$D0
852 vmovdqa $D0,0x30(%rsp)
854 vmovdqu `16*6-64`($ctx),$D0
863 vpshufd \$0xEE,$D0,
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H A Dpoly1305-armv4.pl449 my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14));
502 vmull.u32 $D0,$R0,${R0}[1]
508 vmlal.u32 $D0,$R4,${S1}[1]
514 vmlal.u32 $D0,$R3,${S2}[1]
520 vmlal.u32 $D0,$R2,${S3}[1]
527 vmlal.u32 $D0,$R1,${S4}[1]
583 vshr.u64 $T1,$D0,#26
584 vmovn.i64 $D0#lo,$D0
588 vbic.i32 $D0#l
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H A Dpoly1305-ppc.pl299 $t0,$t1,$t2,$t3, $D0,$D1,$D2,$D3, $d0,$d1,$d2,$d3
428 mulhwu $D0,$h0,$r0
448 adde $D0,$D0,$t1
468 adde $D0,$D0,$t1
488 adde $D0,$D0,$t1
516 addc $h1,$d1,$D0
521 andc $D0,
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H A Dpoly1305-sparcv9.pl282 my ($D0,$D1,$D2,$T0) = map("%g$_",(1..4));
312 ldxa [$inp+%g0]0x88,$D0 ! load little-endian input
317 srlx $D0,$shr,$D0
320 or $T1,$D0,$D0
325 addcc $D0,$H0,$H0 ! accumulate input
330 mulx $R0,$H0,$D0 ! r0*h0
335 addcc $T0,$D0,$D0
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/freebsd-12-stable/crypto/openssl/crypto/chacha/asm/
H A Dchacha-armv8.pl344 my ($A0,$B0,$C0,$D0,$A1,$B1,$C1,$D1,$A2,$B2,$C2,$D2,$T0,$T1,$T2,$T3) =
438 mov $D0,@K[3]
456 my @thread0=&NEONROUND($A0,$B0,$C0,$D0,$T0,0);
467 @thread0=&NEONROUND($A0,$B0,$C0,$D0,$T0,1);
493 add $D0,$D0,@K[3]
546 eor $D0,$D0,$T3
559 st1.8 {$A0-$D0},[$out],#64
560 ld1.8 {$A0-$D0},[
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H A Dchacha-ppc.pl410 my ($A0,$B0,$C0,$D0,$A1,$B1,$C1,$D1,$A2,$B2,$C2,$D2)
576 vmr $D0,@K[3]
597 my @thread0=&VMXROUND($A0,$B0,$C0,$D0,0);
613 @thread0=&VMXROUND($A0,$B0,$C0,$D0,1);
666 vadduwm $D0,$D0,@K[3]
756 vxor $D0,$D0,@D[3]
764 vperm $D0,$D0,
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h78 case D3: case D2: case D1: case D0:
H A DARMExpandPseudoInsts.cpp436 const TargetRegisterInfo *TRI, unsigned &D0,
439 D0 = TRI->getSubReg(Reg, ARM::dsub_0);
444 D0 = TRI->getSubReg(Reg, ARM::dsub_4);
449 D0 = TRI->getSubReg(Reg, ARM::dsub_3);
454 D0 = TRI->getSubReg(Reg, ARM::dsub_0);
460 D0 = TRI->getSubReg(Reg, ARM::dsub_1);
500 unsigned D0, D1, D2, D3; local
501 GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3);
502 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
628 unsigned D0, D local
435 GetDSubRegs(unsigned Reg, NEONRegSpacing RegSpc, const TargetRegisterInfo *TRI, unsigned &D0, unsigned &D1, unsigned &D2, unsigned &D3) argument
764 unsigned D0, D1, D2, D3; local
1605 Register D0 = TRI->getSubReg(DstReg, ARM::dsub_0); local
1637 Register D0 = TRI->getSubReg(SrcReg, ARM::dsub_0); local
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H A DARMCallingConv.cpp162 static const MCPhysReg DRegList[] = { ARM::D0, ARM::D1, ARM::D2, ARM::D3,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp51 R == Hexagon::R3 || R == Hexagon::D0 || R == Hexagon::D1;
63 D0, D1, D2, D3, D4, D5, D6, D7, 0
H A DHexagonFrameLowering.cpp247 if (Reg < Hexagon::D0 || Reg > Hexagon::D15)
930 Hexagon::D0, Hexagon::D1, Hexagon::D8, Hexagon::D9,
963 if (Reg < Hexagon::D0 || Reg > Hexagon::D15) {
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.cpp32 static const MCPhysReg DRegList[] = {AArch64::D0, AArch64::D1, AArch64::D2,
H A DAArch64PBQPRegAlloc.cpp112 case AArch64::D0:
H A DAArch64AsmPrinter.cpp948 assert(AArch64::D0 <= DestReg && DestReg <= AArch64::D31);
949 DestReg = AArch64::Q0 + (DestReg - AArch64::D0);
/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.h43 MAP(D0, 80) \
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h111 case AArch64::D0: return AArch64::B0;
151 case AArch64::B0: return AArch64::D0;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp585 Hexagon::D0, Hexagon::D1, Hexagon::D2, Hexagon::D3,
596 Hexagon::D0, Hexagon::D1, Hexagon::D2, Hexagon::D3,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp236 case D0:
560 return ((Reg >= Hexagon::D0 && Reg <= Hexagon::D3) ||
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp163 {codeview::RegisterId::ARM64_D0, AArch64::D0},
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp149 Sparc::D0, Sparc::D1, Sparc::D2, Sparc::D3,
448 regIdx = Reg - Sparc::D0;

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