Searched refs:CR0 (Results 1 - 16 of 16) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/clang/lib/Headers/ |
H A D | htmintrin.h | 26 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)
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/freebsd-12-stable/sys/dev/xdma/controller/ |
H A D | pl330.h | 71 #define CR0 0xE00 /* Configuration Register 0 */ macro
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/freebsd-12-stable/sys/sys/ |
H A D | ioctl_compat.h | 104 #define CR0 0x00000000 macro
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/freebsd-12-stable/include/rpcsvc/ |
H A D | rex.x | 124 const CR0 = 0x00000000;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCCodeEmitter.cpp | 242 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); 269 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
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H A D | PPCMCTargetDesc.h | 186 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, \
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H A D | PPCInstPrinter.cpp | 431 case PPC::CR0: RegNo = 0; break;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.h | 30 Reg = PPC::CR0;
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H A D | PPCInstrInfo.cpp | 1788 if (&*I != &CmpInstr && (Instr.modifiesRegister(PPC::CR0, TRI) || 1789 Instr.readsRegister(PPC::CR0, TRI))) 1899 .addReg(PPC::CR0, MIOpC != NewOpC ? RegState::Kill : 0); 1901 // Even if CR0 register were dead before, it is alive now since the 1903 MI->clearRegisterDeads(PPC::CR0); 1976 assert(MI->definesRegister(PPC::CR0) && 2283 // CR0 if the original instruction was a record-form instruction). 2296 .addImm(LII.Imm).addReg(PPC::CR0, RegState::ImplicitDefine); 3787 // setting CR0) 3797 // Shifts by zero don't change the value. If we don't need to set CR0, [all...] |
H A D | PPCRegisterInfo.cpp | 639 /// rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. 665 // If the saved register wasn't CR0, shift the bits left so that they are in 666 // CR0's slot. 667 if (SrcReg != PPC::CR0) { 710 // If the reloaded register isn't CR0, shift the bits right so that they are 712 if (DestReg != PPC::CR0) {
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H A D | PPCISelLowering.cpp | 10739 BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0) 10742 BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0) 10746 .addImm(CmpPred).addReg(PPC::CR0).addMBB(exitMBB); 10754 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); 10925 BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0) 10930 .addReg(PPC::CR0) 10943 .addReg(PPC::CR0) 11555 BuildMI(BB, dl, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0) 11560 .addReg(PPC::CR0) 11572 .addReg(PPC::CR0) [all...] |
H A D | PPCISelDAGToDAG.cpp | 2598 SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32); 2647 // Select this node to a single bit from CR0 set by the record-form node 4853 SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32);
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/freebsd-12-stable/tools/tools/nanobsd/ |
H A D | defaults.sh | 290 CR0 ( ) { function 804 CR0 "${PKGCMD} info"
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | GuardWidening.cpp | 513 ConstantRange CR0 = 519 // CR0 and CR1, while SupersetIntersect is a superset of the actual 522 // of CR0 and CR1, and can use the same to generate an icmp instruction. 527 auto SubsetIntersect = CR0.inverse().unionWith(CR1.inverse()).inverse(); 528 auto SupersetIntersect = CR0.intersectWith(CR1);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.h | 363 ENTRY(CR0) \
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/freebsd-12-stable/stand/i386/btx/btx/ |
H A D | btx.S | 245 movl %cr0,%eax # Get CR0
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