Searched refs:BPF (Results 1 - 21 of 21) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFFrameLowering.cpp1 //===-- BPFFrameLowering.cpp - BPF Frame Information ----------------------===//
9 // This file contains the BPF implementation of TargetFrameLowering class.
35 SavedRegs.reset(BPF::R6);
36 SavedRegs.reset(BPF::R7);
37 SavedRegs.reset(BPF::R8);
38 SavedRegs.reset(BPF::R9);
H A DBPFMISimplifyPatchable.cpp27 #include "BPF.h"
85 LLVM_DEBUG(dbgs() << "*** BPF simplify patchable insts pass ***\n\n");
108 if (Opcode == BPF::LDB || Opcode == BPF::LDH || Opcode == BPF::LDW ||
109 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH ||
110 Opcode == BPF::STW || Opcode == BPF
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H A DBPFInstrInfo.cpp1 //===-- BPFInstrInfo.cpp - BPF Instruction Information ----------*- C++ -*-===//
9 // This file contains the BPF implementation of the TargetInstrInfo class.
14 #include "BPF.h"
29 : BPFGenInstrInfo(BPF::ADJCALLSTACKDOWN, BPF::ADJCALLSTACKUP) {}
35 if (BPF::GPRRegClass.contains(DestReg, SrcReg))
36 BuildMI(MBB, I, DL, get(BPF::MOV_rr), DestReg)
38 else if (BPF::GPR32RegClass.contains(DestReg, SrcReg))
39 BuildMI(MBB, I, DL, get(BPF::MOV_rr_32), DestReg)
57 LdOpc = BPF
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H A DBPFRegisterInfo.cpp1 //===-- BPFRegisterInfo.cpp - BPF Register Information ----------*- C++ -*-===//
9 // This file contains the BPF implementation of the TargetRegisterInfo class.
14 #include "BPF.h"
30 : BPFGenRegisterInfo(BPF::R0) {}
39 markSuperRegs(Reserved, BPF::W10); // [W|R]10 is read only frame pointer
40 markSuperRegs(Reserved, BPF::W11); // [W|R]11 is pseudo stack pointer
49 "Looks like the BPF stack limit of 512 bytes is exceeded. "
50 "Please move large on stack variables into BPF per-cpu array map.\n",
84 if (MI.getOpcode() == BPF::MOV_rr) {
90 BuildMI(MBB, ++II, DL, TII.get(BPF
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H A DBPFMIPeephole.cpp23 #include "BPF.h"
80 LLVM_DEBUG(dbgs() << "*** BPF MachineSSA ZEXT Elim peephole pass ***\n\n");
97 if (MRI->getRegClass(Reg) == &BPF::GPRRegClass)
125 if (PhiDef->getOpcode() == BPF::COPY && !isCopyFrom32Def(PhiDef))
144 } else if (DefInsn->getOpcode() == BPF::COPY) {
185 if (MI.getOpcode() == BPF::SRL_ri &&
196 SllMI->getOpcode() != BPF::SLL_ri ||
206 MovMI->getOpcode() != BPF::MOV_32_64)
219 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::SUBREG_TO_REG), DstReg)
220 .addImm(0).addReg(SubReg).addImm(BPF
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H A DBPFMIChecking.cpp17 #include "BPF.h"
62 LLVM_DEBUG(dbgs() << "*** BPF PreEmit checking pass ***\n\n");
68 // NOTE: BPF backend hasn't enabled sub-register liveness track, so when the
74 // on BPF backend, then allDefsAreDead could work on GPR32 Def. This requires
75 // implementing TargetSubtargetInfo::enableSubRegLiveness on BPF.
83 // For BPF, each 64-bit register could only have one 32-bit sub-register. This
94 // Hence, for BPF, we enhance MachineInstr::allDefsAreDead. Given the solo
108 &BPFMCRegisterClasses[BPF::GPRRegClassID];
159 if (MI.getOpcode() != BPF::XADDW &&
160 MI.getOpcode() != BPF
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H A DBPFISelLowering.cpp1 //===-- BPFISelLowering.cpp - BPF DAG Lowering Implementation ------------===//
9 // This file defines the interfaces that BPF uses to lower LLVM code into a
15 #include "BPF.h"
62 addRegisterClass(MVT::i64, &BPF::GPRRegClass);
64 addRegisterClass(MVT::i32, &BPF::GPR32RegClass);
69 setStackPointerRegisterToSaveRestore(BPF::R11);
182 return std::make_pair(0U, &BPF::GPRRegClass);
240 SimpleTy == MVT::i64 ? &BPF::GPRRegClass : &BPF::GPR32RegClass);
288 // BPF targe
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H A DBTFDebug.cpp14 #include "BPF.h"
1031 if (MI->getOpcode() == BPF::LD_imm64) {
1044 } else if (MI->getOpcode() == BPF::CORE_MEM ||
1045 MI->getOpcode() == BPF::CORE_ALU32_MEM ||
1046 MI->getOpcode() == BPF::CORE_SHIFT) {
1049 } else if (MI->getOpcode() == BPF::JAL) {
1168 if (MI->getOpcode() == BPF::LD_imm64) {
1176 OutMI.setOpcode(BPF::MOV_ri);
1182 } else if (MI->getOpcode() == BPF::CORE_MEM ||
1183 MI->getOpcode() == BPF
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H A DBPFISelDAGToDAG.cpp1 //===-- BPFISelDAGToDAG.cpp - A dag to dag inst selector for BPF ----------===//
9 // This file defines a DAG pattern matching instruction selector for BPF,
10 // converting from a legalized dag to a BPF dag.
14 #include "BPF.h"
52 return "BPF DAG->DAG Pattern Instruction Selection";
99 // ComplexPattern used on BPF Load/Store instructions
135 // ComplexPattern used on BPF FI instruction
217 SDValue R6Reg = CurDAG->getRegister(BPF::R6, MVT::i64);
230 unsigned Opc = BPF::MOV_rr;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp1 //===- BPFDisassembler.cpp - Disassembler for BPF ---------------*- C++ -*-===//
9 // This file is part of the BPF Disassembler.
33 /// A disassembler class for BPF.
97 BPF::R0, BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5,
98 BPF
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/freebsd-12-stable/contrib/llvm-project/clang/lib/Basic/Targets/
H A DBPF.cpp1 //===--- BPF.cpp - Implement BPF target feature support -------------------===//
9 // This file implements BPF TargetInfo objects.
13 #include "BPF.h"
46 return llvm::makeArrayRef(BuiltinInfo, clang::BPF::LastTSBuiltin -
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===//
101 if (MI.getOpcode() == BPF::JAL)
104 else if (MI.getOpcode() == BPF::LD_imm64)
128 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
157 // Encode BPF Memory Operand
H A DBPFMCTargetDesc.cpp1 //===-- BPFMCTargetDesc.cpp - BPF Target Descriptions ---------------------===//
9 // This file provides BPF specific target descriptions.
43 InitBPFMCRegisterInfo(X, BPF::R11 /* RAReg doesn't exist */);
/freebsd-12-stable/contrib/llvm-project/clang/include/clang/Basic/
H A DTargetBuiltins.h55 /// BPF builtins
56 namespace BPF { namespace in namespace:clang
/freebsd-12-stable/lib/clang/libllvm/
H A DMakefile21 .for arch in AArch64 ARM BPF Mips PowerPC RISCV Sparc X86
1084 SRCS_MIN+= Target/BPF/AsmParser/BPFAsmParser.cpp
1085 SRCS_MIN+= Target/BPF/BPFAbstractMemberAccess.cpp
1086 SRCS_MIN+= Target/BPF/BPFAsmPrinter.cpp
1087 SRCS_MIN+= Target/BPF/BPFFrameLowering.cpp
1088 SRCS_MIN+= Target/BPF/BPFISelDAGToDAG.cpp
1089 SRCS_MIN+= Target/BPF/BPFISelLowering.cpp
1090 SRCS_MIN+= Target/BPF/BPFInstrInfo.cpp
1091 SRCS_MIN+= Target/BPF/BPFMCInstLower.cpp
1092 SRCS_MIN+= Target/BPF/BPFMICheckin
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/freebsd-12-stable/contrib/ipfilter/ipsend/
H A DMakefile10 BPF=sbpf.o macro
34 @echo " sunos4-bpf (SunOS4.1.x with BPF in the kernel)"
35 @echo " bsd-bpf (4.4BSD variant with BPF in the kernel)"
67 make ipsend "OBJS=$(OBJS)" "UNIXOBJS=$(BPF) $(SUNOS4)" "CC=$(CC)" \
69 make ipresend "ROBJS=$(ROBJS)" "UNIXOBJS=$(BPF) $(SUNOS4)" "CC=$(CC)" \
71 make iptest "TOBJS=$(TOBJS)" "UNIXOBJS=$(BPF) $(SUNOS4)" "CC=$(CC)" \
92 make ipsend "OBJS=$(OBJS)" "UNIXOBJS=$(BPF) $(BSD)" "CC=$(CC)" \
94 make ipresend "ROBJS=$(ROBJS)" "UNIXOBJS=$(BPF) $(BSD)" "CC=$(CC)" \
96 make iptest "TOBJS=$(TOBJS)" "UNIXOBJS=$(BPF) $(BSD)" "CC=$(CC)" \
/freebsd-12-stable/lib/libnetgraph/
H A Ddebug.c138 COOKIE(BPF),
/freebsd-12-stable/sys/cam/scsi/
H A Dscsi_ses.h1615 GEN_SES_STATUS_UPS_ACCESSORS(bpf, BPF)
/freebsd-12-stable/lib/clang/libclang/
H A DMakefile203 SRCS_MIN+= Basic/Targets/BPF.cpp
/freebsd-12-stable/contrib/llvm-project/clang/lib/Sema/
H A DSemaChecking.cpp2052 assert(BuiltinID == BPF::BI__builtin_preserve_field_info &&
2060 // to BPF backend to check whether the access is a
/freebsd-12-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp9638 assert(BuiltinID == BPF::BI__builtin_preserve_field_info &&

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