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Searched refs:ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK (Results 1 - 2 of 2) sorted by relevance

/freebsd-11.0-release/sys/arm/xilinx/
H A D	zy7_slcr.c	`365 reg &= ~(ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK \| 414 div1 = (reg & ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK) >>`
H A D	zy7_slcr.h	`152 #define ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK (0x3f << 20) macro`

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