Searched refs:RegSubRegPairAndIdx (Results 1 - 5 of 5) sorted by relevance
| /freebsd-11.0-release/contrib/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 354 struct RegSubRegPairAndIdx : RegSubRegPair { struct in class:llvm::TargetInstrInfo
356 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, function in struct:llvm::TargetInstrInfo::RegSubRegPairAndIdx
380 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
398 RegSubRegPairAndIdx &InputReg) const;
419 RegSubRegPairAndIdx &InsertedReg) const;
892 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const {
906 RegSubRegPairAndIdx &InputReg) const {
921 RegSubRegPairAndIdx &InsertedReg) const {
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| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 57 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
70 RegSubRegPairAndIdx &InputReg) const override;
87 RegSubRegPairAndIdx &InsertedReg) const override;
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| H A D | ARMBaseInstrInfo.cpp | 4566 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const {
4579 RegSubRegPairAndIdx(MOReg->getReg(), MOReg->getSubReg(), ARM::ssub_0));
4583 RegSubRegPairAndIdx(MOReg->getReg(), MOReg->getSubReg(), ARM::ssub_1));
4591 RegSubRegPairAndIdx &InputReg) const {
4612 RegSubRegPairAndIdx &InsertedReg) const {
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| /freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1140 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const {
1157 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(),
1165 RegSubRegPairAndIdx &InputReg) const {
1188 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const {
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| H A D | PeepholeOptimizer.cpp | 1743 SmallVector<TargetInstrInfo::RegSubRegPairAndIdx, 8> RegSeqInputRegs;
1782 TargetInstrInfo::RegSubRegPairAndIdx InsertedReg;
1835 TargetInstrInfo::RegSubRegPairAndIdx ExtractSubregInputReg;
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