/freebsd-11.0-release/crypto/openssl/crypto/sha/asm/ |
H A D | sha512-ppc.pl | 77 $ROR="rotrdi"; 89 $ROR="rotrwi"; 127 $ROR $a0,$e,$Sigma1[0] 128 $ROR $a1,$e,$Sigma1[1] 133 $ROR $a1,$a1,`$Sigma1[2]-$Sigma1[1]` 140 $ROR $a0,$a,$Sigma0[0] 141 $ROR $a1,$a,$Sigma0[1] 145 $ROR $a1,$a1,`$Sigma0[2]-$Sigma0[1]` 166 $ROR $a0,@X[($i+1)%16],$sigma0[0] 167 $ROR [all...] |
H A D | sha1-thumb.pl | 50 add $t2,$e @ E+=ROR(A,27) 60 orr $c,$b @ C=ROR(B,2)
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64AddressingModes.h | 37 ROR, enumerator in enum:llvm::AArch64_AM::ShiftExtendType 58 case AArch64_AM::ROR: return "ror"; 79 case 3: return AArch64_AM::ROR; 107 case AArch64_AM::ROR: STEnc = 3; break;
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/freebsd-11.0-release/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/ |
H A D | ARMUtils.h | 190 static inline uint32_t ROR(const uint32_t value, const uint32_t amount, bool *success) function in namespace:lldb_private
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/freebsd-11.0-release/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1229 R[t] = ROR(data, 8*UInt(address<1:0>)); 3283 // A8.6.139 ROR (immediate) -- Encoding T1 3326 // A8.6.139 ROR (immediate) 5899 R[t] = ROR(data, 8*UInt(address<1:0>)); 6007 // R[t] = ROR(data, 8*UInt(address<1:0>)); 6008 data = ROR (data, Bits32 (address, 1, 0), &success); 6040 R[t] = ROR(data, 8*UInt(address<1:0>)); 6215 // R[t] = ROR(data, 8*UInt(address<1:0>)); 6216 data = ROR (data, Bits32 (address, 1, 0), &success); 7906 rotated = ROR( [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 994 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || 1060 // A logical shifter is LSL, LSR, ASR or ROR. 1063 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && 2410 .Case("ror", AArch64_AM::ROR) 2431 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR ||
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.h | 503 ROR, enumerator in enum:llvm::AArch64SE::ShiftExtSpecifiers
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/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 2075 case Mips::ROR: 3263 if (Inst.getOpcode() == Mips::ROR) { 3280 case Mips::ROR:
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 323 return AArch64_AM::ROR; 339 /// instructions do not. The AllowROR parameter specifies whether ROR is 346 if (!AllowROR && ShType == AArch64_AM::ROR)
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 3786 if (SDValue ROR = ReassociateOps(ISD::OR, SDLoc(N), N0, N1)) 3787 return ROR;
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