Searched refs:OpName (Results 1 - 25 of 26) sorted by relevance

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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp76 NewMI->getOperand(getOperandIdx(*NewMI, AMDGPU::OpName::src0))
154 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) == -1;
158 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) != -1;
260 AMDGPU::OpName::src0,
261 AMDGPU::OpName::src1,
262 AMDGPU::OpName::src2
271 {AMDGPU::OpName::src0, AMDGPU::OpName::src0_sel},
272 {AMDGPU::OpName::src1, AMDGPU::OpName
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H A DSIShrinkInstructions.cpp90 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
103 TII->hasModifiersSet(MI, AMDGPU::OpName::src2_modifiers))
112 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
114 TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers);
121 if (TII->hasModifiersSet(MI, AMDGPU::OpName::src0_modifiers))
125 if (TII->hasModifiersSet(MI, AMDGPU::OpName::omod))
128 if (TII->hasModifiersSet(MI, AMDGPU::OpName::clamp))
147 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0);
272 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
292 int Op32DstIdx = AMDGPU::getNamedOperandIdx(Op32, AMDGPU::OpName
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H A DR600ExpandSpecialInstrs.cpp83 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst);
90 AMDGPU::OpName::pred_sel);
92 AMDGPU::OpName::pred_sel);
112 TII->setImmOperand(PredSet, AMDGPU::OpName::update_exec_mask, 1);
114 TII->setImmOperand(PredSet, AMDGPU::OpName::update_pred, 1);
223 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0))
226 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1))
273 TII->getOperandIdx(MI, AMDGPU::OpName::dst)).getReg();
275 TII->getOperandIdx(MI, AMDGPU::OpName::src0)).getReg();
280 int Src1Idx = TII->getOperandIdx(MI, AMDGPU::OpName
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H A DR600ClauseMergePass.cpp77 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm();
83 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm();
88 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT);
107 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT);
119 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE0);
121 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK0);
123 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR0);
135 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE1);
137 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK1);
139 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName
[all...]
H A DSILoadStoreOptimizer.cpp175 int AddrIdx = AMDGPU::getNamedOperandIdx(I->getOpcode(), AMDGPU::OpName::addr);
184 AMDGPU::OpName::offset);
215 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr);
217 const MachineOperand *Dest0 = TII->getNamedOperand(*I, AMDGPU::OpName::vdst);
218 const MachineOperand *Dest1 = TII->getNamedOperand(*Paired, AMDGPU::OpName::vdst);
221 = TII->getNamedOperand(*I, AMDGPU::OpName::offset)->getImm() & 0xffff;
223 = TII->getNamedOperand(*Paired, AMDGPU::OpName::offset)->getImm() & 0xffff;
310 const MachineOperand *Addr = TII->getNamedOperand(*I, AMDGPU::OpName::addr);
311 const MachineOperand *Data0 = TII->getNamedOperand(*I, AMDGPU::OpName::data0);
313 = TII->getNamedOperand(*Paired, AMDGPU::OpName
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H A DR600Packetizer.cpp90 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::write);
93 int DstIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::dst);
135 AMDGPU::OpName::src0,
136 AMDGPU::OpName::src1,
137 AMDGPU::OpName::src2
193 int OpI = TII->getOperandIdx(MII->getOpcode(), AMDGPU::OpName::pred_sel),
194 OpJ = TII->getOperandIdx(MIJ->getOpcode(), AMDGPU::OpName::pred_sel);
230 unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::last);
308 AMDGPU::OpName::bank_swizzle);
312 AMDGPU::OpName
[all...]
H A DSIInstrInfo.cpp52 static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) { argument
56 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName);
57 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName);
122 if (AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::data1) != -1 ||
123 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::data1) != -1)
159 if (!nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::soffset) ||
161 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::vaddr) ||
162 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc))
165 int OffIdx0 = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset);
166 int OffIdx1 = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName
[all...]
H A DR600ISelLowering.cpp210 int DstIdx = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst);
275 TII->setImmOperand(NewMI, AMDGPU::OpName::src0_sel,
2078 bool HasDst = TII->getOperandIdx(Opcode, AMDGPU::OpName::dst) > -1;
2089 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0),
2090 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1),
2091 TII->getOperandIdx(Opcode, AMDGPU::OpName::src2),
2092 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_X),
2093 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_Y),
2094 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_Z),
2095 TII->getOperandIdx(Opcode, AMDGPU::OpName
[all...]
H A DAMDGPUInstrInfo.cpp112 AMDGPU::OpName::addr);
117 AMDGPU::OpName::chan);
120 AMDGPU::OpName::dst);
134 AMDGPU::OpName::val);
H A DR600Defines.h65 namespace OpName { namespace
H A DSIInstrInfo.h327 unsigned OpName) const;
453 unsigned OpName) const {
454 return getNamedOperand(const_cast<MachineInstr &>(MI), OpName);
458 int64_t getNamedImmOperand(const MachineInstr &MI, unsigned OpName) const {
459 int Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), OpName);
H A DSIRegisterInfo.cpp375 TII->getNamedOperand(*MI, AMDGPU::OpName::src)->getReg(),
376 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_rsrc)->getReg(),
377 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_offset)->getReg(),
388 TII->getNamedOperand(*MI, AMDGPU::OpName::dst)->getReg(),
389 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_rsrc)->getReg(),
390 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_offset)->getReg(),
H A DSIInsertWaits.cpp213 MachineOperand *Data = TII->getNamedOperand(MI, AMDGPU::OpName::data);
217 MachineOperand *Data0 = TII->getNamedOperand(MI, AMDGPU::OpName::data0);
221 MachineOperand *Data1 = TII->getNamedOperand(MI, AMDGPU::OpName::data1);
H A DSIFoldOperands.cpp148 (int)OpNo == AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2)) {
H A DR600MachineScheduler.cpp360 int DstIndex = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst);
/freebsd-11.0-release/sys/contrib/dev/acpica/compiler/
H A Dasloffset.c62 char *OpName,
337 * OpName - Name of the AML opcode
354 char *OpName,
386 Offset, ACPI_FORMAT_UINT64 (Value), OpName);
349 LsEmitOffsetTableEntry( UINT32 FileId, ACPI_NAMESPACE_NODE *Node, UINT32 NamepathOffset, UINT32 Offset, char *OpName, UINT64 Value, UINT8 AmlOpcode, UINT16 ParentOpcode) argument
/freebsd-11.0-release/contrib/llvm/tools/clang/lib/AST/
H A DDeclarationName.cpp175 const char *OpName = OperatorNames[N.getCXXOverloadedOperator()]; local
176 assert(OpName && "not an overloaded operator");
179 if (OpName[0] >= 'a' && OpName[0] <= 'z')
181 return OS << OpName;
/freebsd-11.0-release/contrib/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp162 std::string OpName = Op.substr(1); local
166 std::string::size_type DotIdx = OpName.find_first_of(".");
168 SubOpName = OpName.substr(DotIdx+1);
171 OpName = OpName.substr(0, DotIdx);
174 unsigned OpIdx = getOperandNamed(OpName);
277 std::string OpName = P.first; local
279 if (OpName.empty()) break;
282 std::pair<unsigned,unsigned> Op = ParseOperandName(OpName, false);
H A DCodeGenDAGPatterns.cpp2086 TreePatternNode *TreePattern::ParseTreePattern(Init *TheInit, StringRef OpName){ argument
2097 OpName);
2101 if (R->getName() == "node" && !OpName.empty()) {
2102 if (OpName.empty())
2104 Args.push_back(OpName);
2107 Res->setName(OpName);
2113 if (OpName.empty())
2116 Args.push_back(OpName);
2117 Res->setName(OpName);
2122 if (!OpName
3001 const std::string &OpName = CGI.Operands[i].Name; local
3033 const std::string &OpName = Op.Name; local
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H A DFastISelEmitter.cpp413 static std::string getLegalCName(std::string OpName) {
414 std::string::size_type pos = OpName.find("::");
416 OpName.replace(pos, 2, "_");
417 return OpName;
H A DAsmMatcherEmitter.cpp695 void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
697 void buildAliasOperandReference(MatchableInfo *II, StringRef OpName,
1699 const std::string &OpName = OpInfo->Name; local
1712 TheDef->getName() + "' has operand '" + OpName +
H A DCodeGenDAGPatterns.h632 TreePatternNode *ParseTreePattern(Init *DI, StringRef OpName);
/freebsd-11.0-release/contrib/llvm/tools/clang/lib/Sema/
H A DSemaOverload.cpp6705 DeclarationName OpName = Context.DeclarationNames.getCXXOperatorName(Op); local
6729 LookupResult Operators(*this, OpName, OpLoc, LookupOrdinaryName);
11007 DeclarationName OpName =
11009 LookupResult R(SemaRef, OpName, OpLoc, Sema::LookupOperatorName);
11337 DeclarationName OpName = Context.DeclarationNames.getCXXOperatorName(Op);
11339 DeclarationNameInfo OpNameInfo(OpName, OpLoc);
11385 AddArgumentDependentLookupCandidates(OpName, OpLoc, ArgsArray,
11525 DeclarationName OpName = Context.DeclarationNames.getCXXOperatorName(Op);
11547 DeclarationNameInfo OpNameInfo(OpName, OpLoc);
11595 AddArgumentDependentLookupCandidates(OpName, OpLo
[all...]
H A DSemaExpr.cpp1524 DeclarationName OpName = local
1526 DeclarationNameInfo OpNameInfo(OpName, UDSuffixLoc);
1529 LookupResult R(S, OpName, UDSuffixLoc, Sema::LookupOrdinaryName);
1612 DeclarationName OpName = local
1614 DeclarationNameInfo OpNameInfo(OpName, UDSuffixLoc);
1621 LookupResult R(*this, OpName, UDSuffixLoc, LookupOrdinaryName);
3228 DeclarationName OpName = local
3230 DeclarationNameInfo OpNameInfo(OpName, UDSuffixLoc);
3237 LookupResult R(*this, OpName, UDSuffixLoc, LookupOrdinaryName);
H A DSemaLookup.cpp2722 DeclarationName OpName = Context.DeclarationNames.getCXXOperatorName(Op);
2723 LookupResult Operators(*this, OpName, SourceLocation(), LookupOperatorName);

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