/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | SILoadStoreOptimizer.cpp | 66 unsigned Offset1, 135 unsigned Offset1, 139 if (Offset0 == Offset1) 143 if ((Offset0 % Size != 0) || (Offset1 % Size != 0)) 147 unsigned EltOffset1 = Offset1 / Size; 186 unsigned Offset1 = MBBI->getOperand(OffsetIdx).getImm() & 0xffff; local 189 if (offsetsCanBeCombined(Offset0, Offset1, EltSize)) 222 unsigned Offset1 local 226 unsigned NewOffset1 = Offset1 / EltSize; 318 unsigned Offset1 local 134 offsetsCanBeCombined(unsigned Offset0, unsigned Offset1, unsigned Size) argument [all...] |
H A D | AMDGPUInstrInfo.cpp | 206 int64_t Offset0, int64_t Offset1, 208 assert(Offset1 > Offset0 && 214 return (NumLoads <= 16 && (Offset1 - Offset0) < 64); 205 shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0, int64_t Offset1, unsigned NumLoads) const argument
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H A D | AMDGPUInstrInfo.h | 118 int64_t Offset1, int64_t Offset2,
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H A D | AMDGPUISelDAGToDAG.cpp | 97 SDValue &Offset1) const; 851 SDValue &Offset1) const { 864 Offset1 = CurDAG->getTargetConstant(DWordOffset1, DL, MVT::i8); 890 Offset1 = CurDAG->getTargetConstant(DWordOffset1, DL, MVT::i8); 907 Offset1 = CurDAG->getTargetConstant(DWordOffset1, DL, MVT::i8); 915 Offset1 = CurDAG->getTargetConstant(1, DL, MVT::i8);
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H A D | SIInstrInfo.cpp | 94 int64_t &Offset1) const { 127 Offset1 = cast<ConstantSDNode>(Load1->getOperand(2))->getZExtValue(); 151 Offset1 = Load1Offset->getZExtValue(); 185 Offset1 = cast<ConstantSDNode>(Off1)->getZExtValue(); 231 uint8_t Offset1 = Offset1Imm->getImm(); local 233 if (Offset1 > Offset0 && Offset1 - Offset0 == 1) { 1183 unsigned BaseReg1, Offset1; 1186 getMemOpBaseRegImmOfs(MIb, BaseReg1, Offset1, &RI)) { 1192 offsetsDoNotOverlap(Width0, Offset0, Width1, Offset1)) { [all...] |
H A D | SIInstrInfo.h | 87 int64_t &Offset1,
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGSDNodes.cpp | 225 int64_t Offset1, Offset2; local 226 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || 227 Offset1 == Offset2) 231 if (O2SMap.insert(std::make_pair(Offset1, Base)).second) 232 Offsets.push_back(Offset1); 235 if (Offset2 < Offset1)
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H A D | DAGCombiner.cpp | 9724 APInt Offset1 = cast<ConstantSDNode>(Offset)->getAPIntValue(); local 9735 if (X1 * Y0 * Y1 < 0) CNV = CNV + Offset1; 9736 else CNV = CNV - Offset1; 14479 int64_t Offset1, Offset2; local 14483 Base1, Offset1, GV1, CV1); 14489 return !((Offset1 + (Op0->getMemoryVT().getSizeInBits() >> 3)) <= Offset2 || 14490 (Offset2 + (Op1->getMemoryVT().getSizeInBits() >> 3)) <= Offset1); 14498 Offset1 += MFI->getObjectOffset(cast<FrameIndexSDNode>(Base1)->getIndex()); 14500 return !((Offset1 + (Op0->getMemoryVT().getSizeInBits() >> 3)) <= Offset2 || 14501 (Offset2 + (Op1->getMemoryVT().getSizeInBits() >> 3)) <= Offset1); [all...] |
H A D | SelectionDAG.cpp | 5014 // If this is (FI+Offset1)+Offset2, we can model it. 7068 int64_t Offset1 = 0; local 7070 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1); 7073 return Offset1 == (Offset2 + Dist*Bytes);
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 215 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 227 int64_t Offset1, int64_t Offset2,
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H A D | ARMBaseInstrInfo.cpp | 1546 int64_t &Offset1, 1607 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); 1627 int64_t Offset1, int64_t Offset2, 1632 assert(Offset2 > Offset1); 1634 if ((Offset2 - Offset1) / 8 > 64) 1545 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const argument 1626 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 407 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 419 int64_t Offset1, int64_t Offset2,
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H A D | X86InstrInfo.cpp | 6391 int64_t &Offset1, int64_t &Offset2) const { 6487 Offset1 = cast<ConstantSDNode>(Load1->getOperand(3))->getSExtValue(); 6496 int64_t Offset1, int64_t Offset2, 6498 assert(Offset2 > Offset1); 6499 if ((Offset2 - Offset1) / 8 > 64) 6390 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const argument 6495 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
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/freebsd-11.0-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetInstrInfo.h | 957 int64_t &Offset1, int64_t &Offset2) const { 970 int64_t Offset1, int64_t Offset2, 956 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const argument 969 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
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/freebsd-11.0-release/contrib/llvm/lib/Transforms/Scalar/ |
H A D | SeparateConstOffsetFromGEP.cpp | 1246 Value *Offset1 = First->getOperand(1); local 1249 Second->setOperand(1, Offset1);
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H A D | MemCpyOptimizer.cpp | 120 int64_t Offset1 = GetOffsetFromIndex(GEP1, Idx, VariableIdxFound, DL); local 124 Offset = Offset2-Offset1;
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/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 9255 int64_t Offset1 = 0, Offset2 = 0; local 9256 getBaseWithConstantOffset(Loc, Base1, Offset1, DAG); 9258 if (Base1 == Base2 && Offset1 == (Offset2 + Dist * Bytes)) 9264 Offset1 = 0; 9266 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 9269 return Offset1 == (Offset2 + Dist*Bytes);
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