/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXFMAMutate.cpp | 60 LiveIntervals *LIS; member in struct:__anon2993::PPCVSXFMAMutate 102 SlotIndex FMAIdx = LIS->getInstructionIndex(MI); 105 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn(); 111 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def); 174 if (LIS->getInterval(MI->getOperand(2).getReg()) 178 } else if (LIS->getInterval(MI->getOperand(3).getReg()) 195 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) 261 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); 279 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); 288 LIS [all...] |
H A D | PPCTLSDynamicCall.cpp | 50 LiveIntervals *LIS; member in struct:__anon2988::PPCTLSDynamicCall 135 LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs); 145 LIS = &getAnalysis<LiveIntervals>();
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 39 LiveInterval &LI = LIS.createEmptyInterval(VReg); 66 MachineInstr *DefMI = LIS.getInstructionFromIndex(VNI->def); 99 LiveInterval &li = LIS.getInterval(MO.getReg()); 128 DefIdx = LIS.getInstructionIndex(RM.OrigMI); 131 RM.OrigMI = LIS.getInstructionFromIndex(DefIdx); 155 return LIS.getSlotIndexes()->insertMachineInstrInMaps(--MI, Late) 161 LIS.removeInterval(Reg); 192 LIS.getInstructionIndex(DefMI), 193 LIS.getInstructionIndex(UseMI))) 213 LIS [all...] |
H A D | PHIElimination.cpp | 58 LiveIntervals *LIS; member in class:__anon2502::PHIElimination 135 LIS = getAnalysisIfAvailable<LiveIntervals>(); 144 if (!DisableEdgeSplitting && (LV || LIS)) { 161 if (LIS) 162 LIS->RemoveMachineInstrFromMaps(DefMI); 170 if (LIS) 171 LIS->RemoveMachineInstrFromMaps(I->first); 311 if (LIS) { 313 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(NewInstr); 315 SlotIndex MBBStartIndex = LIS [all...] |
H A D | CalcSpillWeights.cpp | 26 void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS, argument 36 VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm); 41 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg)); 78 const LiveIntervals &LIS, 91 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 113 const LiveInterval &SrcLI = LIS.getInterval(Reg); 119 MI = LIS.getInstructionFromIndex(VNI->def); 124 if (!TII.isTriviallyReMaterializable(MI, LIS.getAliasAnalysis())) 177 if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb)) 219 if (li.isZeroLength(LIS 77 isRematerializable(const LiveInterval &LI, const LiveIntervals &LIS, VirtRegMap *VRM, const TargetInstrInfo &TII) argument [all...] |
H A D | LiveDebugVariables.cpp | 133 LiveIntervals &LIS, const TargetInstrInfo &TII); 138 LiveIntervals &LIS); 230 /// @param LIS Live intervals analysis. 235 LiveIntervals &LIS, MachineDominatorTree &MDT, 249 LiveIntervals &LIS); 254 LiveIntervals &LIS, MachineDominatorTree &MDT, 260 LiveIntervals &LIS); 268 LiveIntervals &LIS, const TargetInstrInfo &TRI); 282 LiveIntervals *LIS; member in class:__anon2470::LDVImpl 522 LIS 539 extendDef(SlotIndex Idx, unsigned LocNo, LiveRange *LR, const VNInfo *VNI, SmallVectorImpl<SlotIndex> *Kills, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 583 addDefsFromCopies(LiveInterval *LI, unsigned LocNo, const SmallVectorImpl<SlotIndex> &Kills, SmallVectorImpl<std::pair<SlotIndex, unsigned> > &NewDefs, MachineRegisterInfo &MRI, LiveIntervals &LIS) argument 654 computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 772 splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs, LiveIntervals& LIS) argument 871 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 901 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 937 findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS) argument 958 insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo, LiveIntervals &LIS, const TargetInstrInfo &TII) argument 980 emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, const TargetInstrInfo &TII) argument [all...] |
H A D | RegAllocBase.cpp | 63 LIS = &lis; 78 enqueue(&LIS->getInterval(Reg)); 95 LIS->removeInterval(VirtReg->reg); 140 LiveInterval *SplitVirtReg = &LIS->getInterval(*I); 145 LIS->removeInterval(SplitVirtReg->reg);
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H A D | InlineSpiller.cpp | 60 LiveIntervals &LIS; member in class:__anon2464::InlineSpiller 142 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), 236 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) 288 LiveInterval &SnipLI = LIS.getInterval(SnipReg); 374 SV.SpillMBB = LIS.getMBBFromIndex(SV.SpillVNI->def); 391 DepSV.SpillMBB = LIS.getMBBFromIndex(DepSV.SpillVNI->def); 510 LiveInterval &OrigLI = LIS.getInterval(Original); 547 LiveInterval &LI = LIS.getInterval(Reg); 591 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 597 LiveInterval &SrcLI = LIS 1036 dumpMachineInstrRangeWithSlotIndex(MachineBasicBlock::iterator B, MachineBasicBlock::iterator E, LiveIntervals const &LIS, const char *const header, unsigned VReg =0) argument 1202 DEBUG(dumpMachineInstrRangeWithSlotIndex(std::next(MI), MIS.end(), LIS, local [all...] |
H A D | RegisterCoalescer.cpp | 88 LiveIntervals *LIS; member in class:__anon2517::RegisterCoalescer 229 if (LIS->shrinkToUses(LI, Dead)) { 233 LIS->splitSeparateComponents(*LI, SplitLIs); 452 LiveRangeEdit(nullptr, NewRegs, *MF, *LIS, 467 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); 469 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); 470 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot(); 506 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def); 520 LIS->getInstructionFromIndex(ValS->end.getPrevSlot()); 581 if (LIS 1649 LiveIntervals *LIS; member in class:__anon2518::JoinVals 2708 isLocalCopy(MachineInstr *Copy, const LiveIntervals *LIS) argument [all...] |
H A D | LiveDebugVariables.h | 54 LiveIntervals &LIS);
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H A D | SplitKit.cpp | 45 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), 62 SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB); 71 LSP.first = LIS.getInstructionIndex(FirstTerm); 82 LSP.second = LIS.getInstructionIndex(I); 90 if (!LPad || !LSP.second || !LIS.isLiveInToMBB(*CurLI, LPad)) 113 if (LSP == LIS.getMBBEndIdx(MBB)) 115 return LIS.getInstructionFromIndex(LSP); 132 UseSlots.push_back(LIS.getInstructionIndex(MO.getParent()).getRegSlot()); 149 const_cast<LiveIntervals&>(LIS) 181 LIS [all...] |
H A D | TwoAddressInstructionPass.cpp | 79 LiveIntervals *LIS; member in class:__anon2555::TwoAddressInstructionPass 181 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS); 222 if (LIS) { 223 LiveInterval &LI = LIS->getInterval(SavedReg); 227 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); 233 KillMI = LIS->getInstructionFromIndex(I->end); 280 if (MO.isKill() || (LIS && isPlainlyKilled(OtherMI, MOReg, LIS))) { 293 if (!LIS) { 307 if (LIS) 400 isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS) argument 442 isKilled(MachineInstr &MI, unsigned Reg, const MachineRegisterInfo *MRI, const TargetInstrInfo *TII, LiveIntervals *LIS, bool allowFalsePositives) argument [all...] |
H A D | RegAllocBase.h | 64 LiveIntervals *LIS; member in class:llvm::RegAllocBase 69 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {}
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H A D | RegAllocPBQP.cpp | 127 void findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS); 134 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, 146 void finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS, 157 LiveIntervals &LIS = G.getMetadata().LIS; variable 165 LIS.getInterval(G.getNodeMetadata(NId).getVReg()).weight; 276 LiveIntervals &LIS = G.getMetadata().LIS; variable 299 LiveInterval &LI = LIS.getInterval(VReg); 524 LiveIntervals &LIS) { 523 findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS) argument 558 LiveIntervals &LIS = G.getMetadata().LIS; local 628 spillVReg(unsigned VReg, SmallVectorImpl<unsigned> &NewIntervals, MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, Spiller &VRegSpiller) argument 660 LiveIntervals &LIS = G.getMetadata().LIS; local 694 finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM) const argument 724 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); local [all...] |
H A D | RegisterPressure.cpp | 173 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) { argument 175 return &LIS.getInterval(Reg); 176 return LIS.getCachedRegUnit(Reg); 181 LIS = nullptr; 217 LIS = lis; 252 return LIS->getMBBEndIdx(MBB); 253 return LIS->getInstructionIndex(IdxPos).getRegSlot(); 387 const LiveIntervals &LIS) { 388 SlotIndex SlotIdx = LIS.getInstructionIndex(&MI); 392 const LiveRange *LR = getLiveRange(LIS, Re 386 detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS) argument 891 findUseBetween(unsigned Reg, SlotIndex PriorUseIdx, SlotIndex NextUseIdx, const MachineRegisterInfo &MRI, const LiveIntervals *LIS) argument [all...] |
H A D | InterferenceCache.h | 57 /// LIS - Used for accessing register mask interference maps. 58 LiveIntervals *LIS; member in class:llvm::InterferenceCache::Entry 97 Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(nullptr), LIS(nullptr) {} 104 LIS = lis;
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H A D | LiveRegMatrix.cpp | 51 LIS = &getAnalysis<LiveIntervals>(); 148 LIS->checkRegMaskInterference(VirtReg, RegMaskUsable); 165 const LiveRange &UnitRange = LIS->getRegUnit(Unit); 166 return Range.overlaps(UnitRange, CP, *LIS->getSlotIndexes());
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H A D | VirtRegMap.cpp | 164 LiveIntervals *LIS; member in class:__anon2558::VirtRegRewriter 215 LIS = &getAnalysis<LiveIntervals>(); 223 LIS->addKillFlags(VRM); 291 LiveInterval &LI = LIS->getInterval(VirtReg); 292 if (LI.empty() || LIS->intervalIsInOneMBB(LI)) 330 const LiveInterval &LI = LIS->getInterval(Reg); 332 SlotIndex BaseIndex = LIS->getInstructionIndex(&MI);
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/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 54 LiveIntervals &LIS; member in class:llvm::VirtRegAuxInfo 66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {} 74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
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H A D | LiveRegMatrix.h | 40 LiveIntervals *LIS; member in class:llvm::LiveRegMatrix
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H A D | LiveRangeEdit.h | 64 LiveIntervals &LIS; member in class:llvm::LiveRangeEdit 122 : Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis), 212 /// to erase it from LIS.
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | SILoadStoreOptimizer.cpp | 62 LiveIntervals *LIS; member in class:__anon2758::SILoadStoreOptimizer 91 LIS(nullptr) {} 271 LIS->InsertMachineInstrInMaps(Read2); 275 SlotIndex PairedIndex = LIS->getInstructionIndex(Paired); 276 LiveRange &M0Range = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::M0, TRI)); 282 LIS->ReplaceMachineInstrInMaps(I, Copy0); 283 LIS->ReplaceMachineInstrInMaps(Paired, Copy1); 288 LiveInterval &AddrRegLI = LIS->getInterval(AddrReg->getReg()); 289 LIS->shrinkToUses(&AddrRegLI); 291 LIS [all...] |
H A D | SIFixControlFlowLiveIntervals.cpp | 68 LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); local 80 LIS->getInterval(Reg).markNotSpillable();
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/freebsd-11.0-release/contrib/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegStackify.cpp | 91 AliasAnalysis &AA, LiveIntervals &LIS, 118 const LiveInterval &LI = LIS.getInterval(Reg); 120 LI.getVNInfoAt(LIS.getInstructionIndex(Def).getRegSlot()) : 121 LI.getVNInfoBefore(LIS.getInstructionIndex(Def)); 123 VNInfo *InsVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(Insert)); 144 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); local 213 if (!IsSafeToMove(Def, Insert, AA, LIS, MRI)) 220 LIS.handleMove(Def); 90 IsSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, AliasAnalysis &AA, LiveIntervals &LIS, MachineRegisterInfo &MRI) argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandCondsets.cpp | 97 LIS(0), CoaLimitActive(false), 121 LiveIntervals *LIS; member in class:__anon2848::HexagonExpandCondsets 274 MachineInstr *MI = LIS->getInstructionFromIndex(S); 294 LiveInterval &LI = LIS->getInterval(Reg); 298 MachineInstr *MI = LIS->getInstructionFromIndex(I->start); 302 MachineInstr *MI = LIS->getInstructionFromIndex(S); 329 LIS->shrinkToUses(&LI, &Deads); 343 SlotIndex S = LIS->getInstructionIndex(MI).getRegSlot(); 350 T->end = LIS->getMBBEndIdx(MI->getParent()); 364 MachineInstr *MI = LIS [all...] |