/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonBitTracker.h | 50 struct ExtType { struct in struct:llvm::HexagonEvaluator 54 ExtType() : Type(0), Width(0) {} function in struct:llvm::HexagonEvaluator::ExtType 55 ExtType(char t, uint16_t w) : Type(t), Width(w) {} function in struct:llvm::HexagonEvaluator::ExtType 58 typedef DenseMap<unsigned, ExtType> RegExtMap;
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H A D | HexagonBitTracker.cpp | 71 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::SExt, Width))); 73 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::ZExt, Width))); 1119 if (F->second.Type == ExtType::SExt) 1121 else if (F->second.Type == ExtType::ZExt)
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H A D | HexagonISelDAGToDAG.cpp | 380 ISD::LoadExtType ExtType = LD->getExtensionType(); local 381 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); 429 if (LD->getValueType(0) == MVT::i64 && ExtType == ISD::SEXTLOAD)
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/freebsd-11.0-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 590 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, argument 595 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::LAST_VALUETYPE && 597 return LoadExtActions[ValI][MemI][ExtType]; 601 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { 603 getLoadExtAction(ExtType, ValVT, MemVT) == Legal; 608 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const { 610 (getLoadExtAction(ExtType, ValVT, MemVT) == Legal || 611 getLoadExtAction(ExtType, ValVT, MemVT) == Custom); 1323 void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, 1325 assert(ExtType < IS [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 1043 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getArithExtendType(Val); local 1049 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { 1053 ExtType == AArch64_AM::UXTX) || 1055 ExtType == AArch64_AM::UXTW) ) { 1061 O << ", " << AArch64_AM::getShiftExtendName(ExtType);
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 204 ISD::LoadExtType ExtType = LD->getExtensionType(); local 205 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) 501 ISD::LoadExtType ExtType = LD->getExtensionType(); local 598 switch (ExtType) { 621 SDValue ScalarLoad = DAG.getExtLoad(ExtType, dl,
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H A D | LegalizeVectorTypes.cpp | 992 ISD::LoadExtType ExtType = LD->getExtensionType(); local 1006 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, 1013 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, 1039 ISD::LoadExtType ExtType = MLD->getExtensionType(); local 1070 ExtType); 1082 ExtType); 2721 ISD::LoadExtType ExtType = LD->getExtensionType(); local 2725 if (ExtType != ISD::NON_EXTLOAD) 2726 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType); 2752 ISD::LoadExtType ExtType local 3525 GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain, LoadSDNode *LD, ISD::LoadExtType ExtType) argument [all...] |
H A D | LegalizeDAG.cpp | 905 ISD::LoadExtType ExtType = LD->getExtensionType(); 906 if (ExtType == ISD::NON_EXTLOAD) { 973 TLI.getLoadExtAction(ExtType, Node->getValueType(0), MVT::i1) == 985 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; 995 if (ExtType == ISD::SEXTLOAD) 1000 else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType()) 1036 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, 1058 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, 1091 switch (TLI.getLoadExtAction(ExtType, Node->getValueType(0), 1126 TLI.isLoadExtLegal(ExtType, LoadV [all...] |
H A D | LegalizeIntegerTypes.cpp | 476 ISD::LoadExtType ExtType = local 479 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), 2007 ISD::LoadExtType ExtType = N->getExtensionType(); local 2020 Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), 2027 if (ExtType == ISD::SEXTLOAD) { 2034 } else if (ExtType == ISD::ZEXTLOAD) { 2038 assert(ExtType == ISD::EXTLOAD && "Unknown extload!"); 2056 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, 2074 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), 2103 Hi = DAG.getNode(ExtType [all...] |
H A D | SelectionDAG.cpp | 230 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { argument 231 switch (ExtType) { 2718 unsigned ExtType = LD->getExtensionType(); local 2719 switch (ExtType) { 5042 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, argument 5071 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 5075 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, argument 5080 ExtType = ISD::NON_EXTLOAD; 5081 } else if (ExtType == ISD::NON_EXTLOAD) { 5106 ID.AddInteger(encodeMemSDNodeFlags(ExtType, A 5144 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const AAMDNodes &AAInfo) argument 5157 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO) argument [all...] |
H A D | DAGCombiner.cpp | 216 ISD::NodeType ExtType); 967 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) local 972 return DAG.getExtLoad(ExtType, dl, PVT, 1189 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) local 1193 SDValue NewLD = DAG.getExtLoad(ExtType, dl, PVT, 5843 ISD::NodeType ExtType) { 5854 Ops.push_back(DAG.getNode(ExtType, DL, ExtLoad->getValueType(0), SOp)); 5903 ISD::LoadExtType ExtType = 5909 while (!TLI.isLoadExtLegalOrCustom(ExtType, SplitDstVT, SplitSrcVT) && 5915 if (!TLI.isLoadExtLegalOrCustom(ExtType, SplitDstV 5841 ExtendSetCCUses(const SmallVectorImpl<SDNode *> &SetCCs, SDValue Trunc, SDValue ExtLoad, SDLoc DL, ISD::NodeType ExtType) argument 6616 ISD::LoadExtType ExtType = LN0->getExtensionType(); local 6724 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; local 12114 ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, local [all...] |
H A D | LegalizeTypes.h | 769 /// ExtType: extension element type 771 LoadSDNode *LD, ISD::LoadExtType ExtType);
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.h | 141 ISD::LoadExtType ExtType,
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H A D | AMDGPUISelLowering.cpp | 1422 ISD::LoadExtType ExtType = Load->getExtensionType(); local 1426 if (ExtType == ISD::NON_EXTLOAD && VT.getSizeInBits() < 32) { 1448 ExtType == ISD::NON_EXTLOAD || Load->getMemoryVT().bitsGE(MVT::i32)) 1479 if (ExtType == ISD::SEXTLOAD) {
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/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 838 SDValue getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 843 SDValue getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 848 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 855 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 55 AArch64_AM::ShiftExtendType ExtType; member in class:__anon2694::final::Address 66 Address() : Kind(RegBase), ExtType(AArch64_AM::InvalidShiftExtend), 70 void setExtendType(AArch64_AM::ShiftExtendType E) { ExtType = E; } 71 AArch64_AM::ShiftExtendType getExtendType() const { return ExtType; } 175 AArch64_AM::ShiftExtendType ExtType, 1366 AArch64_AM::ShiftExtendType ExtType, 1402 .addImm(getArithExtendImm(ExtType, ShiftImm)); 1363 emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg, bool LHSIsKill, unsigned RHSReg, bool RHSIsKill, AArch64_AM::ShiftExtendType ExtType, uint64_t ShiftImm, bool SetFlags, bool WantResult) argument
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H A D | AArch64ISelLowering.cpp | 2495 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; local 2505 ExtType = ISD::SEXTLOAD; 2508 ExtType = ISD::ZEXTLOAD; 2511 ExtType = ISD::EXTLOAD; 2516 ExtType, DL, VA.getLocVT(), Chain, FIN, 8235 unsigned ExtType = LHS.getOpcode(); local 8244 RHS = DAG.getNode(ExtType, SDLoc(N), VT, RHS); 8250 LHS = DAG.getNode(ExtType, SDLoc(N), VT, LHS); 9184 bool checkValueWidth(SDValue V, unsigned width, ISD::LoadExtType &ExtType) { argument 9185 ExtType 9290 isEquivalentMaskless(unsigned CC, unsigned width, ISD::LoadExtType ExtType, signed AddConstant, signed CompConstant) argument [all...] |
H A D | AArch64ISelDAGToDAG.cpp | 1053 ISD::LoadExtType ExtType = LD->getExtensionType(); local 1058 if (ExtType == ISD::NON_EXTLOAD) 1060 else if (ExtType == ISD::SEXTLOAD) 1070 if (ExtType == ISD::SEXTLOAD) { 1083 if (ExtType == ISD::SEXTLOAD) {
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H A D | AArch64InstrInfo.cpp | 1285 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getMemExtendType(Val); local 1286 return (ExtType != AArch64_AM::UXTX) || AArch64_AM::getMemDoShift(Val);
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/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2181 ISD::LoadExtType ExtType = LD->getExtensionType(); local 2191 if ((VT == MVT::i64) && (ExtType == ISD::NON_EXTLOAD)) { 2210 if ((VT == MVT::i32) || (ExtType == ISD::SEXTLOAD) || 2211 (ExtType == ISD::EXTLOAD)) 2214 assert((VT == MVT::i64) && (ExtType == ISD::ZEXTLOAD));
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 4713 Instruction::CastOps ExtType = Instruction::ZExt; local 4716 ExtType = Instruction::SExt; 4718 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType); 4723 APInt WideConst = (ExtType == Instruction::ZExt) ?
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/freebsd-11.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 4003 unsigned ExtType = 4006 if (ExtType == ISD::SEXTLOAD) {
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/freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1612 ISD::LoadExtType ExtType = (C.ICmpType == SystemZICMP::SignedOnly ? 1616 Load->getExtensionType() != ExtType) 1617 C.Op0 = DAG.getExtLoad(ExtType, SDLoc(Load), MVT::i32,
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