Searched refs:CMOV (Results 1 - 5 of 5) sorted by relevance

/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.h62 CMOV, // ARM conditional move instructions.
H A DARMISelLowering.cpp1124 case ARMISD::CMOV: return "ARMISD::CMOV";
3524 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal,
3560 if (Cond.getOpcode() == ARMISD::CMOV && Cond.hasOneUse()) {
3664 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow,
3666 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh,
3671 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR,
4363 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc,
4397 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, Tmp3, ARMcc,
10472 if (Op.getOpcode() == ARMISD::CMOV) {
10485 PerformCMOVToBFICombine(SDNode *CMOV, SelectionDAG &DAG) const argument
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.h117 CMOV,
H A DX86ISelLowering.cpp12674 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0);
12675 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1);
12677 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0);
12678 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1);
15292 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, VTs, T2, T1, CC, Cond);
15297 // X86ISD::CMOV means set the result (which is operand 1) to the RHS if
15301 return DAG.getNode(X86ISD::CMOV, DL, VTs, Ops);
17466 SDValue isValid = DAG.getNode(X86ISD::CMOV, dl,
18095 Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops);
18176 return DAG.getNode(X86ISD::CMOV, d
[all...]
/freebsd-11.0-release/contrib/llvm/tools/clang/lib/CodeGen/
H A DCGBuiltin.cpp6173 CMOV = 0, enumerator in enum:X86Features
6195 .Case("cmov", X86Features::CMOV)

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