| /freebsd-11.0-release/contrib/libcxxrt/ |
| H A D | atomic.h | 10 * ATOMIC_LOAD.
24 #define ATOMIC_LOAD(addr)\ macro
27 #define ATOMIC_LOAD(addr)\ macro
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| H A D | memory.cc | 69 return ATOMIC_LOAD(&new_handl);
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| H A D | exception.cc | 1519 return ATOMIC_LOAD(&unexpectedHandler);
1531 return ATOMIC_LOAD(&terminateHandler);
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| /freebsd-11.0-release/sys/amd64/include/ |
| H A D | atomic.h | 113 #define ATOMIC_LOAD(TYPE) \ macro
358 #define ATOMIC_LOAD(TYPE) \ macro
431 ATOMIC_LOAD(TYPE); \
440 #undef ATOMIC_LOAD macro
|
| /freebsd-11.0-release/sys/i386/include/ |
| H A D | atomic.h | 117 #define ATOMIC_LOAD(TYPE) \ macro
300 #define ATOMIC_LOAD(TYPE) \ macro
586 ATOMIC_LOAD(TYPE); \
595 #undef ATOMIC_LOAD macro
|
| /freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 691 /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr)
693 ATOMIC_LOAD, enumerator in enum:llvm::ISD::NodeType
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| H A D | SelectionDAGNodes.h | 1224 N->getOpcode() == ISD::ATOMIC_LOAD ||
1343 N->getOpcode() == ISD::ATOMIC_LOAD ||
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 161 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom);
228 case ISD::ATOMIC_LOAD: return LowerATOMIC_LOAD(Op, DAG);
975 assert(N->getOpcode() == ISD::ATOMIC_LOAD && "Bad Atomic OP");
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| /freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 77 case ISD::ATOMIC_LOAD: return "AtomicLoad";
|
| H A D | LegalizeIntegerTypes.cpp | 134 case ISD::ATOMIC_LOAD:
1333 case ISD::ATOMIC_LOAD: ExpandIntRes_ATOMIC_LOAD(N, Lo, Hi); break;
|
| H A D | SelectionDAG.cpp | 485 case ISD::ATOMIC_LOAD:
4876 if (Opcode != ISD::ATOMIC_LOAD)
4921 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
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| H A D | LegalizeDAG.cpp | 3074 case ISD::ATOMIC_LOAD: {
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| H A D | SelectionDAGBuilder.cpp | 3619 DAG.getAtomic(ISD::ATOMIC_LOAD, dl, VT, VT, InChain,
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1600 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom);
1606 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Custom);
2973 case ISD::ATOMIC_LOAD:
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| /freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 271 setTargetDAGCombine(ISD::ATOMIC_LOAD);
2227 case ISD::ATOMIC_LOAD:
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 170 // Lower ATOMIC_LOAD and ATOMIC_STORE into normal volatile loads and
172 setOperationAction(ISD::ATOMIC_LOAD, VT, Custom);
4361 case ISD::ATOMIC_LOAD:
4976 // Implement EmitInstrWithCustomInserter for pseudo ATOMIC_LOAD{,W}_*
5098 // ATOMIC_LOAD{,W}_{,U}{MIN,MAX} instruction MI. CompareOpcode is the
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 607 Use->getOpcode() != ISD::ATOMIC_LOAD &&
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 395 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand);
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 871 // Mark ATOMIC_LOAD and ATOMIC_STORE custom so we can handle the
873 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom);
6970 case ISD::ATOMIC_LOAD:
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| /freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 821 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand);
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20636 case ISD::ATOMIC_LOAD: {
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