Searched refs:x20 (Results 1 - 25 of 1889) sorted by relevance

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/freebsd-11-stable/crypto/heimdal/lib/wind/
H A Dtest-ldap.c53 { { 0x20 }, 1, { 0 }, 0 },
54 { { 0x20, 0x61 }, 2, { 0x20, 0x61, 0x20}, 3 },
55 { { 0x20, 0x61, 0x20 }, 3, { 0x20, 0x61, 0x20}, 3 },
56 { { 0x20, 0x61, 0x20,
[all...]
H A Dldap.c60 if (put_char(out, &o, 0x20, *out_len))
62 while(i < olen && tmp[i] == 0x20) /* skip initial spaces */
66 if (tmp[i] == 0x20) {
67 if (put_char(out, &o, 0x20, *out_len) ||
68 put_char(out, &o, 0x20, *out_len))
70 while(i < olen && tmp[i] == 0x20) /* skip middle spaces */
80 if (o == 1 && out[0] == 0x20)
82 else if (out[o - 1] == 0x20) {
83 if (out[o - 2] == 0x20)
86 put_char(out, &o, 0x20, *out_le
[all...]
/freebsd-11-stable/sys/dev/ic/
H A Di8255.h35 #define CICSCD_CD 0x20 /* CD */
H A Di8251.h45 #define MOD8251_PEVEN 0x20 /* parity even */
59 #define CMD8251_RTS 0x20 /* assert RTS */
69 #define STS8251_FE 0x20 /* framing error */
78 #define FLSR_PE 0x20 /* perity error */
84 #define MSR_DSR 0x20 /* Current Data Set Ready */
93 #define IIR_FIFO_CK2 0x20
H A Dz8530.h86 #define BES_CTS 0x20 /* CTS. */
97 #define CMC_RC_TRXC 0x20 /* Rx Clock from -TRxC. */
116 #define CR_ENARXI 0x20 /* Enable Rx. Int. */
122 #define EFC_FE 0x20 /* Transmit FIFO Empty. */
132 #define IC_CTS 0x20 /* CTS IE. */
142 #define IDT_WRR 0x20 /* Wait/DMA Reuest on Receive. */
151 #define IP_RIA 0x20 /* Rx. Int. ch. A. */
172 #define MCB1_NRZI 0x20 /* NRZI Encoding. */
187 #define MCB2_ESM 0x20 /* DPLL - Enter Search Mode. */
198 #define MIC_SIE 0x20 /* Softwar
[all...]
H A Dnec765.h41 #define NE7_NDM 0x20 /* Diskette Controller in Non Dma Mode */
55 #define NE7_ST0_SE 0x20 /* seek end */
65 #define NE7_ST1_DE 0x20 /* data error, CRC fail in ID or data */
75 #define NE7_ST2_DD 0x20 /* data error in data field, CRC fail */
87 #define NE7_ST3_RD 0x20 /* ready; PC: always true */
110 #define NE7CMD_SK 0x20 /* READ, READDEL, SCAN* */
/freebsd-11-stable/usr.sbin/ppp/
H A Dchap_ms.c232 {0x4D, 0x61, 0x67, 0x69, 0x63, 0x20, 0x73, 0x65, 0x72, 0x76,
233 0x65, 0x72, 0x20, 0x74, 0x6F, 0x20, 0x63, 0x6C, 0x69, 0x65,
234 0x6E, 0x74, 0x20, 0x73, 0x69, 0x67, 0x6E, 0x69, 0x6E, 0x67,
235 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x74, 0x61, 0x6E, 0x74};
239 {0x50, 0x61, 0x64, 0x20, 0x74, 0x6F, 0x20, 0x6D, 0x61, 0x6B,
240 0x65, 0x20, 0x69, 0x74, 0x20, 0x64, 0x6F, 0x20,
[all...]
/freebsd-11-stable/contrib/wpa/src/crypto/
H A Dms_funcs.c234 0x4D, 0x61, 0x67, 0x69, 0x63, 0x20, 0x73, 0x65, 0x72, 0x76,
235 0x65, 0x72, 0x20, 0x74, 0x6F, 0x20, 0x63, 0x6C, 0x69, 0x65,
236 0x6E, 0x74, 0x20, 0x73, 0x69, 0x67, 0x6E, 0x69, 0x6E, 0x67,
237 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x74, 0x61, 0x6E, 0x74
240 0x50, 0x61, 0x64, 0x20, 0x74, 0x6F, 0x20, 0x6D, 0x61, 0x6B,
241 0x65, 0x20, 0x69, 0x74, 0x20, 0x64, 0x6F, 0x20,
[all...]
/freebsd-11-stable/sys/sparc64/fhc/
H A Dclkbrdreg.h36 #define CLK_CF_REG2 0x20 /* clock frequency register 2 */
39 #define CLK_CF_REG2_REN_WDOG 0x20 /* reset enable: watchdog */
49 #define CLK_CTRL_IEN_AC 0x20 /* intr enable: AC power */
61 #define CLK_STS1_SECURE 0x20 /* key in position secure (reversed) */
67 #define CLK_STS2 0x20 /* system status register 2 */
70 #define CLK_STS2_OK_33V 0x20 /* ok: 3.3V on clock board */
82 #define CLK_PPRES_OK_P_12V 0x20 /* ok: peripheral 12V */
/freebsd-11-stable/sys/dev/iicbus/
H A Diicoc.h65 #define OC_COMMAND_READ 0x20
67 #define OC_COMMAND_RDACK 0x20
74 #define OC_STATUS_AL 0x20 /* Arbitration Lost */
/freebsd-11-stable/sys/dev/mlx5/
H A Dmlx5_ifc.h64 MLX5_EVENT_TYPE_FPGA_ERROR = 0x20,
336 u8 reserved_8[0x20];
340 u8 ingress_general_high[0x20];
342 u8 ingress_general_low[0x20];
344 u8 ingress_policy_engine_high[0x20];
346 u8 ingress_policy_engine_low[0x20];
348 u8 ingress_vlan_membership_high[0x20];
350 u8 ingress_vlan_membership_low[0x20];
352 u8 ingress_tag_frame_type_high[0x20];
354 u8 ingress_tag_frame_type_low[0x20];
[all...]
/freebsd-11-stable/sys/dev/cardbus/
H A Dcardbus_cis.h41 #define TPL_BAR_REG_PREFETCHABLE_ONLY 0x20
/freebsd-11-stable/crypto/openssh/openbsd-compat/
H A Dreadpassphrase.h38 #define RPP_STDIN 0x20 /* Read from stdin, not /dev/tty */
/freebsd-11-stable/sys/powerpc/include/
H A Dvm.h41 #define VM_MEMATTR_PREFETCHABLE 0x20
/freebsd-11-stable/sys/dev/uart/
H A Duart_ppstypes.h44 #define UART_PPS_NARROW_PULSE 0x20
/freebsd-11-stable/usr.sbin/fifolog/lib/
H A Dfifolog.h129 #define FIFOLOG_OFF_BS 0x20
/freebsd-11-stable/lib/libc/aarch64/gen/
H A D_ctx_start.S35 mov x0, x20 /* Load ucp saved in makecontext */
/freebsd-11-stable/sys/dev/aic/
H A Daic6360reg.h84 #define ENSELI 0x20
94 #define CHEN 0x20
102 #define ENSPCHK 0x20
115 #define MSGI 0x20
135 #define MSGO 0x20
153 #define SXFR1 0x20
162 #define OID1 0x20
173 #define SELID5 0x20
183 #define CLRSELDI 0x20 /* I+ */
193 #define SELDI 0x20 /* Selfclearin
[all...]
/freebsd-11-stable/sys/dev/acpica/
H A Dacpi_hpet.h45 #define HPET_ISR 0x20 /* General interrupt status register */
49 #define HPET_TIMER_CAP_CNF(x) ((x) * 0x20 + 0x100)
61 #define HPET_TIMER_COMPARATOR(x) ((x) * 0x20 + 0x108)
62 #define HPET_TIMER_FSB_VAL(x) ((x) * 0x20 + 0x110)
63 #define HPET_TIMER_FSB_ADDR(x) ((x) * 0x20 + 0x114)
/freebsd-11-stable/sys/dev/sf/
H A Dstarfire_tx.h19 0x00,0x00,0x14,0x20,0x00,0x11,
20 0xaa,0xaa,0x14,0x20,0x40,0x22,
21 0x03,0x00,0x14,0x20,0x40,0x22,
22 0x00,0x00,0x14,0x20,0x40,0x22,
24 0x00,0x00,0x14,0x20,0x00,0x11,
28 0x00,0x0c,0x14,0x20,0x40,0x22,
41 0x60,0x08,0x4e,0x20,0xd0,0x11,
42 0x40,0x08,0x14,0x20,0xd0,0x12,
49 0x00,0x00,0x00,0x00,0x00,0x20,
51 0x31,0x00,0x00,0x04,0x72,0x20,
[all...]
/freebsd-11-stable/sys/dev/digi/
H A DXem.bios.h34 0x69, 0x6f, 0x73, 0x2e, 0x62, 0x69, 0x6e, 0x20, 0x20, 0x20, 0x20, 0x32, 0x2e,
35 0x33, 0x2e, 0x32, 0x20, 0x20, 0x30, 0x36, 0x2f, 0x30, 0x32, 0x2f, 0x39, 0x37,
37 0x74, 0x20, 0x28, 0x43, 0x29, 0x20, 0x31, 0x39, 0x39, 0x32, 0x2c, 0x20, 0x44,
38 0x49, 0x47, 0x49, 0x20,
[all...]
/freebsd-11-stable/sys/mips/adm5120/
H A Duart_dev_adm5120.h56 #define UART_CR_TX_INT_EN 0x20
65 #define UART_FR_TX_FIFO_FULL 0x20
75 #define UART_ILPR_REG 0x20
/freebsd-11-stable/sys/dev/ichsmb/
H A Dichsmb_reg.h52 #define ICH_SMB_BASE 0x20 /* base address register */
64 #define ICH_HST_STA_SMBALERT_STS 0x20 /* SMBALERT# signal */
72 #define ICH_HST_CNT_LAST_BYTE 0x20 /* indicate last byte */
/freebsd-11-stable/stand/pc98/libpc98/
H A Dpc98_sys.c49 while (inb(0x60) & 0x20) {}
50 while (!(inb(0x60) & 0x20)) {}
63 ret |= (inb(0x42) & 0x20) ? M_8M : 0;
/freebsd-11-stable/sys/dev/mlx5/mlx5_fpga/
H A Dmlx5_ifc_fpga.h73 u8 max_fpga_qp_msg_size[0x20];
82 u8 register_file_ver[0x20];
91 u8 reserved_at_60[0x20];
93 u8 image_version[0x20];
95 u8 image_date[0x20];
97 u8 image_time[0x20];
99 u8 shell_version[0x20];
111 u8 sandbox_basic_caps[0x20];
122 u8 fpga_ddr_size[0x20];
124 u8 fpga_cr_space_size[0x20];
[all...]

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