1290650Shselasky/*- 2321992Shselasky * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_ifc.h 365411 2020-09-07 10:50:17Z kib $ 26321992Shselasky */ 27290650Shselasky 28290650Shselasky#ifndef MLX5_IFC_H 29290650Shselasky#define MLX5_IFC_H 30290650Shselasky 31341958Shselasky#include <dev/mlx5/mlx5_fpga/mlx5_ifc_fpga.h> 32341958Shselasky 33290650Shselaskyenum { 34290650Shselasky MLX5_EVENT_TYPE_COMP = 0x0, 35290650Shselasky MLX5_EVENT_TYPE_PATH_MIG = 0x1, 36290650Shselasky MLX5_EVENT_TYPE_COMM_EST = 0x2, 37290650Shselasky MLX5_EVENT_TYPE_SQ_DRAINED = 0x3, 38290650Shselasky MLX5_EVENT_TYPE_SRQ_LAST_WQE = 0x13, 39290650Shselasky MLX5_EVENT_TYPE_SRQ_RQ_LIMIT = 0x14, 40290650Shselasky MLX5_EVENT_TYPE_DCT_DRAINED = 0x1c, 41290650Shselasky MLX5_EVENT_TYPE_DCT_KEY_VIOLATION = 0x1d, 42290650Shselasky MLX5_EVENT_TYPE_CQ_ERROR = 0x4, 43290650Shselasky MLX5_EVENT_TYPE_WQ_CATAS_ERROR = 0x5, 44290650Shselasky MLX5_EVENT_TYPE_PATH_MIG_FAILED = 0x7, 45290650Shselasky MLX5_EVENT_TYPE_PAGE_FAULT = 0xc, 46290650Shselasky MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR = 0x10, 47290650Shselasky MLX5_EVENT_TYPE_WQ_ACCESS_ERROR = 0x11, 48290650Shselasky MLX5_EVENT_TYPE_SRQ_CATAS_ERROR = 0x12, 49290650Shselasky MLX5_EVENT_TYPE_INTERNAL_ERROR = 0x8, 50290650Shselasky MLX5_EVENT_TYPE_PORT_CHANGE = 0x9, 51290650Shselasky MLX5_EVENT_TYPE_GPIO_EVENT = 0x15, 52290650Shselasky MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT = 0x16, 53347800Shselasky MLX5_EVENT_TYPE_TEMP_WARN_EVENT = 0x17, 54290650Shselasky MLX5_EVENT_TYPE_REMOTE_CONFIG = 0x19, 55306233Shselasky MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT = 0x1e, 56321992Shselasky MLX5_EVENT_TYPE_CODING_PPS_EVENT = 0x25, 57321992Shselasky MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT = 0x22, 58290650Shselasky MLX5_EVENT_TYPE_DB_BF_CONGESTION = 0x1a, 59290650Shselasky MLX5_EVENT_TYPE_STALL_EVENT = 0x1b, 60290650Shselasky MLX5_EVENT_TYPE_DROPPED_PACKET_LOGGED_EVENT = 0x1f, 61290650Shselasky MLX5_EVENT_TYPE_CMD = 0xa, 62290650Shselasky MLX5_EVENT_TYPE_PAGE_REQUEST = 0xb, 63341958Shselasky MLX5_EVENT_TYPE_NIC_VPORT_CHANGE = 0xd, 64341958Shselasky MLX5_EVENT_TYPE_FPGA_ERROR = 0x20, 65341958Shselasky MLX5_EVENT_TYPE_FPGA_QP_ERROR = 0x21, 66290650Shselasky}; 67290650Shselasky 68290650Shselaskyenum { 69306233Shselasky MLX5_MODIFY_TIR_BITMASK_LRO = 0x0, 70306233Shselasky MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1, 71306233Shselasky MLX5_MODIFY_TIR_BITMASK_HASH = 0x2, 72306233Shselasky MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3, 73306233Shselasky MLX5_MODIFY_TIR_BITMASK_SELF_LB_EN = 0x4 74290650Shselasky}; 75290650Shselasky 76290650Shselaskyenum { 77290650Shselasky MLX5_MODIFY_RQT_BITMASK_RQN_LIST = 0x1, 78290650Shselasky}; 79290650Shselasky 80290650Shselaskyenum { 81329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0, 82329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3, 83329209Shselasky}; 84329209Shselasky 85329209Shselaskyenum { 86290650Shselasky MLX5_CMD_OP_QUERY_HCA_CAP = 0x100, 87290650Shselasky MLX5_CMD_OP_QUERY_ADAPTER = 0x101, 88290650Shselasky MLX5_CMD_OP_INIT_HCA = 0x102, 89290650Shselasky MLX5_CMD_OP_TEARDOWN_HCA = 0x103, 90290650Shselasky MLX5_CMD_OP_ENABLE_HCA = 0x104, 91290650Shselasky MLX5_CMD_OP_DISABLE_HCA = 0x105, 92290650Shselasky MLX5_CMD_OP_QUERY_PAGES = 0x107, 93290650Shselasky MLX5_CMD_OP_MANAGE_PAGES = 0x108, 94290650Shselasky MLX5_CMD_OP_SET_HCA_CAP = 0x109, 95290650Shselasky MLX5_CMD_OP_QUERY_ISSI = 0x10a, 96290650Shselasky MLX5_CMD_OP_SET_ISSI = 0x10b, 97290650Shselasky MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d, 98321992Shselasky MLX5_CMD_OP_QUERY_OTHER_HCA_CAP = 0x10e, 99321992Shselasky MLX5_CMD_OP_MODIFY_OTHER_HCA_CAP = 0x10f, 100290650Shselasky MLX5_CMD_OP_CREATE_MKEY = 0x200, 101290650Shselasky MLX5_CMD_OP_QUERY_MKEY = 0x201, 102290650Shselasky MLX5_CMD_OP_DESTROY_MKEY = 0x202, 103290650Shselasky MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203, 104290650Shselasky MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204, 105290650Shselasky MLX5_CMD_OP_CREATE_EQ = 0x301, 106290650Shselasky MLX5_CMD_OP_DESTROY_EQ = 0x302, 107290650Shselasky MLX5_CMD_OP_QUERY_EQ = 0x303, 108290650Shselasky MLX5_CMD_OP_GEN_EQE = 0x304, 109290650Shselasky MLX5_CMD_OP_CREATE_CQ = 0x400, 110290650Shselasky MLX5_CMD_OP_DESTROY_CQ = 0x401, 111290650Shselasky MLX5_CMD_OP_QUERY_CQ = 0x402, 112290650Shselasky MLX5_CMD_OP_MODIFY_CQ = 0x403, 113290650Shselasky MLX5_CMD_OP_CREATE_QP = 0x500, 114290650Shselasky MLX5_CMD_OP_DESTROY_QP = 0x501, 115290650Shselasky MLX5_CMD_OP_RST2INIT_QP = 0x502, 116290650Shselasky MLX5_CMD_OP_INIT2RTR_QP = 0x503, 117290650Shselasky MLX5_CMD_OP_RTR2RTS_QP = 0x504, 118290650Shselasky MLX5_CMD_OP_RTS2RTS_QP = 0x505, 119290650Shselasky MLX5_CMD_OP_SQERR2RTS_QP = 0x506, 120290650Shselasky MLX5_CMD_OP_2ERR_QP = 0x507, 121290650Shselasky MLX5_CMD_OP_2RST_QP = 0x50a, 122290650Shselasky MLX5_CMD_OP_QUERY_QP = 0x50b, 123290650Shselasky MLX5_CMD_OP_SQD_RTS_QP = 0x50c, 124290650Shselasky MLX5_CMD_OP_INIT2INIT_QP = 0x50e, 125290650Shselasky MLX5_CMD_OP_CREATE_PSV = 0x600, 126290650Shselasky MLX5_CMD_OP_DESTROY_PSV = 0x601, 127290650Shselasky MLX5_CMD_OP_CREATE_SRQ = 0x700, 128290650Shselasky MLX5_CMD_OP_DESTROY_SRQ = 0x701, 129290650Shselasky MLX5_CMD_OP_QUERY_SRQ = 0x702, 130290650Shselasky MLX5_CMD_OP_ARM_RQ = 0x703, 131290650Shselasky MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705, 132290650Shselasky MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706, 133290650Shselasky MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707, 134290650Shselasky MLX5_CMD_OP_ARM_XRC_SRQ = 0x708, 135290650Shselasky MLX5_CMD_OP_CREATE_DCT = 0x710, 136290650Shselasky MLX5_CMD_OP_DESTROY_DCT = 0x711, 137290650Shselasky MLX5_CMD_OP_DRAIN_DCT = 0x712, 138290650Shselasky MLX5_CMD_OP_QUERY_DCT = 0x713, 139290650Shselasky MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714, 140290650Shselasky MLX5_CMD_OP_SET_DC_CNAK_TRACE = 0x715, 141290650Shselasky MLX5_CMD_OP_QUERY_DC_CNAK_TRACE = 0x716, 142290650Shselasky MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750, 143290650Shselasky MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751, 144290650Shselasky MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752, 145290650Shselasky MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753, 146290650Shselasky MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754, 147290650Shselasky MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755, 148290650Shselasky MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760, 149290650Shselasky MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761, 150290650Shselasky MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762, 151290650Shselasky MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763, 152290650Shselasky MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764, 153290650Shselasky MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765, 154347850Shselasky MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f, 155290650Shselasky MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770, 156290650Shselasky MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771, 157290650Shselasky MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772, 158290650Shselasky MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773, 159306233Shselasky MLX5_CMD_OP_SET_RATE_LIMIT = 0x780, 160306233Shselasky MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781, 161308678Shselasky MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782, 162308678Shselasky MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783, 163308678Shselasky MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784, 164308678Shselasky MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785, 165308678Shselasky MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786, 166308678Shselasky MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787, 167290650Shselasky MLX5_CMD_OP_ALLOC_PD = 0x800, 168290650Shselasky MLX5_CMD_OP_DEALLOC_PD = 0x801, 169290650Shselasky MLX5_CMD_OP_ALLOC_UAR = 0x802, 170290650Shselasky MLX5_CMD_OP_DEALLOC_UAR = 0x803, 171290650Shselasky MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804, 172290650Shselasky MLX5_CMD_OP_ACCESS_REG = 0x805, 173290650Shselasky MLX5_CMD_OP_ATTACH_TO_MCG = 0x806, 174290650Shselasky MLX5_CMD_OP_DETACH_FROM_MCG = 0x807, 175290650Shselasky MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a, 176290650Shselasky MLX5_CMD_OP_MAD_IFC = 0x50d, 177290650Shselasky MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b, 178290650Shselasky MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c, 179290650Shselasky MLX5_CMD_OP_NOP = 0x80d, 180290650Shselasky MLX5_CMD_OP_ALLOC_XRCD = 0x80e, 181290650Shselasky MLX5_CMD_OP_DEALLOC_XRCD = 0x80f, 182290650Shselasky MLX5_CMD_OP_SET_BURST_SIZE = 0x812, 183290650Shselasky MLX5_CMD_OP_QUERY_BURST_SIZE = 0x813, 184290650Shselasky MLX5_CMD_OP_ACTIVATE_TRACER = 0x814, 185290650Shselasky MLX5_CMD_OP_DEACTIVATE_TRACER = 0x815, 186290650Shselasky MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816, 187290650Shselasky MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817, 188306233Shselasky MLX5_CMD_OP_SET_DIAGNOSTICS = 0x820, 189306233Shselasky MLX5_CMD_OP_QUERY_DIAGNOSTICS = 0x821, 190290650Shselasky MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822, 191290650Shselasky MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823, 192290650Shselasky MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824, 193290650Shselasky MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825, 194290650Shselasky MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826, 195290650Shselasky MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827, 196290650Shselasky MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828, 197290650Shselasky MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829, 198290650Shselasky MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a, 199290650Shselasky MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b, 200290650Shselasky MLX5_CMD_OP_SET_WOL_ROL = 0x830, 201290650Shselasky MLX5_CMD_OP_QUERY_WOL_ROL = 0x831, 202321992Shselasky MLX5_CMD_OP_CREATE_LAG = 0x840, 203321992Shselasky MLX5_CMD_OP_MODIFY_LAG = 0x841, 204321992Shselasky MLX5_CMD_OP_QUERY_LAG = 0x842, 205321992Shselasky MLX5_CMD_OP_DESTROY_LAG = 0x843, 206321992Shselasky MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844, 207321992Shselasky MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845, 208290650Shselasky MLX5_CMD_OP_CREATE_TIR = 0x900, 209290650Shselasky MLX5_CMD_OP_MODIFY_TIR = 0x901, 210290650Shselasky MLX5_CMD_OP_DESTROY_TIR = 0x902, 211290650Shselasky MLX5_CMD_OP_QUERY_TIR = 0x903, 212290650Shselasky MLX5_CMD_OP_CREATE_SQ = 0x904, 213290650Shselasky MLX5_CMD_OP_MODIFY_SQ = 0x905, 214290650Shselasky MLX5_CMD_OP_DESTROY_SQ = 0x906, 215290650Shselasky MLX5_CMD_OP_QUERY_SQ = 0x907, 216290650Shselasky MLX5_CMD_OP_CREATE_RQ = 0x908, 217290650Shselasky MLX5_CMD_OP_MODIFY_RQ = 0x909, 218290650Shselasky MLX5_CMD_OP_DESTROY_RQ = 0x90a, 219290650Shselasky MLX5_CMD_OP_QUERY_RQ = 0x90b, 220290650Shselasky MLX5_CMD_OP_CREATE_RMP = 0x90c, 221290650Shselasky MLX5_CMD_OP_MODIFY_RMP = 0x90d, 222290650Shselasky MLX5_CMD_OP_DESTROY_RMP = 0x90e, 223290650Shselasky MLX5_CMD_OP_QUERY_RMP = 0x90f, 224321992Shselasky MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910, 225321992Shselasky MLX5_CMD_OP_QUERY_DELAY_DROP_PARAMS = 0x911, 226290650Shselasky MLX5_CMD_OP_CREATE_TIS = 0x912, 227290650Shselasky MLX5_CMD_OP_MODIFY_TIS = 0x913, 228290650Shselasky MLX5_CMD_OP_DESTROY_TIS = 0x914, 229290650Shselasky MLX5_CMD_OP_QUERY_TIS = 0x915, 230290650Shselasky MLX5_CMD_OP_CREATE_RQT = 0x916, 231290650Shselasky MLX5_CMD_OP_MODIFY_RQT = 0x917, 232290650Shselasky MLX5_CMD_OP_DESTROY_RQT = 0x918, 233290650Shselasky MLX5_CMD_OP_QUERY_RQT = 0x919, 234290650Shselasky MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f, 235290650Shselasky MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930, 236290650Shselasky MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931, 237290650Shselasky MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932, 238290650Shselasky MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933, 239290650Shselasky MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934, 240290650Shselasky MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935, 241290650Shselasky MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936, 242290650Shselasky MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937, 243290650Shselasky MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938, 244290650Shselasky MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939, 245290650Shselasky MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a, 246321992Shselasky MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b, 247321992Shselasky MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c, 248321992Shselasky MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d, 249321992Shselasky MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e, 250341958Shselasky MLX5_CMD_OP_FPGA_CREATE_QP = 0x960, 251341958Shselasky MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961, 252341958Shselasky MLX5_CMD_OP_FPGA_QUERY_QP = 0x962, 253341958Shselasky MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963, 254341958Shselasky MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964, 255290650Shselasky}; 256290650Shselasky 257290650Shselaskyenum { 258290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OPCODE_QUERY_FW_INFO = 0x8007, 259290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_CAPABILITY = 0x8400, 260290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_ACCESS_REGISTER = 0x9001, 261290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_VIRTUAL_MAC = 0x9003, 262290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_SET_VIRTUAL_MAC = 0x9004, 263290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_QUERY_WOL_ROL = 0x9005, 264290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_SET_WOL_ROL = 0x9006, 265290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_INIT = 0x9007, 266290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_QUERY_HEADER_STATUS = 0x9008, 267290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_QUERY_ETOC_STATUS = 0x9009, 268290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OCBB_SET_EVENT = 0x900a, 269290650Shselasky MLX5_ICMD_CMDS_OPCODE_ICMD_OPCODE_INIT_OCSD = 0xf004 270290650Shselasky}; 271290650Shselasky 272290650Shselaskystruct mlx5_ifc_flow_table_fields_supported_bits { 273290650Shselasky u8 outer_dmac[0x1]; 274290650Shselasky u8 outer_smac[0x1]; 275290650Shselasky u8 outer_ether_type[0x1]; 276290650Shselasky u8 reserved_0[0x1]; 277290650Shselasky u8 outer_first_prio[0x1]; 278290650Shselasky u8 outer_first_cfi[0x1]; 279290650Shselasky u8 outer_first_vid[0x1]; 280290650Shselasky u8 reserved_1[0x1]; 281290650Shselasky u8 outer_second_prio[0x1]; 282290650Shselasky u8 outer_second_cfi[0x1]; 283290650Shselasky u8 outer_second_vid[0x1]; 284290650Shselasky u8 outer_ipv6_flow_label[0x1]; 285290650Shselasky u8 outer_sip[0x1]; 286290650Shselasky u8 outer_dip[0x1]; 287290650Shselasky u8 outer_frag[0x1]; 288290650Shselasky u8 outer_ip_protocol[0x1]; 289290650Shselasky u8 outer_ip_ecn[0x1]; 290290650Shselasky u8 outer_ip_dscp[0x1]; 291290650Shselasky u8 outer_udp_sport[0x1]; 292290650Shselasky u8 outer_udp_dport[0x1]; 293290650Shselasky u8 outer_tcp_sport[0x1]; 294290650Shselasky u8 outer_tcp_dport[0x1]; 295290650Shselasky u8 outer_tcp_flags[0x1]; 296290650Shselasky u8 outer_gre_protocol[0x1]; 297290650Shselasky u8 outer_gre_key[0x1]; 298290650Shselasky u8 outer_vxlan_vni[0x1]; 299321992Shselasky u8 outer_geneve_vni[0x1]; 300321992Shselasky u8 outer_geneve_oam[0x1]; 301321992Shselasky u8 outer_geneve_protocol_type[0x1]; 302321992Shselasky u8 outer_geneve_opt_len[0x1]; 303321992Shselasky u8 reserved_2[0x1]; 304290650Shselasky u8 source_eswitch_port[0x1]; 305290650Shselasky 306290650Shselasky u8 inner_dmac[0x1]; 307290650Shselasky u8 inner_smac[0x1]; 308290650Shselasky u8 inner_ether_type[0x1]; 309290650Shselasky u8 reserved_3[0x1]; 310290650Shselasky u8 inner_first_prio[0x1]; 311290650Shselasky u8 inner_first_cfi[0x1]; 312290650Shselasky u8 inner_first_vid[0x1]; 313290650Shselasky u8 reserved_4[0x1]; 314290650Shselasky u8 inner_second_prio[0x1]; 315290650Shselasky u8 inner_second_cfi[0x1]; 316290650Shselasky u8 inner_second_vid[0x1]; 317290650Shselasky u8 inner_ipv6_flow_label[0x1]; 318290650Shselasky u8 inner_sip[0x1]; 319290650Shselasky u8 inner_dip[0x1]; 320290650Shselasky u8 inner_frag[0x1]; 321290650Shselasky u8 inner_ip_protocol[0x1]; 322290650Shselasky u8 inner_ip_ecn[0x1]; 323290650Shselasky u8 inner_ip_dscp[0x1]; 324290650Shselasky u8 inner_udp_sport[0x1]; 325290650Shselasky u8 inner_udp_dport[0x1]; 326290650Shselasky u8 inner_tcp_sport[0x1]; 327290650Shselasky u8 inner_tcp_dport[0x1]; 328290650Shselasky u8 inner_tcp_flags[0x1]; 329290650Shselasky u8 reserved_5[0x9]; 330290650Shselasky 331321992Shselasky u8 reserved_6[0x1a]; 332321992Shselasky u8 bth_dst_qp[0x1]; 333321992Shselasky u8 reserved_7[0x4]; 334290650Shselasky u8 source_sqn[0x1]; 335290650Shselasky 336321992Shselasky u8 reserved_8[0x20]; 337290650Shselasky}; 338290650Shselasky 339308678Shselaskystruct mlx5_ifc_eth_discard_cntrs_grp_bits { 340308678Shselasky u8 ingress_general_high[0x20]; 341308678Shselasky 342308678Shselasky u8 ingress_general_low[0x20]; 343308678Shselasky 344308678Shselasky u8 ingress_policy_engine_high[0x20]; 345308678Shselasky 346308678Shselasky u8 ingress_policy_engine_low[0x20]; 347308678Shselasky 348308678Shselasky u8 ingress_vlan_membership_high[0x20]; 349308678Shselasky 350308678Shselasky u8 ingress_vlan_membership_low[0x20]; 351308678Shselasky 352308678Shselasky u8 ingress_tag_frame_type_high[0x20]; 353308678Shselasky 354308678Shselasky u8 ingress_tag_frame_type_low[0x20]; 355308678Shselasky 356308678Shselasky u8 egress_vlan_membership_high[0x20]; 357308678Shselasky 358308678Shselasky u8 egress_vlan_membership_low[0x20]; 359308678Shselasky 360308678Shselasky u8 loopback_filter_high[0x20]; 361308678Shselasky 362308678Shselasky u8 loopback_filter_low[0x20]; 363308678Shselasky 364308678Shselasky u8 egress_general_high[0x20]; 365308678Shselasky 366308678Shselasky u8 egress_general_low[0x20]; 367308678Shselasky 368308678Shselasky u8 reserved_at_1c0[0x40]; 369308678Shselasky 370308678Shselasky u8 egress_hoq_high[0x20]; 371308678Shselasky 372308678Shselasky u8 egress_hoq_low[0x20]; 373308678Shselasky 374308678Shselasky u8 port_isolation_high[0x20]; 375308678Shselasky 376308678Shselasky u8 port_isolation_low[0x20]; 377308678Shselasky 378308678Shselasky u8 egress_policy_engine_high[0x20]; 379308678Shselasky 380308678Shselasky u8 egress_policy_engine_low[0x20]; 381308678Shselasky 382308678Shselasky u8 ingress_tx_link_down_high[0x20]; 383308678Shselasky 384308678Shselasky u8 ingress_tx_link_down_low[0x20]; 385308678Shselasky 386308678Shselasky u8 egress_stp_filter_high[0x20]; 387308678Shselasky 388308678Shselasky u8 egress_stp_filter_low[0x20]; 389308678Shselasky 390321992Shselasky u8 egress_hoq_stall_high[0x20]; 391321992Shselasky 392321992Shselasky u8 egress_hoq_stall_low[0x20]; 393321992Shselasky 394321992Shselasky u8 reserved_at_340[0x440]; 395308678Shselasky}; 396290650Shselaskystruct mlx5_ifc_flow_table_prop_layout_bits { 397290650Shselasky u8 ft_support[0x1]; 398290650Shselasky u8 flow_tag[0x1]; 399290650Shselasky u8 flow_counter[0x1]; 400290650Shselasky u8 flow_modify_en[0x1]; 401290650Shselasky u8 modify_root[0x1]; 402329200Shselasky u8 identified_miss_table[0x1]; 403329200Shselasky u8 flow_table_modify[0x1]; 404329200Shselasky u8 encap[0x1]; 405329200Shselasky u8 decap[0x1]; 406329200Shselasky u8 reset_root_to_default[0x1]; 407329200Shselasky u8 reserved_at_a[0x16]; 408290650Shselasky 409329200Shselasky u8 reserved_at_20[0x2]; 410290650Shselasky u8 log_max_ft_size[0x6]; 411329200Shselasky u8 reserved_at_28[0x10]; 412290650Shselasky u8 max_ft_level[0x8]; 413290650Shselasky 414329200Shselasky u8 reserved_at_40[0x20]; 415290650Shselasky 416329200Shselasky u8 reserved_at_60[0x18]; 417290650Shselasky u8 log_max_ft_num[0x8]; 418290650Shselasky 419329200Shselasky u8 reserved_at_80[0x10]; 420290650Shselasky u8 log_max_flow_counter[0x8]; 421290650Shselasky u8 log_max_destination[0x8]; 422290650Shselasky 423329200Shselasky u8 reserved_at_a0[0x18]; 424290650Shselasky u8 log_max_flow[0x8]; 425290650Shselasky 426329200Shselasky u8 reserved_at_c0[0x40]; 427290650Shselasky 428290650Shselasky struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support; 429290650Shselasky 430290650Shselasky struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support; 431290650Shselasky}; 432290650Shselasky 433290650Shselaskystruct mlx5_ifc_odp_per_transport_service_cap_bits { 434290650Shselasky u8 send[0x1]; 435290650Shselasky u8 receive[0x1]; 436290650Shselasky u8 write[0x1]; 437290650Shselasky u8 read[0x1]; 438290650Shselasky u8 atomic[0x1]; 439290650Shselasky u8 srq_receive[0x1]; 440290650Shselasky u8 reserved_0[0x1a]; 441290650Shselasky}; 442290650Shselasky 443290650Shselaskystruct mlx5_ifc_flow_counter_list_bits { 444290650Shselasky u8 reserved_0[0x10]; 445290650Shselasky u8 flow_counter_id[0x10]; 446290650Shselasky 447290650Shselasky u8 reserved_1[0x20]; 448290650Shselasky}; 449290650Shselasky 450290650Shselaskyenum { 451290650Shselasky MLX5_FLOW_CONTEXT_DEST_TYPE_VPORT = 0x0, 452290650Shselasky MLX5_FLOW_CONTEXT_DEST_TYPE_FLOW_TABLE = 0x1, 453290650Shselasky MLX5_FLOW_CONTEXT_DEST_TYPE_TIR = 0x2, 454321992Shselasky MLX5_FLOW_CONTEXT_DEST_TYPE_QP = 0x3, 455290650Shselasky}; 456290650Shselasky 457290650Shselaskystruct mlx5_ifc_dest_format_struct_bits { 458290650Shselasky u8 destination_type[0x8]; 459290650Shselasky u8 destination_id[0x18]; 460290650Shselasky 461290650Shselasky u8 reserved_0[0x20]; 462290650Shselasky}; 463290650Shselasky 464329200Shselaskystruct mlx5_ifc_ipv4_layout_bits { 465329200Shselasky u8 reserved_at_0[0x60]; 466329200Shselasky 467329200Shselasky u8 ipv4[0x20]; 468329200Shselasky}; 469329200Shselasky 470329200Shselaskystruct mlx5_ifc_ipv6_layout_bits { 471329200Shselasky u8 ipv6[16][0x8]; 472329200Shselasky}; 473329200Shselasky 474329200Shselaskyunion mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits { 475329200Shselasky struct mlx5_ifc_ipv6_layout_bits ipv6_layout; 476329200Shselasky struct mlx5_ifc_ipv4_layout_bits ipv4_layout; 477329200Shselasky u8 reserved_at_0[0x80]; 478329200Shselasky}; 479329200Shselasky 480290650Shselaskystruct mlx5_ifc_fte_match_set_lyr_2_4_bits { 481290650Shselasky u8 smac_47_16[0x20]; 482290650Shselasky 483290650Shselasky u8 smac_15_0[0x10]; 484290650Shselasky u8 ethertype[0x10]; 485290650Shselasky 486290650Shselasky u8 dmac_47_16[0x20]; 487290650Shselasky 488290650Shselasky u8 dmac_15_0[0x10]; 489290650Shselasky u8 first_prio[0x3]; 490290650Shselasky u8 first_cfi[0x1]; 491290650Shselasky u8 first_vid[0xc]; 492290650Shselasky 493290650Shselasky u8 ip_protocol[0x8]; 494290650Shselasky u8 ip_dscp[0x6]; 495290650Shselasky u8 ip_ecn[0x2]; 496306233Shselasky u8 cvlan_tag[0x1]; 497306233Shselasky u8 svlan_tag[0x1]; 498290650Shselasky u8 frag[0x1]; 499290650Shselasky u8 reserved_1[0x4]; 500290650Shselasky u8 tcp_flags[0x9]; 501290650Shselasky 502290650Shselasky u8 tcp_sport[0x10]; 503290650Shselasky u8 tcp_dport[0x10]; 504290650Shselasky 505290650Shselasky u8 reserved_2[0x20]; 506290650Shselasky 507290650Shselasky u8 udp_sport[0x10]; 508290650Shselasky u8 udp_dport[0x10]; 509290650Shselasky 510329200Shselasky union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6; 511290650Shselasky 512329200Shselasky union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6; 513290650Shselasky}; 514290650Shselasky 515290650Shselaskystruct mlx5_ifc_fte_match_set_misc_bits { 516290650Shselasky u8 reserved_0[0x8]; 517290650Shselasky u8 source_sqn[0x18]; 518290650Shselasky 519290650Shselasky u8 reserved_1[0x10]; 520290650Shselasky u8 source_port[0x10]; 521290650Shselasky 522290650Shselasky u8 outer_second_prio[0x3]; 523290650Shselasky u8 outer_second_cfi[0x1]; 524290650Shselasky u8 outer_second_vid[0xc]; 525290650Shselasky u8 inner_second_prio[0x3]; 526290650Shselasky u8 inner_second_cfi[0x1]; 527290650Shselasky u8 inner_second_vid[0xc]; 528290650Shselasky 529290650Shselasky u8 outer_second_vlan_tag[0x1]; 530290650Shselasky u8 inner_second_vlan_tag[0x1]; 531290650Shselasky u8 reserved_2[0xe]; 532290650Shselasky u8 gre_protocol[0x10]; 533290650Shselasky 534290650Shselasky u8 gre_key_h[0x18]; 535290650Shselasky u8 gre_key_l[0x8]; 536290650Shselasky 537290650Shselasky u8 vxlan_vni[0x18]; 538290650Shselasky u8 reserved_3[0x8]; 539290650Shselasky 540308678Shselasky u8 geneve_vni[0x18]; 541308678Shselasky u8 reserved4[0x7]; 542308678Shselasky u8 geneve_oam[0x1]; 543290650Shselasky 544290650Shselasky u8 reserved_5[0xc]; 545290650Shselasky u8 outer_ipv6_flow_label[0x14]; 546290650Shselasky 547290650Shselasky u8 reserved_6[0xc]; 548290650Shselasky u8 inner_ipv6_flow_label[0x14]; 549290650Shselasky 550321992Shselasky u8 reserved_7[0xa]; 551321992Shselasky u8 geneve_opt_len[0x6]; 552308678Shselasky u8 geneve_protocol_type[0x10]; 553321992Shselasky 554321992Shselasky u8 reserved_8[0x8]; 555321992Shselasky u8 bth_dst_qp[0x18]; 556321992Shselasky 557321992Shselasky u8 reserved_9[0xa0]; 558290650Shselasky}; 559290650Shselasky 560290650Shselaskystruct mlx5_ifc_cmd_pas_bits { 561290650Shselasky u8 pa_h[0x20]; 562290650Shselasky 563290650Shselasky u8 pa_l[0x14]; 564290650Shselasky u8 reserved_0[0xc]; 565290650Shselasky}; 566290650Shselasky 567290650Shselaskystruct mlx5_ifc_uint64_bits { 568290650Shselasky u8 hi[0x20]; 569290650Shselasky 570290650Shselasky u8 lo[0x20]; 571290650Shselasky}; 572290650Shselasky 573306233Shselaskystruct mlx5_ifc_application_prio_entry_bits { 574306233Shselasky u8 reserved_0[0x8]; 575306233Shselasky u8 priority[0x3]; 576306233Shselasky u8 reserved_1[0x2]; 577306233Shselasky u8 sel[0x3]; 578306233Shselasky u8 protocol_id[0x10]; 579306233Shselasky}; 580306233Shselasky 581290650Shselaskystruct mlx5_ifc_nodnic_ring_doorbell_bits { 582290650Shselasky u8 reserved_0[0x8]; 583290650Shselasky u8 ring_pi[0x10]; 584290650Shselasky u8 reserved_1[0x8]; 585290650Shselasky}; 586290650Shselasky 587290650Shselaskyenum { 588290650Shselasky MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0, 589290650Shselasky MLX5_ADS_STAT_RATE_2_5GBPS = 0x7, 590290650Shselasky MLX5_ADS_STAT_RATE_10GBPS = 0x8, 591290650Shselasky MLX5_ADS_STAT_RATE_30GBPS = 0x9, 592290650Shselasky MLX5_ADS_STAT_RATE_5GBPS = 0xa, 593290650Shselasky MLX5_ADS_STAT_RATE_20GBPS = 0xb, 594290650Shselasky MLX5_ADS_STAT_RATE_40GBPS = 0xc, 595290650Shselasky MLX5_ADS_STAT_RATE_60GBPS = 0xd, 596290650Shselasky MLX5_ADS_STAT_RATE_80GBPS = 0xe, 597290650Shselasky MLX5_ADS_STAT_RATE_120GBPS = 0xf, 598290650Shselasky}; 599290650Shselasky 600290650Shselaskystruct mlx5_ifc_ads_bits { 601290650Shselasky u8 fl[0x1]; 602290650Shselasky u8 free_ar[0x1]; 603290650Shselasky u8 reserved_0[0xe]; 604290650Shselasky u8 pkey_index[0x10]; 605290650Shselasky 606290650Shselasky u8 reserved_1[0x8]; 607290650Shselasky u8 grh[0x1]; 608290650Shselasky u8 mlid[0x7]; 609290650Shselasky u8 rlid[0x10]; 610290650Shselasky 611290650Shselasky u8 ack_timeout[0x5]; 612290650Shselasky u8 reserved_2[0x3]; 613290650Shselasky u8 src_addr_index[0x8]; 614290650Shselasky u8 log_rtm[0x4]; 615290650Shselasky u8 stat_rate[0x4]; 616290650Shselasky u8 hop_limit[0x8]; 617290650Shselasky 618290650Shselasky u8 reserved_3[0x4]; 619290650Shselasky u8 tclass[0x8]; 620290650Shselasky u8 flow_label[0x14]; 621290650Shselasky 622290650Shselasky u8 rgid_rip[16][0x8]; 623290650Shselasky 624290650Shselasky u8 reserved_4[0x4]; 625290650Shselasky u8 f_dscp[0x1]; 626290650Shselasky u8 f_ecn[0x1]; 627290650Shselasky u8 reserved_5[0x1]; 628290650Shselasky u8 f_eth_prio[0x1]; 629290650Shselasky u8 ecn[0x2]; 630290650Shselasky u8 dscp[0x6]; 631290650Shselasky u8 udp_sport[0x10]; 632290650Shselasky 633290650Shselasky u8 dei_cfi[0x1]; 634290650Shselasky u8 eth_prio[0x3]; 635290650Shselasky u8 sl[0x4]; 636290650Shselasky u8 port[0x8]; 637290650Shselasky u8 rmac_47_32[0x10]; 638290650Shselasky 639290650Shselasky u8 rmac_31_0[0x20]; 640290650Shselasky}; 641290650Shselasky 642306233Shselaskystruct mlx5_ifc_diagnostic_counter_cap_bits { 643306233Shselasky u8 sync[0x1]; 644306233Shselasky u8 reserved_0[0xf]; 645306233Shselasky u8 counter_id[0x10]; 646306233Shselasky}; 647306233Shselasky 648306233Shselaskystruct mlx5_ifc_debug_cap_bits { 649306233Shselasky u8 reserved_0[0x18]; 650306233Shselasky u8 log_max_samples[0x8]; 651306233Shselasky 652306233Shselasky u8 single[0x1]; 653306233Shselasky u8 repetitive[0x1]; 654306233Shselasky u8 health_mon_rx_activity[0x1]; 655306233Shselasky u8 reserved_1[0x15]; 656306233Shselasky u8 log_min_sample_period[0x8]; 657306233Shselasky 658306233Shselasky u8 reserved_2[0x1c0]; 659306233Shselasky 660306233Shselasky struct mlx5_ifc_diagnostic_counter_cap_bits diagnostic_counter[0x1f0]; 661306233Shselasky}; 662306233Shselasky 663308678Shselaskystruct mlx5_ifc_qos_cap_bits { 664308678Shselasky u8 packet_pacing[0x1]; 665308678Shselasky u8 esw_scheduling[0x1]; 666308678Shselasky u8 esw_bw_share[0x1]; 667308678Shselasky u8 esw_rate_limit[0x1]; 668308678Shselasky u8 hll[0x1]; 669308678Shselasky u8 packet_pacing_burst_bound[0x1]; 670308678Shselasky u8 reserved_at_6[0x1a]; 671308678Shselasky 672308678Shselasky u8 reserved_at_20[0x20]; 673308678Shselasky 674308678Shselasky u8 packet_pacing_max_rate[0x20]; 675308678Shselasky 676308678Shselasky u8 packet_pacing_min_rate[0x20]; 677308678Shselasky 678308678Shselasky u8 reserved_at_80[0x10]; 679308678Shselasky u8 packet_pacing_rate_table_size[0x10]; 680308678Shselasky 681308678Shselasky u8 esw_element_type[0x10]; 682308678Shselasky u8 esw_tsar_type[0x10]; 683308678Shselasky 684308678Shselasky u8 reserved_at_c0[0x10]; 685308678Shselasky u8 max_qos_para_vport[0x10]; 686308678Shselasky 687308678Shselasky u8 max_tsar_bw_share[0x20]; 688308678Shselasky 689308678Shselasky u8 reserved_at_100[0x700]; 690308678Shselasky}; 691308678Shselasky 692306233Shselaskystruct mlx5_ifc_snapshot_cap_bits { 693306233Shselasky u8 reserved_0[0x1d]; 694306233Shselasky u8 suspend_qp_uc[0x1]; 695306233Shselasky u8 suspend_qp_ud[0x1]; 696306233Shselasky u8 suspend_qp_rc[0x1]; 697306233Shselasky 698306233Shselasky u8 reserved_1[0x1c]; 699306233Shselasky u8 restore_pd[0x1]; 700306233Shselasky u8 restore_uar[0x1]; 701306233Shselasky u8 restore_mkey[0x1]; 702306233Shselasky u8 restore_qp[0x1]; 703306233Shselasky 704306233Shselasky u8 reserved_2[0x1e]; 705306233Shselasky u8 named_mkey[0x1]; 706306233Shselasky u8 named_qp[0x1]; 707306233Shselasky 708306233Shselasky u8 reserved_3[0x7a0]; 709306233Shselasky}; 710306233Shselasky 711290650Shselaskystruct mlx5_ifc_e_switch_cap_bits { 712290650Shselasky u8 vport_svlan_strip[0x1]; 713290650Shselasky u8 vport_cvlan_strip[0x1]; 714290650Shselasky u8 vport_svlan_insert[0x1]; 715290650Shselasky u8 vport_cvlan_insert_if_not_exist[0x1]; 716290650Shselasky u8 vport_cvlan_insert_overwrite[0x1]; 717290650Shselasky 718306233Shselasky u8 reserved_0[0x19]; 719306233Shselasky 720306233Shselasky u8 nic_vport_node_guid_modify[0x1]; 721306233Shselasky u8 nic_vport_port_guid_modify[0x1]; 722306233Shselasky 723290650Shselasky u8 reserved_1[0x7e0]; 724290650Shselasky}; 725290650Shselasky 726290650Shselaskystruct mlx5_ifc_flow_table_eswitch_cap_bits { 727290650Shselasky u8 reserved_0[0x200]; 728290650Shselasky 729290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb; 730290650Shselasky 731290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress; 732290650Shselasky 733290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress; 734290650Shselasky 735290650Shselasky u8 reserved_1[0x7800]; 736290650Shselasky}; 737290650Shselasky 738290650Shselaskystruct mlx5_ifc_flow_table_nic_cap_bits { 739329200Shselasky u8 nic_rx_multi_path_tirs[0x1]; 740329200Shselasky u8 nic_rx_multi_path_tirs_fts[0x1]; 741329200Shselasky u8 allow_sniffer_and_nic_rx_shared_tir[0x1]; 742329200Shselasky u8 reserved_at_3[0x1fd]; 743290650Shselasky 744290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive; 745290650Shselasky 746290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_rdma; 747290650Shselasky 748290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer; 749290650Shselasky 750290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit; 751290650Shselasky 752290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_rdma; 753290650Shselasky 754290650Shselasky struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer; 755290650Shselasky 756290650Shselasky u8 reserved_1[0x7200]; 757290650Shselasky}; 758290650Shselasky 759341975Shselaskystruct mlx5_ifc_pddr_module_info_bits { 760341975Shselasky u8 cable_technology[0x8]; 761341975Shselasky u8 cable_breakout[0x8]; 762341975Shselasky u8 ext_ethernet_compliance_code[0x8]; 763341975Shselasky u8 ethernet_compliance_code[0x8]; 764341975Shselasky 765341975Shselasky u8 cable_type[0x4]; 766341975Shselasky u8 cable_vendor[0x4]; 767341975Shselasky u8 cable_length[0x8]; 768341975Shselasky u8 cable_identifier[0x8]; 769341975Shselasky u8 cable_power_class[0x8]; 770341975Shselasky 771341975Shselasky u8 reserved_at_40[0x8]; 772341975Shselasky u8 cable_rx_amp[0x8]; 773341975Shselasky u8 cable_rx_emphasis[0x8]; 774341975Shselasky u8 cable_tx_equalization[0x8]; 775341975Shselasky 776341975Shselasky u8 reserved_at_60[0x8]; 777341975Shselasky u8 cable_attenuation_12g[0x8]; 778341975Shselasky u8 cable_attenuation_7g[0x8]; 779341975Shselasky u8 cable_attenuation_5g[0x8]; 780341975Shselasky 781341975Shselasky u8 reserved_at_80[0x8]; 782341975Shselasky u8 rx_cdr_cap[0x4]; 783341975Shselasky u8 tx_cdr_cap[0x4]; 784341975Shselasky u8 reserved_at_90[0x4]; 785341975Shselasky u8 rx_cdr_state[0x4]; 786341975Shselasky u8 reserved_at_98[0x4]; 787341975Shselasky u8 tx_cdr_state[0x4]; 788341975Shselasky 789341975Shselasky u8 vendor_name[16][0x8]; 790341975Shselasky 791341975Shselasky u8 vendor_pn[16][0x8]; 792341975Shselasky 793341975Shselasky u8 vendor_rev[0x20]; 794341975Shselasky 795341975Shselasky u8 fw_version[0x20]; 796341975Shselasky 797341975Shselasky u8 vendor_sn[16][0x8]; 798341975Shselasky 799341975Shselasky u8 temperature[0x10]; 800341975Shselasky u8 voltage[0x10]; 801341975Shselasky 802341975Shselasky u8 rx_power_lane0[0x10]; 803341975Shselasky u8 rx_power_lane1[0x10]; 804341975Shselasky 805341975Shselasky u8 rx_power_lane2[0x10]; 806341975Shselasky u8 rx_power_lane3[0x10]; 807341975Shselasky 808341975Shselasky u8 reserved_at_2c0[0x40]; 809341975Shselasky 810341975Shselasky u8 tx_power_lane0[0x10]; 811341975Shselasky u8 tx_power_lane1[0x10]; 812341975Shselasky 813341975Shselasky u8 tx_power_lane2[0x10]; 814341975Shselasky u8 tx_power_lane3[0x10]; 815341975Shselasky 816341975Shselasky u8 reserved_at_340[0x40]; 817341975Shselasky 818341975Shselasky u8 tx_bias_lane0[0x10]; 819341975Shselasky u8 tx_bias_lane1[0x10]; 820341975Shselasky 821341975Shselasky u8 tx_bias_lane2[0x10]; 822341975Shselasky u8 tx_bias_lane3[0x10]; 823341975Shselasky 824341975Shselasky u8 reserved_at_3c0[0x40]; 825341975Shselasky 826341975Shselasky u8 temperature_high_th[0x10]; 827341975Shselasky u8 temperature_low_th[0x10]; 828341975Shselasky 829341975Shselasky u8 voltage_high_th[0x10]; 830341975Shselasky u8 voltage_low_th[0x10]; 831341975Shselasky 832341975Shselasky u8 rx_power_high_th[0x10]; 833341975Shselasky u8 rx_power_low_th[0x10]; 834341975Shselasky 835341975Shselasky u8 tx_power_high_th[0x10]; 836341975Shselasky u8 tx_power_low_th[0x10]; 837341975Shselasky 838341975Shselasky u8 tx_bias_high_th[0x10]; 839341975Shselasky u8 tx_bias_low_th[0x10]; 840341975Shselasky 841341975Shselasky u8 reserved_at_4a0[0x10]; 842341975Shselasky u8 wavelength[0x10]; 843341975Shselasky 844341975Shselasky u8 reserved_at_4c0[0x300]; 845341975Shselasky}; 846341975Shselasky 847290650Shselaskystruct mlx5_ifc_per_protocol_networking_offload_caps_bits { 848290650Shselasky u8 csum_cap[0x1]; 849290650Shselasky u8 vlan_cap[0x1]; 850290650Shselasky u8 lro_cap[0x1]; 851290650Shselasky u8 lro_psh_flag[0x1]; 852290650Shselasky u8 lro_time_stamp[0x1]; 853290650Shselasky u8 lro_max_msg_sz_mode[0x2]; 854321992Shselasky u8 wqe_vlan_insert[0x1]; 855321992Shselasky u8 self_lb_en_modifiable[0x1]; 856290650Shselasky u8 self_lb_mc[0x1]; 857290650Shselasky u8 self_lb_uc[0x1]; 858290650Shselasky u8 max_lso_cap[0x5]; 859290650Shselasky u8 multi_pkt_send_wqe[0x2]; 860290650Shselasky u8 wqe_inline_mode[0x2]; 861290650Shselasky u8 rss_ind_tbl_cap[0x4]; 862329204Shselasky u8 scatter_fcs[0x1]; 863329204Shselasky u8 reserved_1[0x2]; 864290650Shselasky u8 tunnel_lso_const_out_ip_id[0x1]; 865290650Shselasky u8 tunnel_lro_gre[0x1]; 866290650Shselasky u8 tunnel_lro_vxlan[0x1]; 867290650Shselasky u8 tunnel_statless_gre[0x1]; 868290650Shselasky u8 tunnel_stateless_vxlan[0x1]; 869290650Shselasky 870308678Shselasky u8 swp[0x1]; 871308678Shselasky u8 swp_csum[0x1]; 872308678Shselasky u8 swp_lso[0x1]; 873321992Shselasky u8 reserved_2[0x1b]; 874321992Shselasky u8 max_geneve_opt_len[0x1]; 875308678Shselasky u8 tunnel_stateless_geneve_rx[0x1]; 876290650Shselasky 877290650Shselasky u8 reserved_3[0x10]; 878290650Shselasky u8 lro_min_mss_size[0x10]; 879290650Shselasky 880290650Shselasky u8 reserved_4[0x120]; 881290650Shselasky 882290650Shselasky u8 lro_timer_supported_periods[4][0x20]; 883290650Shselasky 884290650Shselasky u8 reserved_5[0x600]; 885290650Shselasky}; 886290650Shselasky 887290650Shselaskyenum { 888290650Shselasky MLX5_ROCE_CAP_L3_TYPE_GRH = 0x1, 889290650Shselasky MLX5_ROCE_CAP_L3_TYPE_IPV4 = 0x2, 890290650Shselasky MLX5_ROCE_CAP_L3_TYPE_IPV6 = 0x4, 891290650Shselasky}; 892290650Shselasky 893290650Shselaskystruct mlx5_ifc_roce_cap_bits { 894290650Shselasky u8 roce_apm[0x1]; 895306233Shselasky u8 rts2rts_primary_eth_prio[0x1]; 896306233Shselasky u8 roce_rx_allow_untagged[0x1]; 897306233Shselasky u8 rts2rts_src_addr_index_for_vlan_valid_vlan_id[0x1]; 898290650Shselasky 899306233Shselasky u8 reserved_0[0x1c]; 900306233Shselasky 901290650Shselasky u8 reserved_1[0x60]; 902290650Shselasky 903290650Shselasky u8 reserved_2[0xc]; 904290650Shselasky u8 l3_type[0x4]; 905290650Shselasky u8 reserved_3[0x8]; 906290650Shselasky u8 roce_version[0x8]; 907290650Shselasky 908290650Shselasky u8 reserved_4[0x10]; 909290650Shselasky u8 r_roce_dest_udp_port[0x10]; 910290650Shselasky 911290650Shselasky u8 r_roce_max_src_udp_port[0x10]; 912290650Shselasky u8 r_roce_min_src_udp_port[0x10]; 913290650Shselasky 914290650Shselasky u8 reserved_5[0x10]; 915290650Shselasky u8 roce_address_table_size[0x10]; 916290650Shselasky 917290650Shselasky u8 reserved_6[0x700]; 918290650Shselasky}; 919290650Shselasky 920290650Shselaskyenum { 921290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x1, 922290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2, 923290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4, 924290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8, 925290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10, 926290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20, 927290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40, 928290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80, 929290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100, 930290650Shselasky}; 931290650Shselasky 932290650Shselaskyenum { 933290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1, 934290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2, 935290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4, 936290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8, 937290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10, 938290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20, 939290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40, 940290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80, 941290650Shselasky MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100, 942290650Shselasky}; 943290650Shselasky 944290650Shselaskystruct mlx5_ifc_atomic_caps_bits { 945290650Shselasky u8 reserved_0[0x40]; 946290650Shselasky 947306233Shselasky u8 atomic_req_8B_endianess_mode[0x2]; 948306233Shselasky u8 reserved_1[0x4]; 949306233Shselasky u8 supported_atomic_req_8B_endianess_mode_1[0x1]; 950290650Shselasky 951306233Shselasky u8 reserved_2[0x19]; 952290650Shselasky 953306233Shselasky u8 reserved_3[0x20]; 954306233Shselasky 955306233Shselasky u8 reserved_4[0x10]; 956290650Shselasky u8 atomic_operations[0x10]; 957290650Shselasky 958306233Shselasky u8 reserved_5[0x10]; 959290650Shselasky u8 atomic_size_qp[0x10]; 960290650Shselasky 961306233Shselasky u8 reserved_6[0x10]; 962290650Shselasky u8 atomic_size_dc[0x10]; 963290650Shselasky 964306233Shselasky u8 reserved_7[0x720]; 965290650Shselasky}; 966290650Shselasky 967290650Shselaskystruct mlx5_ifc_odp_cap_bits { 968290650Shselasky u8 reserved_0[0x40]; 969290650Shselasky 970290650Shselasky u8 sig[0x1]; 971290650Shselasky u8 reserved_1[0x1f]; 972290650Shselasky 973290650Shselasky u8 reserved_2[0x20]; 974290650Shselasky 975290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps; 976290650Shselasky 977290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps; 978290650Shselasky 979290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps; 980290650Shselasky 981290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits xrc_odp_caps; 982290650Shselasky 983290650Shselasky struct mlx5_ifc_odp_per_transport_service_cap_bits dc_odp_caps; 984290650Shselasky 985290650Shselasky u8 reserved_3[0x6e0]; 986290650Shselasky}; 987290650Shselasky 988290650Shselaskyenum { 989290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0, 990290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1, 991290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2, 992290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3, 993290650Shselasky MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4, 994290650Shselasky}; 995290650Shselasky 996290650Shselaskyenum { 997290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0, 998290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1, 999290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2, 1000290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3, 1001290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4, 1002290650Shselasky MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5, 1003290650Shselasky}; 1004290650Shselasky 1005290650Shselaskyenum { 1006290650Shselasky MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0, 1007290650Shselasky MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1, 1008290650Shselasky}; 1009290650Shselasky 1010290650Shselaskyenum { 1011290650Shselasky MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0, 1012290650Shselasky MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1, 1013290650Shselasky MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3, 1014290650Shselasky}; 1015290650Shselasky 1016290650Shselaskystruct mlx5_ifc_cmd_hca_cap_bits { 1017290650Shselasky u8 reserved_0[0x80]; 1018290650Shselasky 1019290650Shselasky u8 log_max_srq_sz[0x8]; 1020290650Shselasky u8 log_max_qp_sz[0x8]; 1021290650Shselasky u8 reserved_1[0xb]; 1022290650Shselasky u8 log_max_qp[0x5]; 1023290650Shselasky 1024290650Shselasky u8 reserved_2[0xb]; 1025290650Shselasky u8 log_max_srq[0x5]; 1026290650Shselasky u8 reserved_3[0x10]; 1027290650Shselasky 1028290650Shselasky u8 reserved_4[0x8]; 1029290650Shselasky u8 log_max_cq_sz[0x8]; 1030290650Shselasky u8 reserved_5[0xb]; 1031290650Shselasky u8 log_max_cq[0x5]; 1032290650Shselasky 1033290650Shselasky u8 log_max_eq_sz[0x8]; 1034341940Shselasky u8 relaxed_ordering_write[1]; 1035341940Shselasky u8 reserved_6[0x1]; 1036290650Shselasky u8 log_max_mkey[0x6]; 1037347818Shselasky u8 reserved_7[0xb]; 1038347818Shselasky u8 fast_teardown[0x1]; 1039290650Shselasky u8 log_max_eq[0x4]; 1040290650Shselasky 1041290650Shselasky u8 max_indirection[0x8]; 1042290650Shselasky u8 reserved_8[0x1]; 1043290650Shselasky u8 log_max_mrw_sz[0x7]; 1044331810Shselasky u8 force_teardown[0x1]; 1045331810Shselasky u8 reserved_9[0x1]; 1046290650Shselasky u8 log_max_bsf_list_size[0x6]; 1047290650Shselasky u8 reserved_10[0x2]; 1048290650Shselasky u8 log_max_klm_list_size[0x6]; 1049290650Shselasky 1050290650Shselasky u8 reserved_11[0xa]; 1051290650Shselasky u8 log_max_ra_req_dc[0x6]; 1052290650Shselasky u8 reserved_12[0xa]; 1053290650Shselasky u8 log_max_ra_res_dc[0x6]; 1054290650Shselasky 1055290650Shselasky u8 reserved_13[0xa]; 1056290650Shselasky u8 log_max_ra_req_qp[0x6]; 1057290650Shselasky u8 reserved_14[0xa]; 1058290650Shselasky u8 log_max_ra_res_qp[0x6]; 1059290650Shselasky 1060290650Shselasky u8 pad_cap[0x1]; 1061290650Shselasky u8 cc_query_allowed[0x1]; 1062290650Shselasky u8 cc_modify_allowed[0x1]; 1063306233Shselasky u8 start_pad[0x1]; 1064306233Shselasky u8 cache_line_128byte[0x1]; 1065337098Shselasky u8 reserved_at_165[0xa]; 1066337098Shselasky u8 qcam_reg[0x1]; 1067290650Shselasky u8 gid_table_size[0x10]; 1068290650Shselasky 1069290650Shselasky u8 out_of_seq_cnt[0x1]; 1070290650Shselasky u8 vport_counters[0x1]; 1071306233Shselasky u8 retransmission_q_counters[0x1]; 1072306233Shselasky u8 debug[0x1]; 1073321992Shselasky u8 modify_rq_counters_set_id[0x1]; 1074321992Shselasky u8 rq_delay_drop[0x1]; 1075290650Shselasky u8 max_qp_cnt[0xa]; 1076290650Shselasky u8 pkey_table_size[0x10]; 1077290650Shselasky 1078290650Shselasky u8 vport_group_manager[0x1]; 1079290650Shselasky u8 vhca_group_manager[0x1]; 1080290650Shselasky u8 ib_virt[0x1]; 1081290650Shselasky u8 eth_virt[0x1]; 1082290650Shselasky u8 reserved_17[0x1]; 1083290650Shselasky u8 ets[0x1]; 1084290650Shselasky u8 nic_flow_table[0x1]; 1085290650Shselasky u8 eswitch_flow_table[0x1]; 1086347820Shselasky u8 reserved_18[0x1]; 1087347820Shselasky u8 mcam_reg[0x1]; 1088347820Shselasky u8 pcam_reg[0x1]; 1089290650Shselasky u8 local_ca_ack_delay[0x5]; 1090290650Shselasky u8 port_module_event[0x1]; 1091290650Shselasky u8 reserved_19[0x5]; 1092290650Shselasky u8 port_type[0x2]; 1093290650Shselasky u8 num_ports[0x8]; 1094290650Shselasky 1095290650Shselasky u8 snapshot[0x1]; 1096290650Shselasky u8 reserved_20[0x2]; 1097290650Shselasky u8 log_max_msg[0x5]; 1098290650Shselasky u8 reserved_21[0x4]; 1099290650Shselasky u8 max_tc[0x4]; 1100306233Shselasky u8 temp_warn_event[0x1]; 1101306233Shselasky u8 dcbx[0x1]; 1102341958Shselasky u8 general_notification_event[0x1]; 1103341958Shselasky u8 reserved_at_1d3[0x2]; 1104341958Shselasky u8 fpga[0x1]; 1105290650Shselasky u8 rol_s[0x1]; 1106290650Shselasky u8 rol_g[0x1]; 1107290650Shselasky u8 reserved_23[0x1]; 1108290650Shselasky u8 wol_s[0x1]; 1109290650Shselasky u8 wol_g[0x1]; 1110290650Shselasky u8 wol_a[0x1]; 1111290650Shselasky u8 wol_b[0x1]; 1112290650Shselasky u8 wol_m[0x1]; 1113290650Shselasky u8 wol_u[0x1]; 1114290650Shselasky u8 wol_p[0x1]; 1115290650Shselasky 1116290650Shselasky u8 stat_rate_support[0x10]; 1117290650Shselasky u8 reserved_24[0xc]; 1118290650Shselasky u8 cqe_version[0x4]; 1119290650Shselasky 1120290650Shselasky u8 compact_address_vector[0x1]; 1121290650Shselasky u8 striding_rq[0x1]; 1122306233Shselasky u8 reserved_25[0x1]; 1123306233Shselasky u8 ipoib_enhanced_offloads[0x1]; 1124306233Shselasky u8 ipoib_ipoib_offloads[0x1]; 1125306233Shselasky u8 reserved_26[0x8]; 1126306233Shselasky u8 dc_connect_qp[0x1]; 1127290650Shselasky u8 dc_cnak_trace[0x1]; 1128290650Shselasky u8 drain_sigerr[0x1]; 1129290650Shselasky u8 cmdif_checksum[0x2]; 1130290650Shselasky u8 sigerr_cqe[0x1]; 1131306233Shselasky u8 reserved_27[0x1]; 1132290650Shselasky u8 wq_signature[0x1]; 1133290650Shselasky u8 sctr_data_cqe[0x1]; 1134306233Shselasky u8 reserved_28[0x1]; 1135290650Shselasky u8 sho[0x1]; 1136290650Shselasky u8 tph[0x1]; 1137290650Shselasky u8 rf[0x1]; 1138290650Shselasky u8 dct[0x1]; 1139306233Shselasky u8 qos[0x1]; 1140290650Shselasky u8 eth_net_offloads[0x1]; 1141290650Shselasky u8 roce[0x1]; 1142290650Shselasky u8 atomic[0x1]; 1143306233Shselasky u8 reserved_30[0x1]; 1144290650Shselasky 1145290650Shselasky u8 cq_oi[0x1]; 1146290650Shselasky u8 cq_resize[0x1]; 1147290650Shselasky u8 cq_moderation[0x1]; 1148321992Shselasky u8 cq_period_mode_modify[0x1]; 1149321992Shselasky u8 cq_invalidate[0x1]; 1150321992Shselasky u8 reserved_at_225[0x1]; 1151290650Shselasky u8 cq_eq_remap[0x1]; 1152290650Shselasky u8 pg[0x1]; 1153290650Shselasky u8 block_lb_mc[0x1]; 1154290650Shselasky u8 exponential_backoff[0x1]; 1155290650Shselasky u8 scqe_break_moderation[0x1]; 1156290650Shselasky u8 cq_period_start_from_cqe[0x1]; 1157290650Shselasky u8 cd[0x1]; 1158290650Shselasky u8 atm[0x1]; 1159290650Shselasky u8 apm[0x1]; 1160329204Shselasky u8 imaicl[0x1]; 1161329204Shselasky u8 reserved_32[0x6]; 1162290650Shselasky u8 qkv[0x1]; 1163290650Shselasky u8 pkv[0x1]; 1164329204Shselasky u8 set_deth_sqpn[0x1]; 1165329204Shselasky u8 reserved_33[0x3]; 1166290650Shselasky u8 xrc[0x1]; 1167290650Shselasky u8 ud[0x1]; 1168290650Shselasky u8 uc[0x1]; 1169290650Shselasky u8 rc[0x1]; 1170290650Shselasky 1171306233Shselasky u8 reserved_34[0xa]; 1172290650Shselasky u8 uar_sz[0x6]; 1173306233Shselasky u8 reserved_35[0x8]; 1174290650Shselasky u8 log_pg_sz[0x8]; 1175290650Shselasky 1176290650Shselasky u8 bf[0x1]; 1177290650Shselasky u8 driver_version[0x1]; 1178290650Shselasky u8 pad_tx_eth_packet[0x1]; 1179306233Shselasky u8 reserved_36[0x8]; 1180290650Shselasky u8 log_bf_reg_size[0x5]; 1181306233Shselasky u8 reserved_37[0x10]; 1182290650Shselasky 1183306233Shselasky u8 num_of_diagnostic_counters[0x10]; 1184290650Shselasky u8 max_wqe_sz_sq[0x10]; 1185290650Shselasky 1186290650Shselasky u8 reserved_38[0x10]; 1187290650Shselasky u8 max_wqe_sz_rq[0x10]; 1188290650Shselasky 1189290650Shselasky u8 reserved_39[0x10]; 1190290650Shselasky u8 max_wqe_sz_sq_dc[0x10]; 1191290650Shselasky 1192290650Shselasky u8 reserved_40[0x7]; 1193290650Shselasky u8 max_qp_mcg[0x19]; 1194290650Shselasky 1195290650Shselasky u8 reserved_41[0x18]; 1196290650Shselasky u8 log_max_mcg[0x8]; 1197290650Shselasky 1198290650Shselasky u8 reserved_42[0x3]; 1199290650Shselasky u8 log_max_transport_domain[0x5]; 1200290650Shselasky u8 reserved_43[0x3]; 1201290650Shselasky u8 log_max_pd[0x5]; 1202290650Shselasky u8 reserved_44[0xb]; 1203290650Shselasky u8 log_max_xrcd[0x5]; 1204290650Shselasky 1205347850Shselasky u8 nic_receive_steering_discard[0x1]; 1206347850Shselasky u8 reserved_45[0x7]; 1207347850Shselasky u8 log_max_flow_counter_bulk[0x8]; 1208290650Shselasky u8 max_flow_counter[0x10]; 1209290650Shselasky 1210290650Shselasky u8 reserved_46[0x3]; 1211290650Shselasky u8 log_max_rq[0x5]; 1212290650Shselasky u8 reserved_47[0x3]; 1213290650Shselasky u8 log_max_sq[0x5]; 1214290650Shselasky u8 reserved_48[0x3]; 1215290650Shselasky u8 log_max_tir[0x5]; 1216290650Shselasky u8 reserved_49[0x3]; 1217290650Shselasky u8 log_max_tis[0x5]; 1218290650Shselasky 1219290650Shselasky u8 basic_cyclic_rcv_wqe[0x1]; 1220290650Shselasky u8 reserved_50[0x2]; 1221290650Shselasky u8 log_max_rmp[0x5]; 1222290650Shselasky u8 reserved_51[0x3]; 1223290650Shselasky u8 log_max_rqt[0x5]; 1224290650Shselasky u8 reserved_52[0x3]; 1225290650Shselasky u8 log_max_rqt_size[0x5]; 1226290650Shselasky u8 reserved_53[0x3]; 1227290650Shselasky u8 log_max_tis_per_sq[0x5]; 1228290650Shselasky 1229290650Shselasky u8 reserved_54[0x3]; 1230290650Shselasky u8 log_max_stride_sz_rq[0x5]; 1231290650Shselasky u8 reserved_55[0x3]; 1232290650Shselasky u8 log_min_stride_sz_rq[0x5]; 1233290650Shselasky u8 reserved_56[0x3]; 1234290650Shselasky u8 log_max_stride_sz_sq[0x5]; 1235290650Shselasky u8 reserved_57[0x3]; 1236290650Shselasky u8 log_min_stride_sz_sq[0x5]; 1237290650Shselasky 1238290650Shselasky u8 reserved_58[0x1b]; 1239290650Shselasky u8 log_max_wq_sz[0x5]; 1240290650Shselasky 1241290650Shselasky u8 nic_vport_change_event[0x1]; 1242321992Shselasky u8 disable_local_lb[0x1]; 1243321992Shselasky u8 reserved_59[0x9]; 1244290650Shselasky u8 log_max_vlan_list[0x5]; 1245290650Shselasky u8 reserved_60[0x3]; 1246290650Shselasky u8 log_max_current_mc_list[0x5]; 1247290650Shselasky u8 reserved_61[0x3]; 1248290650Shselasky u8 log_max_current_uc_list[0x5]; 1249290650Shselasky 1250290650Shselasky u8 reserved_62[0x80]; 1251290650Shselasky 1252290650Shselasky u8 reserved_63[0x3]; 1253290650Shselasky u8 log_max_l2_table[0x5]; 1254290650Shselasky u8 reserved_64[0x8]; 1255290650Shselasky u8 log_uar_page_sz[0x10]; 1256290650Shselasky 1257290650Shselasky u8 reserved_65[0x20]; 1258290650Shselasky 1259306233Shselasky u8 device_frequency_mhz[0x20]; 1260290650Shselasky 1261306233Shselasky u8 device_frequency_khz[0x20]; 1262290650Shselasky 1263306233Shselasky u8 reserved_66[0x80]; 1264306233Shselasky 1265290650Shselasky u8 log_max_atomic_size_qp[0x8]; 1266290650Shselasky u8 reserved_67[0x10]; 1267290650Shselasky u8 log_max_atomic_size_dc[0x8]; 1268290650Shselasky 1269290650Shselasky u8 reserved_68[0x1f]; 1270290650Shselasky u8 cqe_compression[0x1]; 1271290650Shselasky 1272290650Shselasky u8 cqe_compression_timeout[0x10]; 1273290650Shselasky u8 cqe_compression_max_num[0x10]; 1274290650Shselasky 1275290650Shselasky u8 reserved_69[0x220]; 1276290650Shselasky}; 1277290650Shselasky 1278306233Shselaskyenum mlx5_flow_destination_type { 1279306233Shselasky MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0, 1280306233Shselasky MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1, 1281306233Shselasky MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2, 1282306233Shselasky}; 1283306233Shselasky 1284290650Shselaskyunion mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits { 1285290650Shselasky struct mlx5_ifc_dest_format_struct_bits dest_format_struct; 1286290650Shselasky struct mlx5_ifc_flow_counter_list_bits flow_counter_list; 1287290650Shselasky u8 reserved_0[0x40]; 1288290650Shselasky}; 1289290650Shselasky 1290290650Shselaskystruct mlx5_ifc_fte_match_param_bits { 1291290650Shselasky struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers; 1292290650Shselasky 1293290650Shselasky struct mlx5_ifc_fte_match_set_misc_bits misc_parameters; 1294290650Shselasky 1295290650Shselasky struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers; 1296290650Shselasky 1297290650Shselasky u8 reserved_0[0xa00]; 1298290650Shselasky}; 1299290650Shselasky 1300290650Shselaskyenum { 1301290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0, 1302290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1, 1303290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2, 1304290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3, 1305290650Shselasky MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4, 1306290650Shselasky}; 1307290650Shselasky 1308290650Shselaskystruct mlx5_ifc_rx_hash_field_select_bits { 1309290650Shselasky u8 l3_prot_type[0x1]; 1310290650Shselasky u8 l4_prot_type[0x1]; 1311290650Shselasky u8 selected_fields[0x1e]; 1312290650Shselasky}; 1313290650Shselasky 1314290650Shselaskyenum { 1315290650Shselasky MLX5_WQ_TYPE_LINKED_LIST = 0x0, 1316290650Shselasky MLX5_WQ_TYPE_CYCLIC = 0x1, 1317290650Shselasky MLX5_WQ_TYPE_STRQ_LINKED_LIST = 0x2, 1318290650Shselasky MLX5_WQ_TYPE_STRQ_CYCLIC = 0x3, 1319290650Shselasky}; 1320290650Shselasky 1321306233Shselaskyenum rq_type { 1322306233Shselasky RQ_TYPE_NONE, 1323306233Shselasky RQ_TYPE_STRIDE, 1324306233Shselasky}; 1325306233Shselasky 1326290650Shselaskyenum { 1327290650Shselasky MLX5_WQ_END_PAD_MODE_NONE = 0x0, 1328290650Shselasky MLX5_WQ_END_PAD_MODE_ALIGN = 0x1, 1329290650Shselasky}; 1330290650Shselasky 1331290650Shselaskystruct mlx5_ifc_wq_bits { 1332290650Shselasky u8 wq_type[0x4]; 1333290650Shselasky u8 wq_signature[0x1]; 1334290650Shselasky u8 end_padding_mode[0x2]; 1335290650Shselasky u8 cd_slave[0x1]; 1336290650Shselasky u8 reserved_0[0x18]; 1337290650Shselasky 1338290650Shselasky u8 hds_skip_first_sge[0x1]; 1339290650Shselasky u8 log2_hds_buf_size[0x3]; 1340290650Shselasky u8 reserved_1[0x7]; 1341290650Shselasky u8 page_offset[0x5]; 1342290650Shselasky u8 lwm[0x10]; 1343290650Shselasky 1344290650Shselasky u8 reserved_2[0x8]; 1345290650Shselasky u8 pd[0x18]; 1346290650Shselasky 1347290650Shselasky u8 reserved_3[0x8]; 1348290650Shselasky u8 uar_page[0x18]; 1349290650Shselasky 1350290650Shselasky u8 dbr_addr[0x40]; 1351290650Shselasky 1352290650Shselasky u8 hw_counter[0x20]; 1353290650Shselasky 1354290650Shselasky u8 sw_counter[0x20]; 1355290650Shselasky 1356290650Shselasky u8 reserved_4[0xc]; 1357290650Shselasky u8 log_wq_stride[0x4]; 1358290650Shselasky u8 reserved_5[0x3]; 1359290650Shselasky u8 log_wq_pg_sz[0x5]; 1360290650Shselasky u8 reserved_6[0x3]; 1361290650Shselasky u8 log_wq_sz[0x5]; 1362290650Shselasky 1363290650Shselasky u8 reserved_7[0x15]; 1364290650Shselasky u8 single_wqe_log_num_of_strides[0x3]; 1365290650Shselasky u8 two_byte_shift_en[0x1]; 1366290650Shselasky u8 reserved_8[0x4]; 1367290650Shselasky u8 single_stride_log_num_of_bytes[0x3]; 1368290650Shselasky 1369290650Shselasky u8 reserved_9[0x4c0]; 1370290650Shselasky 1371290650Shselasky struct mlx5_ifc_cmd_pas_bits pas[0]; 1372290650Shselasky}; 1373290650Shselasky 1374290650Shselaskystruct mlx5_ifc_rq_num_bits { 1375290650Shselasky u8 reserved_0[0x8]; 1376290650Shselasky u8 rq_num[0x18]; 1377290650Shselasky}; 1378290650Shselasky 1379290650Shselaskystruct mlx5_ifc_mac_address_layout_bits { 1380290650Shselasky u8 reserved_0[0x10]; 1381290650Shselasky u8 mac_addr_47_32[0x10]; 1382290650Shselasky 1383290650Shselasky u8 mac_addr_31_0[0x20]; 1384290650Shselasky}; 1385290650Shselasky 1386290650Shselaskystruct mlx5_ifc_cong_control_r_roce_ecn_np_bits { 1387290650Shselasky u8 reserved_0[0xa0]; 1388290650Shselasky 1389290650Shselasky u8 min_time_between_cnps[0x20]; 1390290650Shselasky 1391290650Shselasky u8 reserved_1[0x12]; 1392290650Shselasky u8 cnp_dscp[0x6]; 1393290650Shselasky u8 reserved_2[0x4]; 1394290650Shselasky u8 cnp_prio_mode[0x1]; 1395290650Shselasky u8 cnp_802p_prio[0x3]; 1396290650Shselasky 1397290650Shselasky u8 reserved_3[0x720]; 1398290650Shselasky}; 1399290650Shselasky 1400290650Shselaskystruct mlx5_ifc_cong_control_r_roce_ecn_rp_bits { 1401290650Shselasky u8 reserved_0[0x60]; 1402290650Shselasky 1403290650Shselasky u8 reserved_1[0x4]; 1404290650Shselasky u8 clamp_tgt_rate[0x1]; 1405290650Shselasky u8 reserved_2[0x3]; 1406290650Shselasky u8 clamp_tgt_rate_after_time_inc[0x1]; 1407290650Shselasky u8 reserved_3[0x17]; 1408290650Shselasky 1409290650Shselasky u8 reserved_4[0x20]; 1410290650Shselasky 1411290650Shselasky u8 rpg_time_reset[0x20]; 1412290650Shselasky 1413290650Shselasky u8 rpg_byte_reset[0x20]; 1414290650Shselasky 1415290650Shselasky u8 rpg_threshold[0x20]; 1416290650Shselasky 1417290650Shselasky u8 rpg_max_rate[0x20]; 1418290650Shselasky 1419290650Shselasky u8 rpg_ai_rate[0x20]; 1420290650Shselasky 1421290650Shselasky u8 rpg_hai_rate[0x20]; 1422290650Shselasky 1423290650Shselasky u8 rpg_gd[0x20]; 1424290650Shselasky 1425290650Shselasky u8 rpg_min_dec_fac[0x20]; 1426290650Shselasky 1427290650Shselasky u8 rpg_min_rate[0x20]; 1428290650Shselasky 1429290650Shselasky u8 reserved_5[0xe0]; 1430290650Shselasky 1431290650Shselasky u8 rate_to_set_on_first_cnp[0x20]; 1432290650Shselasky 1433290650Shselasky u8 dce_tcp_g[0x20]; 1434290650Shselasky 1435290650Shselasky u8 dce_tcp_rtt[0x20]; 1436290650Shselasky 1437290650Shselasky u8 rate_reduce_monitor_period[0x20]; 1438290650Shselasky 1439290650Shselasky u8 reserved_6[0x20]; 1440290650Shselasky 1441290650Shselasky u8 initial_alpha_value[0x20]; 1442290650Shselasky 1443290650Shselasky u8 reserved_7[0x4a0]; 1444290650Shselasky}; 1445290650Shselasky 1446290650Shselaskystruct mlx5_ifc_cong_control_802_1qau_rp_bits { 1447290650Shselasky u8 reserved_0[0x80]; 1448290650Shselasky 1449290650Shselasky u8 rppp_max_rps[0x20]; 1450290650Shselasky 1451290650Shselasky u8 rpg_time_reset[0x20]; 1452290650Shselasky 1453290650Shselasky u8 rpg_byte_reset[0x20]; 1454290650Shselasky 1455290650Shselasky u8 rpg_threshold[0x20]; 1456290650Shselasky 1457290650Shselasky u8 rpg_max_rate[0x20]; 1458290650Shselasky 1459290650Shselasky u8 rpg_ai_rate[0x20]; 1460290650Shselasky 1461290650Shselasky u8 rpg_hai_rate[0x20]; 1462290650Shselasky 1463290650Shselasky u8 rpg_gd[0x20]; 1464290650Shselasky 1465290650Shselasky u8 rpg_min_dec_fac[0x20]; 1466290650Shselasky 1467290650Shselasky u8 rpg_min_rate[0x20]; 1468290650Shselasky 1469290650Shselasky u8 reserved_1[0x640]; 1470290650Shselasky}; 1471290650Shselasky 1472290650Shselaskyenum { 1473290650Shselasky MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1, 1474290650Shselasky MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2, 1475290650Shselasky MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4, 1476290650Shselasky}; 1477290650Shselasky 1478290650Shselaskystruct mlx5_ifc_resize_field_select_bits { 1479290650Shselasky u8 resize_field_select[0x20]; 1480290650Shselasky}; 1481290650Shselasky 1482290650Shselaskyenum { 1483290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1, 1484290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2, 1485290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4, 1486290650Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8, 1487321992Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD_MODE = 0x10, 1488321992Shselasky MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_STATUS = 0x20, 1489290650Shselasky}; 1490290650Shselasky 1491290650Shselaskystruct mlx5_ifc_modify_field_select_bits { 1492290650Shselasky u8 modify_field_select[0x20]; 1493290650Shselasky}; 1494290650Shselasky 1495290650Shselaskystruct mlx5_ifc_field_select_r_roce_np_bits { 1496290650Shselasky u8 field_select_r_roce_np[0x20]; 1497290650Shselasky}; 1498290650Shselasky 1499290650Shselaskyenum { 1500290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_CLAMP_TGT_RATE = 0x2, 1501290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_CLAMP_TGT_RATE_AFTER_TIME_INC = 0x4, 1502290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_TIME_RESET = 0x8, 1503290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_BYTE_RESET = 0x10, 1504290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_THRESHOLD = 0x20, 1505290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MAX_RATE = 0x40, 1506290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_AI_RATE = 0x80, 1507290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_HAI_RATE = 0x100, 1508290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MIN_DEC_FAC = 0x200, 1509290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RPG_MIN_RATE = 0x400, 1510290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RATE_TO_SET_ON_FIRST_CNP = 0x800, 1511290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_DCE_TCP_G = 0x1000, 1512290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_DCE_TCP_RTT = 0x2000, 1513290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_RATE_REDUCE_MONITOR_PERIOD = 0x4000, 1514290650Shselasky MLX5_FIELD_SELECT_R_ROCE_RP_FIELD_SELECT_R_ROCE_RP_INITIAL_ALPHA_VALUE = 0x8000, 1515290650Shselasky}; 1516290650Shselasky 1517290650Shselaskystruct mlx5_ifc_field_select_r_roce_rp_bits { 1518290650Shselasky u8 field_select_r_roce_rp[0x20]; 1519290650Shselasky}; 1520290650Shselasky 1521290650Shselaskyenum { 1522290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4, 1523290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8, 1524290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10, 1525290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20, 1526290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40, 1527290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80, 1528290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100, 1529290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200, 1530290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400, 1531290650Shselasky MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800, 1532290650Shselasky}; 1533290650Shselasky 1534290650Shselaskystruct mlx5_ifc_field_select_802_1qau_rp_bits { 1535290650Shselasky u8 field_select_8021qaurp[0x20]; 1536290650Shselasky}; 1537290650Shselasky 1538306233Shselaskystruct mlx5_ifc_pptb_reg_bits { 1539353232Shselasky u8 reserved_at_0[0x2]; 1540306233Shselasky u8 mm[0x2]; 1541353232Shselasky u8 reserved_at_4[0x4]; 1542306233Shselasky u8 local_port[0x8]; 1543353232Shselasky u8 reserved_at_10[0x6]; 1544306233Shselasky u8 cm[0x1]; 1545306233Shselasky u8 um[0x1]; 1546306233Shselasky u8 pm[0x8]; 1547306233Shselasky 1548353232Shselasky u8 prio_x_buff[0x20]; 1549306233Shselasky 1550306233Shselasky u8 pm_msb[0x8]; 1551353232Shselasky u8 reserved_at_48[0x10]; 1552306233Shselasky u8 ctrl_buff[0x4]; 1553306233Shselasky u8 untagged_buff[0x4]; 1554306233Shselasky}; 1555306233Shselasky 1556306233Shselaskystruct mlx5_ifc_dcbx_app_reg_bits { 1557306233Shselasky u8 reserved_0[0x8]; 1558306233Shselasky u8 port_number[0x8]; 1559306233Shselasky u8 reserved_1[0x10]; 1560306233Shselasky 1561306233Shselasky u8 reserved_2[0x1a]; 1562306233Shselasky u8 num_app_prio[0x6]; 1563306233Shselasky 1564306233Shselasky u8 reserved_3[0x40]; 1565306233Shselasky 1566306233Shselasky struct mlx5_ifc_application_prio_entry_bits app_prio[0]; 1567306233Shselasky}; 1568306233Shselasky 1569306233Shselaskystruct mlx5_ifc_dcbx_param_reg_bits { 1570306233Shselasky u8 dcbx_cee_cap[0x1]; 1571306233Shselasky u8 dcbx_ieee_cap[0x1]; 1572306233Shselasky u8 dcbx_standby_cap[0x1]; 1573306233Shselasky u8 reserved_0[0x5]; 1574306233Shselasky u8 port_number[0x8]; 1575306233Shselasky u8 reserved_1[0xa]; 1576306233Shselasky u8 max_application_table_size[0x6]; 1577306233Shselasky 1578306233Shselasky u8 reserved_2[0x15]; 1579306233Shselasky u8 version_oper[0x3]; 1580306233Shselasky u8 reserved_3[0x5]; 1581306233Shselasky u8 version_admin[0x3]; 1582306233Shselasky 1583306233Shselasky u8 willing_admin[0x1]; 1584306233Shselasky u8 reserved_4[0x3]; 1585306233Shselasky u8 pfc_cap_oper[0x4]; 1586306233Shselasky u8 reserved_5[0x4]; 1587306233Shselasky u8 pfc_cap_admin[0x4]; 1588306233Shselasky u8 reserved_6[0x4]; 1589306233Shselasky u8 num_of_tc_oper[0x4]; 1590306233Shselasky u8 reserved_7[0x4]; 1591306233Shselasky u8 num_of_tc_admin[0x4]; 1592306233Shselasky 1593306233Shselasky u8 remote_willing[0x1]; 1594306233Shselasky u8 reserved_8[0x3]; 1595306233Shselasky u8 remote_pfc_cap[0x4]; 1596306233Shselasky u8 reserved_9[0x14]; 1597306233Shselasky u8 remote_num_of_tc[0x4]; 1598306233Shselasky 1599306233Shselasky u8 reserved_10[0x18]; 1600306233Shselasky u8 error[0x8]; 1601306233Shselasky 1602306233Shselasky u8 reserved_11[0x160]; 1603306233Shselasky}; 1604306233Shselasky 1605308678Shselaskystruct mlx5_ifc_qhll_bits { 1606308678Shselasky u8 reserved_at_0[0x8]; 1607308678Shselasky u8 local_port[0x8]; 1608308678Shselasky u8 reserved_at_10[0x10]; 1609308678Shselasky 1610308678Shselasky u8 reserved_at_20[0x1b]; 1611308678Shselasky u8 hll_time[0x5]; 1612308678Shselasky 1613308678Shselasky u8 stall_en[0x1]; 1614308678Shselasky u8 reserved_at_41[0x1c]; 1615308678Shselasky u8 stall_cnt[0x3]; 1616308678Shselasky}; 1617308678Shselasky 1618306233Shselaskystruct mlx5_ifc_qetcr_reg_bits { 1619306233Shselasky u8 operation_type[0x2]; 1620306233Shselasky u8 cap_local_admin[0x1]; 1621306233Shselasky u8 cap_remote_admin[0x1]; 1622306233Shselasky u8 reserved_0[0x4]; 1623306233Shselasky u8 port_number[0x8]; 1624306233Shselasky u8 reserved_1[0x10]; 1625306233Shselasky 1626306233Shselasky u8 reserved_2[0x20]; 1627306233Shselasky 1628306233Shselasky u8 tc[8][0x40]; 1629306233Shselasky 1630306233Shselasky u8 global_configuration[0x40]; 1631306233Shselasky}; 1632306233Shselasky 1633290650Shselaskystruct mlx5_ifc_nodnic_ring_config_reg_bits { 1634290650Shselasky u8 queue_address_63_32[0x20]; 1635290650Shselasky 1636290650Shselasky u8 queue_address_31_12[0x14]; 1637290650Shselasky u8 reserved_0[0x6]; 1638290650Shselasky u8 log_size[0x6]; 1639290650Shselasky 1640290650Shselasky struct mlx5_ifc_nodnic_ring_doorbell_bits doorbell; 1641290650Shselasky 1642290650Shselasky u8 reserved_1[0x8]; 1643290650Shselasky u8 queue_number[0x18]; 1644290650Shselasky 1645290650Shselasky u8 q_key[0x20]; 1646290650Shselasky 1647290650Shselasky u8 reserved_2[0x10]; 1648290650Shselasky u8 pkey_index[0x10]; 1649290650Shselasky 1650290650Shselasky u8 reserved_3[0x40]; 1651290650Shselasky}; 1652290650Shselasky 1653290650Shselaskystruct mlx5_ifc_nodnic_cq_arming_word_bits { 1654290650Shselasky u8 reserved_0[0x8]; 1655290650Shselasky u8 cq_ci[0x10]; 1656290650Shselasky u8 reserved_1[0x8]; 1657290650Shselasky}; 1658290650Shselasky 1659290650Shselaskyenum { 1660290650Shselasky MLX5_NODNIC_EVENT_WORD_LINK_TYPE_INFINIBAND = 0x0, 1661290650Shselasky MLX5_NODNIC_EVENT_WORD_LINK_TYPE_ETHERNET = 0x1, 1662290650Shselasky}; 1663290650Shselasky 1664290650Shselaskyenum { 1665290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_DOWN = 0x0, 1666290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_INITIALIZE = 0x1, 1667290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_ARMED = 0x2, 1668290650Shselasky MLX5_NODNIC_EVENT_WORD_PORT_STATE_ACTIVE = 0x3, 1669290650Shselasky}; 1670290650Shselasky 1671290650Shselaskystruct mlx5_ifc_nodnic_event_word_bits { 1672290650Shselasky u8 driver_reset_needed[0x1]; 1673290650Shselasky u8 port_management_change_event[0x1]; 1674290650Shselasky u8 reserved_0[0x19]; 1675290650Shselasky u8 link_type[0x1]; 1676290650Shselasky u8 port_state[0x4]; 1677290650Shselasky}; 1678290650Shselasky 1679290650Shselaskystruct mlx5_ifc_nic_vport_change_event_bits { 1680290650Shselasky u8 reserved_0[0x10]; 1681290650Shselasky u8 vport_num[0x10]; 1682290650Shselasky 1683290650Shselasky u8 reserved_1[0xc0]; 1684290650Shselasky}; 1685290650Shselasky 1686290650Shselaskystruct mlx5_ifc_pages_req_event_bits { 1687290650Shselasky u8 reserved_0[0x10]; 1688290650Shselasky u8 function_id[0x10]; 1689290650Shselasky 1690290650Shselasky u8 num_pages[0x20]; 1691290650Shselasky 1692290650Shselasky u8 reserved_1[0xa0]; 1693290650Shselasky}; 1694290650Shselasky 1695290650Shselaskystruct mlx5_ifc_cmd_inter_comp_event_bits { 1696290650Shselasky u8 command_completion_vector[0x20]; 1697290650Shselasky 1698290650Shselasky u8 reserved_0[0xc0]; 1699290650Shselasky}; 1700290650Shselasky 1701290650Shselaskystruct mlx5_ifc_stall_vl_event_bits { 1702290650Shselasky u8 reserved_0[0x18]; 1703290650Shselasky u8 port_num[0x1]; 1704290650Shselasky u8 reserved_1[0x3]; 1705290650Shselasky u8 vl[0x4]; 1706290650Shselasky 1707290650Shselasky u8 reserved_2[0xa0]; 1708290650Shselasky}; 1709290650Shselasky 1710290650Shselaskystruct mlx5_ifc_db_bf_congestion_event_bits { 1711290650Shselasky u8 event_subtype[0x8]; 1712290650Shselasky u8 reserved_0[0x8]; 1713290650Shselasky u8 congestion_level[0x8]; 1714290650Shselasky u8 reserved_1[0x8]; 1715290650Shselasky 1716290650Shselasky u8 reserved_2[0xa0]; 1717290650Shselasky}; 1718290650Shselasky 1719290650Shselaskystruct mlx5_ifc_gpio_event_bits { 1720290650Shselasky u8 reserved_0[0x60]; 1721290650Shselasky 1722290650Shselasky u8 gpio_event_hi[0x20]; 1723290650Shselasky 1724290650Shselasky u8 gpio_event_lo[0x20]; 1725290650Shselasky 1726290650Shselasky u8 reserved_1[0x40]; 1727290650Shselasky}; 1728290650Shselasky 1729290650Shselaskystruct mlx5_ifc_port_state_change_event_bits { 1730290650Shselasky u8 reserved_0[0x40]; 1731290650Shselasky 1732290650Shselasky u8 port_num[0x4]; 1733290650Shselasky u8 reserved_1[0x1c]; 1734290650Shselasky 1735290650Shselasky u8 reserved_2[0x80]; 1736290650Shselasky}; 1737290650Shselasky 1738290650Shselaskystruct mlx5_ifc_dropped_packet_logged_bits { 1739290650Shselasky u8 reserved_0[0xe0]; 1740290650Shselasky}; 1741290650Shselasky 1742290650Shselaskyenum { 1743290650Shselasky MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1, 1744290650Shselasky MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2, 1745290650Shselasky}; 1746290650Shselasky 1747290650Shselaskystruct mlx5_ifc_cq_error_bits { 1748290650Shselasky u8 reserved_0[0x8]; 1749290650Shselasky u8 cqn[0x18]; 1750290650Shselasky 1751290650Shselasky u8 reserved_1[0x20]; 1752290650Shselasky 1753290650Shselasky u8 reserved_2[0x18]; 1754290650Shselasky u8 syndrome[0x8]; 1755290650Shselasky 1756290650Shselasky u8 reserved_3[0x80]; 1757290650Shselasky}; 1758290650Shselasky 1759290650Shselaskystruct mlx5_ifc_rdma_page_fault_event_bits { 1760290650Shselasky u8 bytes_commited[0x20]; 1761290650Shselasky 1762290650Shselasky u8 r_key[0x20]; 1763290650Shselasky 1764290650Shselasky u8 reserved_0[0x10]; 1765290650Shselasky u8 packet_len[0x10]; 1766290650Shselasky 1767290650Shselasky u8 rdma_op_len[0x20]; 1768290650Shselasky 1769290650Shselasky u8 rdma_va[0x40]; 1770290650Shselasky 1771290650Shselasky u8 reserved_1[0x5]; 1772290650Shselasky u8 rdma[0x1]; 1773290650Shselasky u8 write[0x1]; 1774290650Shselasky u8 requestor[0x1]; 1775290650Shselasky u8 qp_number[0x18]; 1776290650Shselasky}; 1777290650Shselasky 1778290650Shselaskystruct mlx5_ifc_wqe_associated_page_fault_event_bits { 1779290650Shselasky u8 bytes_committed[0x20]; 1780290650Shselasky 1781290650Shselasky u8 reserved_0[0x10]; 1782290650Shselasky u8 wqe_index[0x10]; 1783290650Shselasky 1784290650Shselasky u8 reserved_1[0x10]; 1785290650Shselasky u8 len[0x10]; 1786290650Shselasky 1787290650Shselasky u8 reserved_2[0x60]; 1788290650Shselasky 1789290650Shselasky u8 reserved_3[0x5]; 1790290650Shselasky u8 rdma[0x1]; 1791290650Shselasky u8 write_read[0x1]; 1792290650Shselasky u8 requestor[0x1]; 1793290650Shselasky u8 qpn[0x18]; 1794290650Shselasky}; 1795290650Shselasky 1796290650Shselaskyenum { 1797290650Shselasky MLX5_QP_EVENTS_TYPE_QP = 0x0, 1798290650Shselasky MLX5_QP_EVENTS_TYPE_RQ = 0x1, 1799290650Shselasky MLX5_QP_EVENTS_TYPE_SQ = 0x2, 1800290650Shselasky}; 1801290650Shselasky 1802290650Shselaskystruct mlx5_ifc_qp_events_bits { 1803290650Shselasky u8 reserved_0[0xa0]; 1804290650Shselasky 1805290650Shselasky u8 type[0x8]; 1806290650Shselasky u8 reserved_1[0x18]; 1807290650Shselasky 1808290650Shselasky u8 reserved_2[0x8]; 1809290650Shselasky u8 qpn_rqn_sqn[0x18]; 1810290650Shselasky}; 1811290650Shselasky 1812290650Shselaskystruct mlx5_ifc_dct_events_bits { 1813290650Shselasky u8 reserved_0[0xc0]; 1814290650Shselasky 1815290650Shselasky u8 reserved_1[0x8]; 1816290650Shselasky u8 dct_number[0x18]; 1817290650Shselasky}; 1818290650Shselasky 1819290650Shselaskystruct mlx5_ifc_comp_event_bits { 1820290650Shselasky u8 reserved_0[0xc0]; 1821290650Shselasky 1822290650Shselasky u8 reserved_1[0x8]; 1823290650Shselasky u8 cq_number[0x18]; 1824290650Shselasky}; 1825290650Shselasky 1826290650Shselaskystruct mlx5_ifc_fw_version_bits { 1827290650Shselasky u8 major[0x10]; 1828290650Shselasky u8 reserved_0[0x10]; 1829290650Shselasky 1830290650Shselasky u8 minor[0x10]; 1831290650Shselasky u8 subminor[0x10]; 1832290650Shselasky 1833290650Shselasky u8 second[0x8]; 1834290650Shselasky u8 minute[0x8]; 1835290650Shselasky u8 hour[0x8]; 1836290650Shselasky u8 reserved_1[0x8]; 1837290650Shselasky 1838290650Shselasky u8 year[0x10]; 1839290650Shselasky u8 month[0x8]; 1840290650Shselasky u8 day[0x8]; 1841290650Shselasky}; 1842290650Shselasky 1843290650Shselaskyenum { 1844290650Shselasky MLX5_QPC_STATE_RST = 0x0, 1845290650Shselasky MLX5_QPC_STATE_INIT = 0x1, 1846290650Shselasky MLX5_QPC_STATE_RTR = 0x2, 1847290650Shselasky MLX5_QPC_STATE_RTS = 0x3, 1848290650Shselasky MLX5_QPC_STATE_SQER = 0x4, 1849290650Shselasky MLX5_QPC_STATE_SQD = 0x5, 1850290650Shselasky MLX5_QPC_STATE_ERR = 0x6, 1851290650Shselasky MLX5_QPC_STATE_SUSPENDED = 0x9, 1852290650Shselasky}; 1853290650Shselasky 1854290650Shselaskyenum { 1855290650Shselasky MLX5_QPC_ST_RC = 0x0, 1856290650Shselasky MLX5_QPC_ST_UC = 0x1, 1857290650Shselasky MLX5_QPC_ST_UD = 0x2, 1858290650Shselasky MLX5_QPC_ST_XRC = 0x3, 1859290650Shselasky MLX5_QPC_ST_DCI = 0x5, 1860290650Shselasky MLX5_QPC_ST_QP0 = 0x7, 1861290650Shselasky MLX5_QPC_ST_QP1 = 0x8, 1862290650Shselasky MLX5_QPC_ST_RAW_DATAGRAM = 0x9, 1863290650Shselasky MLX5_QPC_ST_REG_UMR = 0xc, 1864290650Shselasky}; 1865290650Shselasky 1866290650Shselaskyenum { 1867290650Shselasky MLX5_QP_PM_ARMED = 0x0, 1868290650Shselasky MLX5_QP_PM_REARM = 0x1, 1869290650Shselasky MLX5_QPC_PM_STATE_RESERVED = 0x2, 1870290650Shselasky MLX5_QP_PM_MIGRATED = 0x3, 1871290650Shselasky}; 1872290650Shselasky 1873290650Shselaskyenum { 1874290650Shselasky MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0, 1875290650Shselasky MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1, 1876290650Shselasky}; 1877290650Shselasky 1878290650Shselaskyenum { 1879290650Shselasky MLX5_QPC_MTU_256_BYTES = 0x1, 1880290650Shselasky MLX5_QPC_MTU_512_BYTES = 0x2, 1881290650Shselasky MLX5_QPC_MTU_1K_BYTES = 0x3, 1882290650Shselasky MLX5_QPC_MTU_2K_BYTES = 0x4, 1883290650Shselasky MLX5_QPC_MTU_4K_BYTES = 0x5, 1884290650Shselasky MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7, 1885290650Shselasky}; 1886290650Shselasky 1887290650Shselaskyenum { 1888290650Shselasky MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1, 1889290650Shselasky MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2, 1890290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3, 1891290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4, 1892290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5, 1893290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6, 1894290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7, 1895290650Shselasky MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8, 1896290650Shselasky}; 1897290650Shselasky 1898290650Shselaskyenum { 1899290650Shselasky MLX5_QPC_CS_REQ_DISABLE = 0x0, 1900290650Shselasky MLX5_QPC_CS_REQ_UP_TO_32B = 0x11, 1901290650Shselasky MLX5_QPC_CS_REQ_UP_TO_64B = 0x22, 1902290650Shselasky}; 1903290650Shselasky 1904290650Shselaskyenum { 1905290650Shselasky MLX5_QPC_CS_RES_DISABLE = 0x0, 1906290650Shselasky MLX5_QPC_CS_RES_UP_TO_32B = 0x1, 1907290650Shselasky MLX5_QPC_CS_RES_UP_TO_64B = 0x2, 1908290650Shselasky}; 1909290650Shselasky 1910290650Shselaskystruct mlx5_ifc_qpc_bits { 1911290650Shselasky u8 state[0x4]; 1912329204Shselasky u8 lag_tx_port_affinity[0x4]; 1913290650Shselasky u8 st[0x8]; 1914290650Shselasky u8 reserved_1[0x3]; 1915290650Shselasky u8 pm_state[0x2]; 1916290650Shselasky u8 reserved_2[0x7]; 1917290650Shselasky u8 end_padding_mode[0x2]; 1918290650Shselasky u8 reserved_3[0x2]; 1919290650Shselasky 1920290650Shselasky u8 wq_signature[0x1]; 1921290650Shselasky u8 block_lb_mc[0x1]; 1922290650Shselasky u8 atomic_like_write_en[0x1]; 1923290650Shselasky u8 latency_sensitive[0x1]; 1924290650Shselasky u8 reserved_4[0x1]; 1925290650Shselasky u8 drain_sigerr[0x1]; 1926290650Shselasky u8 reserved_5[0x2]; 1927290650Shselasky u8 pd[0x18]; 1928290650Shselasky 1929290650Shselasky u8 mtu[0x3]; 1930290650Shselasky u8 log_msg_max[0x5]; 1931290650Shselasky u8 reserved_6[0x1]; 1932290650Shselasky u8 log_rq_size[0x4]; 1933290650Shselasky u8 log_rq_stride[0x3]; 1934290650Shselasky u8 no_sq[0x1]; 1935290650Shselasky u8 log_sq_size[0x4]; 1936290650Shselasky u8 reserved_7[0x6]; 1937290650Shselasky u8 rlky[0x1]; 1938306233Shselasky u8 ulp_stateless_offload_mode[0x4]; 1939290650Shselasky 1940290650Shselasky u8 counter_set_id[0x8]; 1941290650Shselasky u8 uar_page[0x18]; 1942290650Shselasky 1943306233Shselasky u8 reserved_8[0x8]; 1944290650Shselasky u8 user_index[0x18]; 1945290650Shselasky 1946306233Shselasky u8 reserved_9[0x3]; 1947290650Shselasky u8 log_page_size[0x5]; 1948290650Shselasky u8 remote_qpn[0x18]; 1949290650Shselasky 1950290650Shselasky struct mlx5_ifc_ads_bits primary_address_path; 1951290650Shselasky 1952290650Shselasky struct mlx5_ifc_ads_bits secondary_address_path; 1953290650Shselasky 1954290650Shselasky u8 log_ack_req_freq[0x4]; 1955306233Shselasky u8 reserved_10[0x4]; 1956290650Shselasky u8 log_sra_max[0x3]; 1957306233Shselasky u8 reserved_11[0x2]; 1958290650Shselasky u8 retry_count[0x3]; 1959290650Shselasky u8 rnr_retry[0x3]; 1960306233Shselasky u8 reserved_12[0x1]; 1961290650Shselasky u8 fre[0x1]; 1962290650Shselasky u8 cur_rnr_retry[0x3]; 1963290650Shselasky u8 cur_retry_count[0x3]; 1964306233Shselasky u8 reserved_13[0x5]; 1965290650Shselasky 1966306233Shselasky u8 reserved_14[0x20]; 1967290650Shselasky 1968306233Shselasky u8 reserved_15[0x8]; 1969290650Shselasky u8 next_send_psn[0x18]; 1970290650Shselasky 1971306233Shselasky u8 reserved_16[0x8]; 1972290650Shselasky u8 cqn_snd[0x18]; 1973290650Shselasky 1974329204Shselasky u8 reserved_at_400[0x8]; 1975290650Shselasky 1976329204Shselasky u8 deth_sqpn[0x18]; 1977329204Shselasky u8 reserved_17[0x20]; 1978329204Shselasky 1979306233Shselasky u8 reserved_18[0x8]; 1980290650Shselasky u8 last_acked_psn[0x18]; 1981290650Shselasky 1982306233Shselasky u8 reserved_19[0x8]; 1983290650Shselasky u8 ssn[0x18]; 1984290650Shselasky 1985306233Shselasky u8 reserved_20[0x8]; 1986290650Shselasky u8 log_rra_max[0x3]; 1987306233Shselasky u8 reserved_21[0x1]; 1988290650Shselasky u8 atomic_mode[0x4]; 1989290650Shselasky u8 rre[0x1]; 1990290650Shselasky u8 rwe[0x1]; 1991290650Shselasky u8 rae[0x1]; 1992306233Shselasky u8 reserved_22[0x1]; 1993290650Shselasky u8 page_offset[0x6]; 1994306233Shselasky u8 reserved_23[0x3]; 1995290650Shselasky u8 cd_slave_receive[0x1]; 1996290650Shselasky u8 cd_slave_send[0x1]; 1997290650Shselasky u8 cd_master[0x1]; 1998290650Shselasky 1999306233Shselasky u8 reserved_24[0x3]; 2000290650Shselasky u8 min_rnr_nak[0x5]; 2001290650Shselasky u8 next_rcv_psn[0x18]; 2002290650Shselasky 2003306233Shselasky u8 reserved_25[0x8]; 2004290650Shselasky u8 xrcd[0x18]; 2005290650Shselasky 2006306233Shselasky u8 reserved_26[0x8]; 2007290650Shselasky u8 cqn_rcv[0x18]; 2008290650Shselasky 2009290650Shselasky u8 dbr_addr[0x40]; 2010290650Shselasky 2011290650Shselasky u8 q_key[0x20]; 2012290650Shselasky 2013306233Shselasky u8 reserved_27[0x5]; 2014290650Shselasky u8 rq_type[0x3]; 2015290650Shselasky u8 srqn_rmpn[0x18]; 2016290650Shselasky 2017306233Shselasky u8 reserved_28[0x8]; 2018290650Shselasky u8 rmsn[0x18]; 2019290650Shselasky 2020290650Shselasky u8 hw_sq_wqebb_counter[0x10]; 2021290650Shselasky u8 sw_sq_wqebb_counter[0x10]; 2022290650Shselasky 2023290650Shselasky u8 hw_rq_counter[0x20]; 2024290650Shselasky 2025290650Shselasky u8 sw_rq_counter[0x20]; 2026290650Shselasky 2027306233Shselasky u8 reserved_29[0x20]; 2028290650Shselasky 2029306233Shselasky u8 reserved_30[0xf]; 2030290650Shselasky u8 cgs[0x1]; 2031290650Shselasky u8 cs_req[0x8]; 2032290650Shselasky u8 cs_res[0x8]; 2033290650Shselasky 2034290650Shselasky u8 dc_access_key[0x40]; 2035290650Shselasky 2036290650Shselasky u8 rdma_active[0x1]; 2037290650Shselasky u8 comm_est[0x1]; 2038290650Shselasky u8 suspended[0x1]; 2039306233Shselasky u8 reserved_31[0x5]; 2040290650Shselasky u8 send_msg_psn[0x18]; 2041290650Shselasky 2042306233Shselasky u8 reserved_32[0x8]; 2043290650Shselasky u8 rcv_msg_psn[0x18]; 2044290650Shselasky 2045290650Shselasky u8 rdma_va[0x40]; 2046290650Shselasky 2047290650Shselasky u8 rdma_key[0x20]; 2048290650Shselasky 2049306233Shselasky u8 reserved_33[0x20]; 2050290650Shselasky}; 2051290650Shselasky 2052290650Shselaskystruct mlx5_ifc_roce_addr_layout_bits { 2053290650Shselasky u8 source_l3_address[16][0x8]; 2054290650Shselasky 2055290650Shselasky u8 reserved_0[0x3]; 2056290650Shselasky u8 vlan_valid[0x1]; 2057290650Shselasky u8 vlan_id[0xc]; 2058290650Shselasky u8 source_mac_47_32[0x10]; 2059290650Shselasky 2060290650Shselasky u8 source_mac_31_0[0x20]; 2061290650Shselasky 2062290650Shselasky u8 reserved_1[0x14]; 2063290650Shselasky u8 roce_l3_type[0x4]; 2064290650Shselasky u8 roce_version[0x8]; 2065290650Shselasky 2066290650Shselasky u8 reserved_2[0x20]; 2067290650Shselasky}; 2068290650Shselasky 2069290650Shselaskystruct mlx5_ifc_rdbc_bits { 2070290650Shselasky u8 reserved_0[0x1c]; 2071290650Shselasky u8 type[0x4]; 2072290650Shselasky 2073290650Shselasky u8 reserved_1[0x20]; 2074290650Shselasky 2075290650Shselasky u8 reserved_2[0x8]; 2076290650Shselasky u8 psn[0x18]; 2077290650Shselasky 2078290650Shselasky u8 rkey[0x20]; 2079290650Shselasky 2080290650Shselasky u8 address[0x40]; 2081290650Shselasky 2082290650Shselasky u8 byte_count[0x20]; 2083290650Shselasky 2084290650Shselasky u8 reserved_3[0x20]; 2085290650Shselasky 2086290650Shselasky u8 atomic_resp[32][0x8]; 2087290650Shselasky}; 2088290650Shselasky 2089290650Shselaskyenum { 2090290650Shselasky MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1, 2091290650Shselasky MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2, 2092290650Shselasky MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4, 2093290650Shselasky MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8, 2094290650Shselasky}; 2095290650Shselasky 2096290650Shselaskystruct mlx5_ifc_flow_context_bits { 2097290650Shselasky u8 reserved_0[0x20]; 2098290650Shselasky 2099290650Shselasky u8 group_id[0x20]; 2100290650Shselasky 2101290650Shselasky u8 reserved_1[0x8]; 2102290650Shselasky u8 flow_tag[0x18]; 2103290650Shselasky 2104290650Shselasky u8 reserved_2[0x10]; 2105290650Shselasky u8 action[0x10]; 2106290650Shselasky 2107290650Shselasky u8 reserved_3[0x8]; 2108290650Shselasky u8 destination_list_size[0x18]; 2109290650Shselasky 2110290650Shselasky u8 reserved_4[0x8]; 2111290650Shselasky u8 flow_counter_list_size[0x18]; 2112290650Shselasky 2113290650Shselasky u8 reserved_5[0x140]; 2114290650Shselasky 2115290650Shselasky struct mlx5_ifc_fte_match_param_bits match_value; 2116290650Shselasky 2117290650Shselasky u8 reserved_6[0x600]; 2118290650Shselasky 2119290650Shselasky union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0]; 2120290650Shselasky}; 2121290650Shselasky 2122290650Shselaskyenum { 2123290650Shselasky MLX5_XRC_SRQC_STATE_GOOD = 0x0, 2124290650Shselasky MLX5_XRC_SRQC_STATE_ERROR = 0x1, 2125290650Shselasky}; 2126290650Shselasky 2127290650Shselaskystruct mlx5_ifc_xrc_srqc_bits { 2128290650Shselasky u8 state[0x4]; 2129290650Shselasky u8 log_xrc_srq_size[0x4]; 2130290650Shselasky u8 reserved_0[0x18]; 2131290650Shselasky 2132290650Shselasky u8 wq_signature[0x1]; 2133290650Shselasky u8 cont_srq[0x1]; 2134290650Shselasky u8 reserved_1[0x1]; 2135290650Shselasky u8 rlky[0x1]; 2136290650Shselasky u8 basic_cyclic_rcv_wqe[0x1]; 2137290650Shselasky u8 log_rq_stride[0x3]; 2138290650Shselasky u8 xrcd[0x18]; 2139290650Shselasky 2140290650Shselasky u8 page_offset[0x6]; 2141290650Shselasky u8 reserved_2[0x2]; 2142290650Shselasky u8 cqn[0x18]; 2143290650Shselasky 2144290650Shselasky u8 reserved_3[0x20]; 2145290650Shselasky 2146290650Shselasky u8 reserved_4[0x2]; 2147290650Shselasky u8 log_page_size[0x6]; 2148290650Shselasky u8 user_index[0x18]; 2149290650Shselasky 2150290650Shselasky u8 reserved_5[0x20]; 2151290650Shselasky 2152290650Shselasky u8 reserved_6[0x8]; 2153290650Shselasky u8 pd[0x18]; 2154290650Shselasky 2155290650Shselasky u8 lwm[0x10]; 2156290650Shselasky u8 wqe_cnt[0x10]; 2157290650Shselasky 2158290650Shselasky u8 reserved_7[0x40]; 2159290650Shselasky 2160290650Shselasky u8 db_record_addr_h[0x20]; 2161290650Shselasky 2162290650Shselasky u8 db_record_addr_l[0x1e]; 2163290650Shselasky u8 reserved_8[0x2]; 2164290650Shselasky 2165290650Shselasky u8 reserved_9[0x80]; 2166290650Shselasky}; 2167290650Shselasky 2168347850Shselaskystruct mlx5_ifc_vnic_diagnostic_statistics_bits { 2169347850Shselasky u8 counter_error_queues[0x20]; 2170347850Shselasky 2171347850Shselasky u8 total_error_queues[0x20]; 2172347850Shselasky 2173347850Shselasky u8 send_queue_priority_update_flow[0x20]; 2174347850Shselasky 2175347850Shselasky u8 reserved_at_60[0x20]; 2176347850Shselasky 2177347850Shselasky u8 nic_receive_steering_discard[0x40]; 2178347850Shselasky 2179347850Shselasky u8 receive_discard_vport_down[0x40]; 2180347850Shselasky 2181347850Shselasky u8 transmit_discard_vport_down[0x40]; 2182347850Shselasky 2183347850Shselasky u8 reserved_at_140[0xec0]; 2184347850Shselasky}; 2185347850Shselasky 2186290650Shselaskystruct mlx5_ifc_traffic_counter_bits { 2187290650Shselasky u8 packets[0x40]; 2188290650Shselasky 2189290650Shselasky u8 octets[0x40]; 2190290650Shselasky}; 2191290650Shselasky 2192290650Shselaskystruct mlx5_ifc_tisc_bits { 2193329204Shselasky u8 strict_lag_tx_port_affinity[0x1]; 2194329204Shselasky u8 reserved_at_1[0x3]; 2195329204Shselasky u8 lag_tx_port_affinity[0x04]; 2196329204Shselasky 2197329204Shselasky u8 reserved_at_8[0x4]; 2198290650Shselasky u8 prio[0x4]; 2199290650Shselasky u8 reserved_1[0x10]; 2200290650Shselasky 2201290650Shselasky u8 reserved_2[0x100]; 2202290650Shselasky 2203290650Shselasky u8 reserved_3[0x8]; 2204290650Shselasky u8 transport_domain[0x18]; 2205290650Shselasky 2206306233Shselasky u8 reserved_4[0x8]; 2207306233Shselasky u8 underlay_qpn[0x18]; 2208306233Shselasky 2209306233Shselasky u8 reserved_5[0x3a0]; 2210290650Shselasky}; 2211290650Shselasky 2212290650Shselaskyenum { 2213290650Shselasky MLX5_TIRC_DISP_TYPE_DIRECT = 0x0, 2214290650Shselasky MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1, 2215290650Shselasky}; 2216290650Shselasky 2217290650Shselaskyenum { 2218290650Shselasky MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1, 2219290650Shselasky MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2, 2220290650Shselasky}; 2221290650Shselasky 2222290650Shselaskyenum { 2223290650Shselasky MLX5_TIRC_RX_HASH_FN_HASH_NONE = 0x0, 2224290650Shselasky MLX5_TIRC_RX_HASH_FN_HASH_INVERTED_XOR8 = 0x1, 2225290650Shselasky MLX5_TIRC_RX_HASH_FN_HASH_TOEPLITZ = 0x2, 2226290650Shselasky}; 2227290650Shselasky 2228290650Shselaskyenum { 2229290650Shselasky MLX5_TIRC_SELF_LB_EN_ENABLE_UNICAST = 0x1, 2230290650Shselasky MLX5_TIRC_SELF_LB_EN_ENABLE_MULTICAST = 0x2, 2231290650Shselasky}; 2232290650Shselasky 2233290650Shselaskystruct mlx5_ifc_tirc_bits { 2234290650Shselasky u8 reserved_0[0x20]; 2235290650Shselasky 2236290650Shselasky u8 disp_type[0x4]; 2237290650Shselasky u8 reserved_1[0x1c]; 2238290650Shselasky 2239290650Shselasky u8 reserved_2[0x40]; 2240290650Shselasky 2241290650Shselasky u8 reserved_3[0x4]; 2242290650Shselasky u8 lro_timeout_period_usecs[0x10]; 2243290650Shselasky u8 lro_enable_mask[0x4]; 2244290650Shselasky u8 lro_max_msg_sz[0x8]; 2245290650Shselasky 2246290650Shselasky u8 reserved_4[0x40]; 2247290650Shselasky 2248290650Shselasky u8 reserved_5[0x8]; 2249290650Shselasky u8 inline_rqn[0x18]; 2250290650Shselasky 2251290650Shselasky u8 rx_hash_symmetric[0x1]; 2252290650Shselasky u8 reserved_6[0x1]; 2253290650Shselasky u8 tunneled_offload_en[0x1]; 2254290650Shselasky u8 reserved_7[0x5]; 2255290650Shselasky u8 indirect_table[0x18]; 2256290650Shselasky 2257290650Shselasky u8 rx_hash_fn[0x4]; 2258290650Shselasky u8 reserved_8[0x2]; 2259290650Shselasky u8 self_lb_en[0x2]; 2260290650Shselasky u8 transport_domain[0x18]; 2261290650Shselasky 2262290650Shselasky u8 rx_hash_toeplitz_key[10][0x20]; 2263290650Shselasky 2264290650Shselasky struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer; 2265290650Shselasky 2266290650Shselasky struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner; 2267290650Shselasky 2268290650Shselasky u8 reserved_9[0x4c0]; 2269290650Shselasky}; 2270290650Shselasky 2271290650Shselaskyenum { 2272290650Shselasky MLX5_SRQC_STATE_GOOD = 0x0, 2273290650Shselasky MLX5_SRQC_STATE_ERROR = 0x1, 2274290650Shselasky}; 2275290650Shselasky 2276290650Shselaskystruct mlx5_ifc_srqc_bits { 2277290650Shselasky u8 state[0x4]; 2278290650Shselasky u8 log_srq_size[0x4]; 2279290650Shselasky u8 reserved_0[0x18]; 2280290650Shselasky 2281290650Shselasky u8 wq_signature[0x1]; 2282290650Shselasky u8 cont_srq[0x1]; 2283290650Shselasky u8 reserved_1[0x1]; 2284290650Shselasky u8 rlky[0x1]; 2285290650Shselasky u8 reserved_2[0x1]; 2286290650Shselasky u8 log_rq_stride[0x3]; 2287290650Shselasky u8 xrcd[0x18]; 2288290650Shselasky 2289290650Shselasky u8 page_offset[0x6]; 2290290650Shselasky u8 reserved_3[0x2]; 2291290650Shselasky u8 cqn[0x18]; 2292290650Shselasky 2293290650Shselasky u8 reserved_4[0x20]; 2294290650Shselasky 2295290650Shselasky u8 reserved_5[0x2]; 2296290650Shselasky u8 log_page_size[0x6]; 2297290650Shselasky u8 reserved_6[0x18]; 2298290650Shselasky 2299290650Shselasky u8 reserved_7[0x20]; 2300290650Shselasky 2301290650Shselasky u8 reserved_8[0x8]; 2302290650Shselasky u8 pd[0x18]; 2303290650Shselasky 2304290650Shselasky u8 lwm[0x10]; 2305290650Shselasky u8 wqe_cnt[0x10]; 2306290650Shselasky 2307290650Shselasky u8 reserved_9[0x40]; 2308290650Shselasky 2309331807Shselasky u8 dbr_addr[0x40]; 2310290650Shselasky 2311331807Shselasky u8 reserved_10[0x80]; 2312290650Shselasky}; 2313290650Shselasky 2314290650Shselaskyenum { 2315290650Shselasky MLX5_SQC_STATE_RST = 0x0, 2316290650Shselasky MLX5_SQC_STATE_RDY = 0x1, 2317290650Shselasky MLX5_SQC_STATE_ERR = 0x3, 2318290650Shselasky}; 2319290650Shselasky 2320290650Shselaskystruct mlx5_ifc_sqc_bits { 2321308678Shselasky u8 rlkey[0x1]; 2322290650Shselasky u8 cd_master[0x1]; 2323290650Shselasky u8 fre[0x1]; 2324290650Shselasky u8 flush_in_error_en[0x1]; 2325290650Shselasky u8 allow_multi_pkt_send_wqe[0x1]; 2326290650Shselasky u8 min_wqe_inline_mode[0x3]; 2327290650Shselasky u8 state[0x4]; 2328308678Shselasky u8 reg_umr[0x1]; 2329308678Shselasky u8 allow_swp[0x1]; 2330308678Shselasky u8 reserved_0[0x12]; 2331290650Shselasky 2332290650Shselasky u8 reserved_1[0x8]; 2333290650Shselasky u8 user_index[0x18]; 2334290650Shselasky 2335290650Shselasky u8 reserved_2[0x8]; 2336290650Shselasky u8 cqn[0x18]; 2337290650Shselasky 2338308678Shselasky u8 reserved_3[0x80]; 2339308678Shselasky 2340308678Shselasky u8 qos_para_vport_number[0x10]; 2341306233Shselasky u8 packet_pacing_rate_limit_index[0x10]; 2342290650Shselasky 2343290650Shselasky u8 tis_lst_sz[0x10]; 2344290650Shselasky u8 reserved_4[0x10]; 2345290650Shselasky 2346290650Shselasky u8 reserved_5[0x40]; 2347290650Shselasky 2348290650Shselasky u8 reserved_6[0x8]; 2349290650Shselasky u8 tis_num_0[0x18]; 2350290650Shselasky 2351290650Shselasky struct mlx5_ifc_wq_bits wq; 2352290650Shselasky}; 2353290650Shselasky 2354308678Shselaskyenum { 2355308678Shselasky MLX5_TSAR_TYPE_DWRR = 0, 2356308678Shselasky MLX5_TSAR_TYPE_ROUND_ROUBIN = 1, 2357308678Shselasky MLX5_TSAR_TYPE_ETS = 2 2358308678Shselasky}; 2359308678Shselasky 2360308678Shselaskystruct mlx5_ifc_tsar_element_attributes_bits { 2361308678Shselasky u8 reserved_0[0x8]; 2362308678Shselasky u8 tsar_type[0x8]; 2363308678Shselasky u8 reserved_1[0x10]; 2364308678Shselasky}; 2365308678Shselasky 2366308678Shselaskystruct mlx5_ifc_vport_element_attributes_bits { 2367308678Shselasky u8 reserved_0[0x10]; 2368308678Shselasky u8 vport_number[0x10]; 2369308678Shselasky}; 2370308678Shselasky 2371308678Shselaskystruct mlx5_ifc_vport_tc_element_attributes_bits { 2372308678Shselasky u8 traffic_class[0x10]; 2373308678Shselasky u8 vport_number[0x10]; 2374308678Shselasky}; 2375308678Shselasky 2376308678Shselaskystruct mlx5_ifc_para_vport_tc_element_attributes_bits { 2377308678Shselasky u8 reserved_0[0x0C]; 2378308678Shselasky u8 traffic_class[0x04]; 2379308678Shselasky u8 qos_para_vport_number[0x10]; 2380308678Shselasky}; 2381308678Shselasky 2382308678Shselaskyenum { 2383308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0, 2384308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1, 2385308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2, 2386308678Shselasky MLX5_SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3, 2387308678Shselasky}; 2388308678Shselasky 2389308678Shselaskystruct mlx5_ifc_scheduling_context_bits { 2390308678Shselasky u8 element_type[0x8]; 2391308678Shselasky u8 reserved_at_8[0x18]; 2392308678Shselasky 2393308678Shselasky u8 element_attributes[0x20]; 2394308678Shselasky 2395308678Shselasky u8 parent_element_id[0x20]; 2396308678Shselasky 2397308678Shselasky u8 reserved_at_60[0x40]; 2398308678Shselasky 2399308678Shselasky u8 bw_share[0x20]; 2400308678Shselasky 2401308678Shselasky u8 max_average_bw[0x20]; 2402308678Shselasky 2403308678Shselasky u8 reserved_at_e0[0x120]; 2404308678Shselasky}; 2405308678Shselasky 2406290650Shselaskystruct mlx5_ifc_rqtc_bits { 2407290650Shselasky u8 reserved_0[0xa0]; 2408290650Shselasky 2409290650Shselasky u8 reserved_1[0x10]; 2410290650Shselasky u8 rqt_max_size[0x10]; 2411290650Shselasky 2412290650Shselasky u8 reserved_2[0x10]; 2413290650Shselasky u8 rqt_actual_size[0x10]; 2414290650Shselasky 2415290650Shselasky u8 reserved_3[0x6a0]; 2416290650Shselasky 2417290650Shselasky struct mlx5_ifc_rq_num_bits rq_num[0]; 2418290650Shselasky}; 2419290650Shselasky 2420290650Shselaskyenum { 2421290650Shselasky MLX5_RQC_RQ_TYPE_MEMORY_RQ_INLINE = 0x0, 2422290650Shselasky MLX5_RQC_RQ_TYPE_MEMORY_RQ_RMP = 0x1, 2423290650Shselasky}; 2424290650Shselasky 2425290650Shselaskyenum { 2426290650Shselasky MLX5_RQC_STATE_RST = 0x0, 2427290650Shselasky MLX5_RQC_STATE_RDY = 0x1, 2428290650Shselasky MLX5_RQC_STATE_ERR = 0x3, 2429290650Shselasky}; 2430290650Shselasky 2431321992Shselaskyenum { 2432321992Shselasky MLX5_RQC_DROPLESS_MODE_DISABLE = 0x0, 2433321992Shselasky MLX5_RQC_DROPLESS_MODE_ENABLE = 0x1, 2434321992Shselasky}; 2435321992Shselasky 2436290650Shselaskystruct mlx5_ifc_rqc_bits { 2437321992Shselasky u8 rlkey[0x1]; 2438321992Shselasky u8 delay_drop_en[0x1]; 2439321992Shselasky u8 scatter_fcs[0x1]; 2440290650Shselasky u8 vlan_strip_disable[0x1]; 2441290650Shselasky u8 mem_rq_type[0x4]; 2442290650Shselasky u8 state[0x4]; 2443290650Shselasky u8 reserved_1[0x1]; 2444290650Shselasky u8 flush_in_error_en[0x1]; 2445290650Shselasky u8 reserved_2[0x12]; 2446290650Shselasky 2447290650Shselasky u8 reserved_3[0x8]; 2448290650Shselasky u8 user_index[0x18]; 2449290650Shselasky 2450290650Shselasky u8 reserved_4[0x8]; 2451290650Shselasky u8 cqn[0x18]; 2452290650Shselasky 2453290650Shselasky u8 counter_set_id[0x8]; 2454290650Shselasky u8 reserved_5[0x18]; 2455290650Shselasky 2456290650Shselasky u8 reserved_6[0x8]; 2457290650Shselasky u8 rmpn[0x18]; 2458290650Shselasky 2459290650Shselasky u8 reserved_7[0xe0]; 2460290650Shselasky 2461290650Shselasky struct mlx5_ifc_wq_bits wq; 2462290650Shselasky}; 2463290650Shselasky 2464290650Shselaskyenum { 2465290650Shselasky MLX5_RMPC_STATE_RDY = 0x1, 2466290650Shselasky MLX5_RMPC_STATE_ERR = 0x3, 2467290650Shselasky}; 2468290650Shselasky 2469290650Shselaskystruct mlx5_ifc_rmpc_bits { 2470290650Shselasky u8 reserved_0[0x8]; 2471290650Shselasky u8 state[0x4]; 2472290650Shselasky u8 reserved_1[0x14]; 2473290650Shselasky 2474290650Shselasky u8 basic_cyclic_rcv_wqe[0x1]; 2475290650Shselasky u8 reserved_2[0x1f]; 2476290650Shselasky 2477290650Shselasky u8 reserved_3[0x140]; 2478290650Shselasky 2479290650Shselasky struct mlx5_ifc_wq_bits wq; 2480290650Shselasky}; 2481290650Shselasky 2482290650Shselaskyenum { 2483290650Shselasky MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_CURRENT_UC_MAC_ADDRESS = 0x0, 2484290650Shselasky MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_CURRENT_MC_MAC_ADDRESS = 0x1, 2485290650Shselasky MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_VLAN_LIST = 0x2, 2486290650Shselasky}; 2487290650Shselasky 2488290650Shselaskystruct mlx5_ifc_nic_vport_context_bits { 2489290650Shselasky u8 reserved_0[0x5]; 2490290650Shselasky u8 min_wqe_inline_mode[0x3]; 2491321992Shselasky u8 reserved_1[0x15]; 2492321992Shselasky u8 disable_mc_local_lb[0x1]; 2493321992Shselasky u8 disable_uc_local_lb[0x1]; 2494290650Shselasky u8 roce_en[0x1]; 2495290650Shselasky 2496290650Shselasky u8 arm_change_event[0x1]; 2497290650Shselasky u8 reserved_2[0x1a]; 2498290650Shselasky u8 event_on_mtu[0x1]; 2499290650Shselasky u8 event_on_promisc_change[0x1]; 2500290650Shselasky u8 event_on_vlan_change[0x1]; 2501290650Shselasky u8 event_on_mc_address_change[0x1]; 2502290650Shselasky u8 event_on_uc_address_change[0x1]; 2503290650Shselasky 2504290650Shselasky u8 reserved_3[0xe0]; 2505290650Shselasky 2506290650Shselasky u8 reserved_4[0x10]; 2507290650Shselasky u8 mtu[0x10]; 2508290650Shselasky 2509290650Shselasky u8 system_image_guid[0x40]; 2510290650Shselasky 2511290650Shselasky u8 port_guid[0x40]; 2512290650Shselasky 2513290650Shselasky u8 node_guid[0x40]; 2514290650Shselasky 2515290650Shselasky u8 reserved_5[0x140]; 2516290650Shselasky 2517290650Shselasky u8 qkey_violation_counter[0x10]; 2518290650Shselasky u8 reserved_6[0x10]; 2519290650Shselasky 2520290650Shselasky u8 reserved_7[0x420]; 2521290650Shselasky 2522290650Shselasky u8 promisc_uc[0x1]; 2523290650Shselasky u8 promisc_mc[0x1]; 2524290650Shselasky u8 promisc_all[0x1]; 2525290650Shselasky u8 reserved_8[0x2]; 2526290650Shselasky u8 allowed_list_type[0x3]; 2527290650Shselasky u8 reserved_9[0xc]; 2528290650Shselasky u8 allowed_list_size[0xc]; 2529290650Shselasky 2530290650Shselasky struct mlx5_ifc_mac_address_layout_bits permanent_address; 2531290650Shselasky 2532290650Shselasky u8 reserved_10[0x20]; 2533290650Shselasky 2534290650Shselasky u8 current_uc_mac_address[0][0x40]; 2535290650Shselasky}; 2536290650Shselasky 2537290650Shselaskyenum { 2538290650Shselasky MLX5_ACCESS_MODE_PA = 0x0, 2539290650Shselasky MLX5_ACCESS_MODE_MTT = 0x1, 2540290650Shselasky MLX5_ACCESS_MODE_KLM = 0x2, 2541290650Shselasky}; 2542290650Shselasky 2543290650Shselaskystruct mlx5_ifc_mkc_bits { 2544341940Shselasky u8 reserved_at_0[0x1]; 2545290650Shselasky u8 free[0x1]; 2546341940Shselasky u8 reserved_at_2[0x1]; 2547341940Shselasky u8 access_mode_4_2[0x3]; 2548341940Shselasky u8 reserved_at_6[0x7]; 2549341940Shselasky u8 relaxed_ordering_write[0x1]; 2550341940Shselasky u8 reserved_at_e[0x1]; 2551290650Shselasky u8 small_fence_on_rdma_read_response[0x1]; 2552290650Shselasky u8 umr_en[0x1]; 2553290650Shselasky u8 a[0x1]; 2554290650Shselasky u8 rw[0x1]; 2555290650Shselasky u8 rr[0x1]; 2556290650Shselasky u8 lw[0x1]; 2557290650Shselasky u8 lr[0x1]; 2558290650Shselasky u8 access_mode[0x2]; 2559290650Shselasky u8 reserved_2[0x8]; 2560290650Shselasky 2561290650Shselasky u8 qpn[0x18]; 2562290650Shselasky u8 mkey_7_0[0x8]; 2563290650Shselasky 2564290650Shselasky u8 reserved_3[0x20]; 2565290650Shselasky 2566290650Shselasky u8 length64[0x1]; 2567290650Shselasky u8 bsf_en[0x1]; 2568290650Shselasky u8 sync_umr[0x1]; 2569290650Shselasky u8 reserved_4[0x2]; 2570290650Shselasky u8 expected_sigerr_count[0x1]; 2571290650Shselasky u8 reserved_5[0x1]; 2572290650Shselasky u8 en_rinval[0x1]; 2573290650Shselasky u8 pd[0x18]; 2574290650Shselasky 2575290650Shselasky u8 start_addr[0x40]; 2576290650Shselasky 2577290650Shselasky u8 len[0x40]; 2578290650Shselasky 2579290650Shselasky u8 bsf_octword_size[0x20]; 2580290650Shselasky 2581290650Shselasky u8 reserved_6[0x80]; 2582290650Shselasky 2583290650Shselasky u8 translations_octword_size[0x20]; 2584290650Shselasky 2585290650Shselasky u8 reserved_7[0x1b]; 2586290650Shselasky u8 log_page_size[0x5]; 2587290650Shselasky 2588290650Shselasky u8 reserved_8[0x20]; 2589290650Shselasky}; 2590290650Shselasky 2591290650Shselaskystruct mlx5_ifc_pkey_bits { 2592290650Shselasky u8 reserved_0[0x10]; 2593290650Shselasky u8 pkey[0x10]; 2594290650Shselasky}; 2595290650Shselasky 2596290650Shselaskystruct mlx5_ifc_array128_auto_bits { 2597290650Shselasky u8 array128_auto[16][0x8]; 2598290650Shselasky}; 2599290650Shselasky 2600290650Shselaskyenum { 2601290650Shselasky MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_PORT_GUID = 0x0, 2602290650Shselasky MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_NODE_GUID = 0x1, 2603290650Shselasky MLX5_HCA_VPORT_CONTEXT_FIELD_SELECT_VPORT_STATE_POLICY = 0x2, 2604290650Shselasky}; 2605290650Shselasky 2606290650Shselaskyenum { 2607290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_SLEEP = 0x1, 2608290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_POLLING = 0x2, 2609290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_DISABLED = 0x3, 2610290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_PORTCONFIGURATIONTRAINING = 0x4, 2611290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_LINKUP = 0x5, 2612290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_LINKERRORRECOVERY = 0x6, 2613290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_PHYSICAL_STATE_PHYTEST = 0x7, 2614290650Shselasky}; 2615290650Shselasky 2616290650Shselaskyenum { 2617290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_DOWN = 0x0, 2618290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_UP = 0x1, 2619290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_POLICY_FOLLOW = 0x2, 2620290650Shselasky}; 2621290650Shselasky 2622290650Shselaskyenum { 2623290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_DOWN = 0x1, 2624290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_INIT = 0x2, 2625290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_ARM = 0x3, 2626290650Shselasky MLX5_HCA_VPORT_CONTEXT_PORT_STATE_ACTIVE = 0x4, 2627290650Shselasky}; 2628290650Shselasky 2629290650Shselaskyenum { 2630290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_DOWN = 0x1, 2631290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_INIT = 0x2, 2632290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_ARM = 0x3, 2633290650Shselasky MLX5_HCA_VPORT_CONTEXT_VPORT_STATE_ACTIVE = 0x4, 2634290650Shselasky}; 2635290650Shselasky 2636290650Shselaskystruct mlx5_ifc_hca_vport_context_bits { 2637290650Shselasky u8 field_select[0x20]; 2638290650Shselasky 2639290650Shselasky u8 reserved_0[0xe0]; 2640290650Shselasky 2641290650Shselasky u8 sm_virt_aware[0x1]; 2642290650Shselasky u8 has_smi[0x1]; 2643290650Shselasky u8 has_raw[0x1]; 2644290650Shselasky u8 grh_required[0x1]; 2645306233Shselasky u8 reserved_1[0x1]; 2646306233Shselasky u8 min_wqe_inline_mode[0x3]; 2647306233Shselasky u8 reserved_2[0x8]; 2648290650Shselasky u8 port_physical_state[0x4]; 2649290650Shselasky u8 vport_state_policy[0x4]; 2650290650Shselasky u8 port_state[0x4]; 2651290650Shselasky u8 vport_state[0x4]; 2652290650Shselasky 2653306233Shselasky u8 reserved_3[0x20]; 2654290650Shselasky 2655290650Shselasky u8 system_image_guid[0x40]; 2656290650Shselasky 2657290650Shselasky u8 port_guid[0x40]; 2658290650Shselasky 2659290650Shselasky u8 node_guid[0x40]; 2660290650Shselasky 2661290650Shselasky u8 cap_mask1[0x20]; 2662290650Shselasky 2663290650Shselasky u8 cap_mask1_field_select[0x20]; 2664290650Shselasky 2665290650Shselasky u8 cap_mask2[0x20]; 2666290650Shselasky 2667290650Shselasky u8 cap_mask2_field_select[0x20]; 2668290650Shselasky 2669306233Shselasky u8 reserved_4[0x80]; 2670290650Shselasky 2671290650Shselasky u8 lid[0x10]; 2672306233Shselasky u8 reserved_5[0x4]; 2673290650Shselasky u8 init_type_reply[0x4]; 2674290650Shselasky u8 lmc[0x3]; 2675290650Shselasky u8 subnet_timeout[0x5]; 2676290650Shselasky 2677290650Shselasky u8 sm_lid[0x10]; 2678290650Shselasky u8 sm_sl[0x4]; 2679306233Shselasky u8 reserved_6[0xc]; 2680290650Shselasky 2681290650Shselasky u8 qkey_violation_counter[0x10]; 2682290650Shselasky u8 pkey_violation_counter[0x10]; 2683290650Shselasky 2684306233Shselasky u8 reserved_7[0xca0]; 2685290650Shselasky}; 2686290650Shselasky 2687290650Shselaskyunion mlx5_ifc_hca_cap_union_bits { 2688290650Shselasky struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap; 2689290650Shselasky struct mlx5_ifc_odp_cap_bits odp_cap; 2690290650Shselasky struct mlx5_ifc_atomic_caps_bits atomic_caps; 2691290650Shselasky struct mlx5_ifc_roce_cap_bits roce_cap; 2692290650Shselasky struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps; 2693290650Shselasky struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap; 2694290650Shselasky struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap; 2695290650Shselasky struct mlx5_ifc_e_switch_cap_bits e_switch_cap; 2696306233Shselasky struct mlx5_ifc_snapshot_cap_bits snapshot_cap; 2697306233Shselasky struct mlx5_ifc_debug_cap_bits diagnostic_counters_cap; 2698306233Shselasky struct mlx5_ifc_qos_cap_bits qos_cap; 2699290650Shselasky u8 reserved_0[0x8000]; 2700290650Shselasky}; 2701290650Shselasky 2702329200Shselaskyenum { 2703329200Shselasky MLX5_FLOW_TABLE_CONTEXT_TABLE_MISS_ACTION_DEFAULT = 0x0, 2704329200Shselasky MLX5_FLOW_TABLE_CONTEXT_TABLE_MISS_ACTION_IDENTIFIED = 0x1, 2705329200Shselasky}; 2706329200Shselasky 2707329200Shselaskystruct mlx5_ifc_flow_table_context_bits { 2708329200Shselasky u8 encap_en[0x1]; 2709329200Shselasky u8 decap_en[0x1]; 2710329200Shselasky u8 reserved_at_2[0x2]; 2711329200Shselasky u8 table_miss_action[0x4]; 2712329200Shselasky u8 level[0x8]; 2713329200Shselasky u8 reserved_at_10[0x8]; 2714329200Shselasky u8 log_size[0x8]; 2715329200Shselasky 2716329200Shselasky u8 reserved_at_20[0x8]; 2717329200Shselasky u8 table_miss_id[0x18]; 2718329200Shselasky 2719329200Shselasky u8 reserved_at_40[0x8]; 2720329200Shselasky u8 lag_master_next_table_id[0x18]; 2721329200Shselasky 2722329200Shselasky u8 reserved_at_60[0xe0]; 2723329200Shselasky}; 2724329200Shselasky 2725290650Shselaskystruct mlx5_ifc_esw_vport_context_bits { 2726290650Shselasky u8 reserved_0[0x3]; 2727290650Shselasky u8 vport_svlan_strip[0x1]; 2728290650Shselasky u8 vport_cvlan_strip[0x1]; 2729290650Shselasky u8 vport_svlan_insert[0x1]; 2730290650Shselasky u8 vport_cvlan_insert[0x2]; 2731290650Shselasky u8 reserved_1[0x18]; 2732290650Shselasky 2733290650Shselasky u8 reserved_2[0x20]; 2734290650Shselasky 2735290650Shselasky u8 svlan_cfi[0x1]; 2736290650Shselasky u8 svlan_pcp[0x3]; 2737290650Shselasky u8 svlan_id[0xc]; 2738290650Shselasky u8 cvlan_cfi[0x1]; 2739290650Shselasky u8 cvlan_pcp[0x3]; 2740290650Shselasky u8 cvlan_id[0xc]; 2741290650Shselasky 2742290650Shselasky u8 reserved_3[0x7a0]; 2743290650Shselasky}; 2744290650Shselasky 2745290650Shselaskyenum { 2746290650Shselasky MLX5_EQC_STATUS_OK = 0x0, 2747290650Shselasky MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa, 2748290650Shselasky}; 2749290650Shselasky 2750290650Shselaskyenum { 2751290650Shselasky MLX5_EQ_STATE_ARMED = 0x9, 2752290650Shselasky MLX5_EQ_STATE_FIRED = 0xa, 2753290650Shselasky}; 2754290650Shselasky 2755290650Shselaskystruct mlx5_ifc_eqc_bits { 2756290650Shselasky u8 status[0x4]; 2757290650Shselasky u8 reserved_0[0x9]; 2758290650Shselasky u8 ec[0x1]; 2759290650Shselasky u8 oi[0x1]; 2760290650Shselasky u8 reserved_1[0x5]; 2761290650Shselasky u8 st[0x4]; 2762290650Shselasky u8 reserved_2[0x8]; 2763290650Shselasky 2764290650Shselasky u8 reserved_3[0x20]; 2765290650Shselasky 2766290650Shselasky u8 reserved_4[0x14]; 2767290650Shselasky u8 page_offset[0x6]; 2768290650Shselasky u8 reserved_5[0x6]; 2769290650Shselasky 2770290650Shselasky u8 reserved_6[0x3]; 2771290650Shselasky u8 log_eq_size[0x5]; 2772290650Shselasky u8 uar_page[0x18]; 2773290650Shselasky 2774290650Shselasky u8 reserved_7[0x20]; 2775290650Shselasky 2776290650Shselasky u8 reserved_8[0x18]; 2777290650Shselasky u8 intr[0x8]; 2778290650Shselasky 2779290650Shselasky u8 reserved_9[0x3]; 2780290650Shselasky u8 log_page_size[0x5]; 2781290650Shselasky u8 reserved_10[0x18]; 2782290650Shselasky 2783290650Shselasky u8 reserved_11[0x60]; 2784290650Shselasky 2785290650Shselasky u8 reserved_12[0x8]; 2786290650Shselasky u8 consumer_counter[0x18]; 2787290650Shselasky 2788290650Shselasky u8 reserved_13[0x8]; 2789290650Shselasky u8 producer_counter[0x18]; 2790290650Shselasky 2791290650Shselasky u8 reserved_14[0x80]; 2792290650Shselasky}; 2793290650Shselasky 2794290650Shselaskyenum { 2795290650Shselasky MLX5_DCTC_STATE_ACTIVE = 0x0, 2796290650Shselasky MLX5_DCTC_STATE_DRAINING = 0x1, 2797290650Shselasky MLX5_DCTC_STATE_DRAINED = 0x2, 2798290650Shselasky}; 2799290650Shselasky 2800290650Shselaskyenum { 2801290650Shselasky MLX5_DCTC_CS_RES_DISABLE = 0x0, 2802290650Shselasky MLX5_DCTC_CS_RES_NA = 0x1, 2803290650Shselasky MLX5_DCTC_CS_RES_UP_TO_64B = 0x2, 2804290650Shselasky}; 2805290650Shselasky 2806290650Shselaskyenum { 2807290650Shselasky MLX5_DCTC_MTU_256_BYTES = 0x1, 2808290650Shselasky MLX5_DCTC_MTU_512_BYTES = 0x2, 2809290650Shselasky MLX5_DCTC_MTU_1K_BYTES = 0x3, 2810290650Shselasky MLX5_DCTC_MTU_2K_BYTES = 0x4, 2811290650Shselasky MLX5_DCTC_MTU_4K_BYTES = 0x5, 2812290650Shselasky}; 2813290650Shselasky 2814290650Shselaskystruct mlx5_ifc_dctc_bits { 2815290650Shselasky u8 reserved_0[0x4]; 2816290650Shselasky u8 state[0x4]; 2817290650Shselasky u8 reserved_1[0x18]; 2818290650Shselasky 2819290650Shselasky u8 reserved_2[0x8]; 2820290650Shselasky u8 user_index[0x18]; 2821290650Shselasky 2822290650Shselasky u8 reserved_3[0x8]; 2823290650Shselasky u8 cqn[0x18]; 2824290650Shselasky 2825290650Shselasky u8 counter_set_id[0x8]; 2826290650Shselasky u8 atomic_mode[0x4]; 2827290650Shselasky u8 rre[0x1]; 2828290650Shselasky u8 rwe[0x1]; 2829290650Shselasky u8 rae[0x1]; 2830290650Shselasky u8 atomic_like_write_en[0x1]; 2831290650Shselasky u8 latency_sensitive[0x1]; 2832290650Shselasky u8 rlky[0x1]; 2833290650Shselasky u8 reserved_4[0xe]; 2834290650Shselasky 2835290650Shselasky u8 reserved_5[0x8]; 2836290650Shselasky u8 cs_res[0x8]; 2837290650Shselasky u8 reserved_6[0x3]; 2838290650Shselasky u8 min_rnr_nak[0x5]; 2839290650Shselasky u8 reserved_7[0x8]; 2840290650Shselasky 2841290650Shselasky u8 reserved_8[0x8]; 2842290650Shselasky u8 srqn[0x18]; 2843290650Shselasky 2844290650Shselasky u8 reserved_9[0x8]; 2845290650Shselasky u8 pd[0x18]; 2846290650Shselasky 2847290650Shselasky u8 tclass[0x8]; 2848290650Shselasky u8 reserved_10[0x4]; 2849290650Shselasky u8 flow_label[0x14]; 2850290650Shselasky 2851290650Shselasky u8 dc_access_key[0x40]; 2852290650Shselasky 2853290650Shselasky u8 reserved_11[0x5]; 2854290650Shselasky u8 mtu[0x3]; 2855290650Shselasky u8 port[0x8]; 2856290650Shselasky u8 pkey_index[0x10]; 2857290650Shselasky 2858290650Shselasky u8 reserved_12[0x8]; 2859290650Shselasky u8 my_addr_index[0x8]; 2860290650Shselasky u8 reserved_13[0x8]; 2861290650Shselasky u8 hop_limit[0x8]; 2862290650Shselasky 2863290650Shselasky u8 dc_access_key_violation_count[0x20]; 2864290650Shselasky 2865290650Shselasky u8 reserved_14[0x14]; 2866290650Shselasky u8 dei_cfi[0x1]; 2867290650Shselasky u8 eth_prio[0x3]; 2868290650Shselasky u8 ecn[0x2]; 2869290650Shselasky u8 dscp[0x6]; 2870290650Shselasky 2871290650Shselasky u8 reserved_15[0x40]; 2872290650Shselasky}; 2873290650Shselasky 2874290650Shselaskyenum { 2875290650Shselasky MLX5_CQC_STATUS_OK = 0x0, 2876290650Shselasky MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9, 2877290650Shselasky MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa, 2878290650Shselasky}; 2879290650Shselasky 2880290650Shselaskyenum { 2881290650Shselasky CQE_SIZE_64 = 0x0, 2882290650Shselasky CQE_SIZE_128 = 0x1, 2883290650Shselasky}; 2884290650Shselasky 2885290650Shselaskyenum { 2886290650Shselasky MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0, 2887290650Shselasky MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1, 2888290650Shselasky}; 2889290650Shselasky 2890290650Shselaskyenum { 2891290650Shselasky MLX5_CQ_STATE_SOLICITED_ARMED = 0x6, 2892290650Shselasky MLX5_CQ_STATE_ARMED = 0x9, 2893290650Shselasky MLX5_CQ_STATE_FIRED = 0xa, 2894290650Shselasky}; 2895290650Shselasky 2896290650Shselaskystruct mlx5_ifc_cqc_bits { 2897290650Shselasky u8 status[0x4]; 2898290650Shselasky u8 reserved_0[0x4]; 2899290650Shselasky u8 cqe_sz[0x3]; 2900290650Shselasky u8 cc[0x1]; 2901290650Shselasky u8 reserved_1[0x1]; 2902290650Shselasky u8 scqe_break_moderation_en[0x1]; 2903290650Shselasky u8 oi[0x1]; 2904290650Shselasky u8 cq_period_mode[0x2]; 2905290650Shselasky u8 cqe_compression_en[0x1]; 2906290650Shselasky u8 mini_cqe_res_format[0x2]; 2907290650Shselasky u8 st[0x4]; 2908290650Shselasky u8 reserved_2[0x8]; 2909290650Shselasky 2910290650Shselasky u8 reserved_3[0x20]; 2911290650Shselasky 2912290650Shselasky u8 reserved_4[0x14]; 2913290650Shselasky u8 page_offset[0x6]; 2914290650Shselasky u8 reserved_5[0x6]; 2915290650Shselasky 2916290650Shselasky u8 reserved_6[0x3]; 2917290650Shselasky u8 log_cq_size[0x5]; 2918290650Shselasky u8 uar_page[0x18]; 2919290650Shselasky 2920290650Shselasky u8 reserved_7[0x4]; 2921290650Shselasky u8 cq_period[0xc]; 2922290650Shselasky u8 cq_max_count[0x10]; 2923290650Shselasky 2924290650Shselasky u8 reserved_8[0x18]; 2925290650Shselasky u8 c_eqn[0x8]; 2926290650Shselasky 2927290650Shselasky u8 reserved_9[0x3]; 2928290650Shselasky u8 log_page_size[0x5]; 2929290650Shselasky u8 reserved_10[0x18]; 2930290650Shselasky 2931290650Shselasky u8 reserved_11[0x20]; 2932290650Shselasky 2933290650Shselasky u8 reserved_12[0x8]; 2934290650Shselasky u8 last_notified_index[0x18]; 2935290650Shselasky 2936290650Shselasky u8 reserved_13[0x8]; 2937290650Shselasky u8 last_solicit_index[0x18]; 2938290650Shselasky 2939290650Shselasky u8 reserved_14[0x8]; 2940290650Shselasky u8 consumer_counter[0x18]; 2941290650Shselasky 2942290650Shselasky u8 reserved_15[0x8]; 2943290650Shselasky u8 producer_counter[0x18]; 2944290650Shselasky 2945290650Shselasky u8 reserved_16[0x40]; 2946290650Shselasky 2947290650Shselasky u8 dbr_addr[0x40]; 2948290650Shselasky}; 2949290650Shselasky 2950290650Shselaskyunion mlx5_ifc_cong_control_roce_ecn_auto_bits { 2951290650Shselasky struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp; 2952290650Shselasky struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp; 2953290650Shselasky struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np; 2954290650Shselasky u8 reserved_0[0x800]; 2955290650Shselasky}; 2956290650Shselasky 2957290650Shselaskystruct mlx5_ifc_query_adapter_param_block_bits { 2958290650Shselasky u8 reserved_0[0xc0]; 2959290650Shselasky 2960290650Shselasky u8 reserved_1[0x8]; 2961290650Shselasky u8 ieee_vendor_id[0x18]; 2962290650Shselasky 2963290650Shselasky u8 reserved_2[0x10]; 2964290650Shselasky u8 vsd_vendor_id[0x10]; 2965290650Shselasky 2966290650Shselasky u8 vsd[208][0x8]; 2967290650Shselasky 2968290650Shselasky u8 vsd_contd_psid[16][0x8]; 2969290650Shselasky}; 2970290650Shselasky 2971290650Shselaskyunion mlx5_ifc_modify_field_select_resize_field_select_auto_bits { 2972290650Shselasky struct mlx5_ifc_modify_field_select_bits modify_field_select; 2973290650Shselasky struct mlx5_ifc_resize_field_select_bits resize_field_select; 2974290650Shselasky u8 reserved_0[0x20]; 2975290650Shselasky}; 2976290650Shselasky 2977290650Shselaskyunion mlx5_ifc_field_select_802_1_r_roce_auto_bits { 2978290650Shselasky struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp; 2979290650Shselasky struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp; 2980290650Shselasky struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np; 2981290650Shselasky u8 reserved_0[0x20]; 2982290650Shselasky}; 2983290650Shselasky 2984290650Shselaskystruct mlx5_ifc_bufferx_reg_bits { 2985290650Shselasky u8 reserved_0[0x6]; 2986290650Shselasky u8 lossy[0x1]; 2987290650Shselasky u8 epsb[0x1]; 2988290650Shselasky u8 reserved_1[0xc]; 2989290650Shselasky u8 size[0xc]; 2990290650Shselasky 2991290650Shselasky u8 xoff_threshold[0x10]; 2992290650Shselasky u8 xon_threshold[0x10]; 2993290650Shselasky}; 2994290650Shselasky 2995290650Shselaskystruct mlx5_ifc_config_item_bits { 2996290650Shselasky u8 valid[0x2]; 2997290650Shselasky u8 reserved_0[0x2]; 2998290650Shselasky u8 header_type[0x2]; 2999290650Shselasky u8 reserved_1[0x2]; 3000290650Shselasky u8 default_location[0x1]; 3001290650Shselasky u8 reserved_2[0x7]; 3002290650Shselasky u8 version[0x4]; 3003290650Shselasky u8 reserved_3[0x3]; 3004290650Shselasky u8 length[0x9]; 3005290650Shselasky 3006290650Shselasky u8 type[0x20]; 3007290650Shselasky 3008290650Shselasky u8 reserved_4[0x10]; 3009290650Shselasky u8 crc16[0x10]; 3010290650Shselasky}; 3011290650Shselasky 3012290650Shselaskystruct mlx5_ifc_nodnic_port_config_reg_bits { 3013290650Shselasky struct mlx5_ifc_nodnic_event_word_bits event; 3014290650Shselasky 3015290650Shselasky u8 network_en[0x1]; 3016290650Shselasky u8 dma_en[0x1]; 3017290650Shselasky u8 promisc_en[0x1]; 3018290650Shselasky u8 promisc_multicast_en[0x1]; 3019290650Shselasky u8 reserved_0[0x17]; 3020290650Shselasky u8 receive_filter_en[0x5]; 3021290650Shselasky 3022290650Shselasky u8 reserved_1[0x10]; 3023290650Shselasky u8 mac_47_32[0x10]; 3024290650Shselasky 3025290650Shselasky u8 mac_31_0[0x20]; 3026290650Shselasky 3027290650Shselasky u8 receive_filters_mgid_mac[64][0x8]; 3028290650Shselasky 3029290650Shselasky u8 gid[16][0x8]; 3030290650Shselasky 3031290650Shselasky u8 reserved_2[0x10]; 3032290650Shselasky u8 lid[0x10]; 3033290650Shselasky 3034290650Shselasky u8 reserved_3[0xc]; 3035290650Shselasky u8 sm_sl[0x4]; 3036290650Shselasky u8 sm_lid[0x10]; 3037290650Shselasky 3038290650Shselasky u8 completion_address_63_32[0x20]; 3039290650Shselasky 3040290650Shselasky u8 completion_address_31_12[0x14]; 3041290650Shselasky u8 reserved_4[0x6]; 3042290650Shselasky u8 log_cq_size[0x6]; 3043290650Shselasky 3044290650Shselasky u8 working_buffer_address_63_32[0x20]; 3045290650Shselasky 3046290650Shselasky u8 working_buffer_address_31_12[0x14]; 3047290650Shselasky u8 reserved_5[0xc]; 3048290650Shselasky 3049290650Shselasky struct mlx5_ifc_nodnic_cq_arming_word_bits arm_cq; 3050290650Shselasky 3051290650Shselasky u8 pkey_index[0x10]; 3052290650Shselasky u8 pkey[0x10]; 3053290650Shselasky 3054290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits send_ring0; 3055290650Shselasky 3056290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits send_ring1; 3057290650Shselasky 3058290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits receive_ring0; 3059290650Shselasky 3060290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits receive_ring1; 3061290650Shselasky 3062290650Shselasky u8 reserved_6[0x400]; 3063290650Shselasky}; 3064290650Shselasky 3065290650Shselaskyunion mlx5_ifc_event_auto_bits { 3066290650Shselasky struct mlx5_ifc_comp_event_bits comp_event; 3067290650Shselasky struct mlx5_ifc_dct_events_bits dct_events; 3068290650Shselasky struct mlx5_ifc_qp_events_bits qp_events; 3069290650Shselasky struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event; 3070290650Shselasky struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event; 3071290650Shselasky struct mlx5_ifc_cq_error_bits cq_error; 3072290650Shselasky struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged; 3073290650Shselasky struct mlx5_ifc_port_state_change_event_bits port_state_change_event; 3074290650Shselasky struct mlx5_ifc_gpio_event_bits gpio_event; 3075290650Shselasky struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event; 3076290650Shselasky struct mlx5_ifc_stall_vl_event_bits stall_vl_event; 3077290650Shselasky struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event; 3078290650Shselasky struct mlx5_ifc_pages_req_event_bits pages_req_event; 3079290650Shselasky struct mlx5_ifc_nic_vport_change_event_bits nic_vport_change_event; 3080290650Shselasky u8 reserved_0[0xe0]; 3081290650Shselasky}; 3082290650Shselasky 3083290650Shselaskystruct mlx5_ifc_health_buffer_bits { 3084290650Shselasky u8 reserved_0[0x100]; 3085290650Shselasky 3086290650Shselasky u8 assert_existptr[0x20]; 3087290650Shselasky 3088290650Shselasky u8 assert_callra[0x20]; 3089290650Shselasky 3090290650Shselasky u8 reserved_1[0x40]; 3091290650Shselasky 3092290650Shselasky u8 fw_version[0x20]; 3093290650Shselasky 3094290650Shselasky u8 hw_id[0x20]; 3095290650Shselasky 3096290650Shselasky u8 reserved_2[0x20]; 3097290650Shselasky 3098290650Shselasky u8 irisc_index[0x8]; 3099290650Shselasky u8 synd[0x8]; 3100290650Shselasky u8 ext_synd[0x10]; 3101290650Shselasky}; 3102290650Shselasky 3103290650Shselaskystruct mlx5_ifc_register_loopback_control_bits { 3104290650Shselasky u8 no_lb[0x1]; 3105290650Shselasky u8 reserved_0[0x7]; 3106290650Shselasky u8 port[0x8]; 3107290650Shselasky u8 reserved_1[0x10]; 3108290650Shselasky 3109290650Shselasky u8 reserved_2[0x60]; 3110290650Shselasky}; 3111290650Shselasky 3112306233Shselaskystruct mlx5_ifc_lrh_bits { 3113306233Shselasky u8 vl[4]; 3114306233Shselasky u8 lver[4]; 3115306233Shselasky u8 sl[4]; 3116306233Shselasky u8 reserved2[2]; 3117306233Shselasky u8 lnh[2]; 3118306233Shselasky u8 dlid[16]; 3119306233Shselasky u8 reserved5[5]; 3120306233Shselasky u8 pkt_len[11]; 3121306233Shselasky u8 slid[16]; 3122306233Shselasky}; 3123306233Shselasky 3124290650Shselaskystruct mlx5_ifc_icmd_set_wol_rol_out_bits { 3125290650Shselasky u8 reserved_0[0x40]; 3126290650Shselasky 3127290650Shselasky u8 reserved_1[0x10]; 3128290650Shselasky u8 rol_mode[0x8]; 3129290650Shselasky u8 wol_mode[0x8]; 3130290650Shselasky}; 3131290650Shselasky 3132290650Shselaskystruct mlx5_ifc_icmd_set_wol_rol_in_bits { 3133290650Shselasky u8 reserved_0[0x40]; 3134290650Shselasky 3135290650Shselasky u8 rol_mode_valid[0x1]; 3136290650Shselasky u8 wol_mode_valid[0x1]; 3137290650Shselasky u8 reserved_1[0xe]; 3138290650Shselasky u8 rol_mode[0x8]; 3139290650Shselasky u8 wol_mode[0x8]; 3140290650Shselasky 3141290650Shselasky u8 reserved_2[0x7a0]; 3142290650Shselasky}; 3143290650Shselasky 3144290650Shselaskystruct mlx5_ifc_icmd_set_virtual_mac_in_bits { 3145290650Shselasky u8 virtual_mac_en[0x1]; 3146290650Shselasky u8 mac_aux_v[0x1]; 3147290650Shselasky u8 reserved_0[0x1e]; 3148290650Shselasky 3149290650Shselasky u8 reserved_1[0x40]; 3150290650Shselasky 3151290650Shselasky struct mlx5_ifc_mac_address_layout_bits virtual_mac; 3152290650Shselasky 3153290650Shselasky u8 reserved_2[0x760]; 3154290650Shselasky}; 3155290650Shselasky 3156290650Shselaskystruct mlx5_ifc_icmd_query_virtual_mac_out_bits { 3157290650Shselasky u8 virtual_mac_en[0x1]; 3158290650Shselasky u8 mac_aux_v[0x1]; 3159290650Shselasky u8 reserved_0[0x1e]; 3160290650Shselasky 3161290650Shselasky struct mlx5_ifc_mac_address_layout_bits permanent_mac; 3162290650Shselasky 3163290650Shselasky struct mlx5_ifc_mac_address_layout_bits virtual_mac; 3164290650Shselasky 3165290650Shselasky u8 reserved_1[0x760]; 3166290650Shselasky}; 3167290650Shselasky 3168290650Shselaskystruct mlx5_ifc_icmd_query_fw_info_out_bits { 3169290650Shselasky struct mlx5_ifc_fw_version_bits fw_version; 3170290650Shselasky 3171290650Shselasky u8 reserved_0[0x10]; 3172290650Shselasky u8 hash_signature[0x10]; 3173290650Shselasky 3174290650Shselasky u8 psid[16][0x8]; 3175290650Shselasky 3176290650Shselasky u8 reserved_1[0x6e0]; 3177290650Shselasky}; 3178290650Shselasky 3179290650Shselaskystruct mlx5_ifc_icmd_query_cap_in_bits { 3180290650Shselasky u8 reserved_0[0x10]; 3181290650Shselasky u8 capability_group[0x10]; 3182290650Shselasky}; 3183290650Shselasky 3184290650Shselaskystruct mlx5_ifc_icmd_query_cap_general_bits { 3185290650Shselasky u8 nv_access[0x1]; 3186290650Shselasky u8 fw_info_psid[0x1]; 3187290650Shselasky u8 reserved_0[0x1e]; 3188290650Shselasky 3189290650Shselasky u8 reserved_1[0x16]; 3190290650Shselasky u8 rol_s[0x1]; 3191290650Shselasky u8 rol_g[0x1]; 3192290650Shselasky u8 reserved_2[0x1]; 3193290650Shselasky u8 wol_s[0x1]; 3194290650Shselasky u8 wol_g[0x1]; 3195290650Shselasky u8 wol_a[0x1]; 3196290650Shselasky u8 wol_b[0x1]; 3197290650Shselasky u8 wol_m[0x1]; 3198290650Shselasky u8 wol_u[0x1]; 3199290650Shselasky u8 wol_p[0x1]; 3200290650Shselasky}; 3201290650Shselasky 3202290650Shselaskystruct mlx5_ifc_icmd_ocbb_query_header_stats_out_bits { 3203290650Shselasky u8 status[0x8]; 3204290650Shselasky u8 reserved_0[0x18]; 3205290650Shselasky 3206290650Shselasky u8 reserved_1[0x7e0]; 3207290650Shselasky}; 3208290650Shselasky 3209290650Shselaskystruct mlx5_ifc_icmd_ocbb_query_etoc_stats_out_bits { 3210290650Shselasky u8 status[0x8]; 3211290650Shselasky u8 reserved_0[0x18]; 3212290650Shselasky 3213290650Shselasky u8 reserved_1[0x7e0]; 3214290650Shselasky}; 3215290650Shselasky 3216290650Shselaskystruct mlx5_ifc_icmd_ocbb_init_in_bits { 3217290650Shselasky u8 address_hi[0x20]; 3218290650Shselasky 3219290650Shselasky u8 address_lo[0x20]; 3220290650Shselasky 3221290650Shselasky u8 reserved_0[0x7c0]; 3222290650Shselasky}; 3223290650Shselasky 3224290650Shselaskystruct mlx5_ifc_icmd_init_ocsd_in_bits { 3225290650Shselasky u8 reserved_0[0x20]; 3226290650Shselasky 3227290650Shselasky u8 address_hi[0x20]; 3228290650Shselasky 3229290650Shselasky u8 address_lo[0x20]; 3230290650Shselasky 3231290650Shselasky u8 reserved_1[0x7a0]; 3232290650Shselasky}; 3233290650Shselasky 3234290650Shselaskystruct mlx5_ifc_icmd_access_reg_out_bits { 3235290650Shselasky u8 reserved_0[0x11]; 3236290650Shselasky u8 status[0x7]; 3237290650Shselasky u8 reserved_1[0x8]; 3238290650Shselasky 3239290650Shselasky u8 register_id[0x10]; 3240290650Shselasky u8 reserved_2[0x10]; 3241290650Shselasky 3242290650Shselasky u8 reserved_3[0x40]; 3243290650Shselasky 3244290650Shselasky u8 reserved_4[0x5]; 3245290650Shselasky u8 len[0xb]; 3246290650Shselasky u8 reserved_5[0x10]; 3247290650Shselasky 3248290650Shselasky u8 register_data[0][0x20]; 3249290650Shselasky}; 3250290650Shselasky 3251290650Shselaskyenum { 3252290650Shselasky MLX5_ICMD_ACCESS_REG_IN_METHOD_QUERY = 0x1, 3253290650Shselasky MLX5_ICMD_ACCESS_REG_IN_METHOD_WRITE = 0x2, 3254290650Shselasky}; 3255290650Shselasky 3256290650Shselaskystruct mlx5_ifc_icmd_access_reg_in_bits { 3257290650Shselasky u8 constant_1[0x5]; 3258290650Shselasky u8 constant_2[0xb]; 3259290650Shselasky u8 reserved_0[0x10]; 3260290650Shselasky 3261290650Shselasky u8 register_id[0x10]; 3262290650Shselasky u8 reserved_1[0x1]; 3263290650Shselasky u8 method[0x7]; 3264290650Shselasky u8 constant_3[0x8]; 3265290650Shselasky 3266290650Shselasky u8 reserved_2[0x40]; 3267290650Shselasky 3268290650Shselasky u8 constant_4[0x5]; 3269290650Shselasky u8 len[0xb]; 3270290650Shselasky u8 reserved_3[0x10]; 3271290650Shselasky 3272290650Shselasky u8 register_data[0][0x20]; 3273290650Shselasky}; 3274290650Shselasky 3275331810Shselaskyenum { 3276331810Shselasky MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0, 3277331810Shselasky MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1, 3278331810Shselasky}; 3279331810Shselasky 3280290650Shselaskystruct mlx5_ifc_teardown_hca_out_bits { 3281290650Shselasky u8 status[0x8]; 3282290650Shselasky u8 reserved_0[0x18]; 3283290650Shselasky 3284290650Shselasky u8 syndrome[0x20]; 3285290650Shselasky 3286331810Shselasky u8 reserved_1[0x3f]; 3287331810Shselasky 3288347818Shselasky u8 state[0x1]; 3289290650Shselasky}; 3290290650Shselasky 3291290650Shselaskyenum { 3292290650Shselasky MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0, 3293331810Shselasky MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1, 3294347818Shselasky MLX5_TEARDOWN_HCA_IN_PROFILE_PREPARE_FAST_TEARDOWN = 0x2, 3295290650Shselasky}; 3296290650Shselasky 3297290650Shselaskystruct mlx5_ifc_teardown_hca_in_bits { 3298290650Shselasky u8 opcode[0x10]; 3299290650Shselasky u8 reserved_0[0x10]; 3300290650Shselasky 3301290650Shselasky u8 reserved_1[0x10]; 3302290650Shselasky u8 op_mod[0x10]; 3303290650Shselasky 3304290650Shselasky u8 reserved_2[0x10]; 3305290650Shselasky u8 profile[0x10]; 3306290650Shselasky 3307290650Shselasky u8 reserved_3[0x20]; 3308290650Shselasky}; 3309290650Shselasky 3310321992Shselaskystruct mlx5_ifc_set_delay_drop_params_out_bits { 3311321992Shselasky u8 status[0x8]; 3312321992Shselasky u8 reserved_at_8[0x18]; 3313321992Shselasky 3314321992Shselasky u8 syndrome[0x20]; 3315321992Shselasky 3316321992Shselasky u8 reserved_at_40[0x40]; 3317321992Shselasky}; 3318321992Shselasky 3319321992Shselaskystruct mlx5_ifc_set_delay_drop_params_in_bits { 3320321992Shselasky u8 opcode[0x10]; 3321321992Shselasky u8 reserved_at_10[0x10]; 3322321992Shselasky 3323321992Shselasky u8 reserved_at_20[0x10]; 3324321992Shselasky u8 op_mod[0x10]; 3325321992Shselasky 3326321992Shselasky u8 reserved_at_40[0x20]; 3327321992Shselasky 3328321992Shselasky u8 reserved_at_60[0x10]; 3329321992Shselasky u8 delay_drop_timeout[0x10]; 3330321992Shselasky}; 3331321992Shselasky 3332321992Shselaskystruct mlx5_ifc_query_delay_drop_params_out_bits { 3333321992Shselasky u8 status[0x8]; 3334321992Shselasky u8 reserved_at_8[0x18]; 3335321992Shselasky 3336321992Shselasky u8 syndrome[0x20]; 3337321992Shselasky 3338321992Shselasky u8 reserved_at_40[0x20]; 3339321992Shselasky 3340321992Shselasky u8 reserved_at_60[0x10]; 3341321992Shselasky u8 delay_drop_timeout[0x10]; 3342321992Shselasky}; 3343321992Shselasky 3344321992Shselaskystruct mlx5_ifc_query_delay_drop_params_in_bits { 3345321992Shselasky u8 opcode[0x10]; 3346321992Shselasky u8 reserved_at_10[0x10]; 3347321992Shselasky 3348321992Shselasky u8 reserved_at_20[0x10]; 3349321992Shselasky u8 op_mod[0x10]; 3350321992Shselasky 3351321992Shselasky u8 reserved_at_40[0x40]; 3352321992Shselasky}; 3353321992Shselasky 3354290650Shselaskystruct mlx5_ifc_suspend_qp_out_bits { 3355290650Shselasky u8 status[0x8]; 3356290650Shselasky u8 reserved_0[0x18]; 3357290650Shselasky 3358290650Shselasky u8 syndrome[0x20]; 3359290650Shselasky 3360290650Shselasky u8 reserved_1[0x40]; 3361290650Shselasky}; 3362290650Shselasky 3363290650Shselaskystruct mlx5_ifc_suspend_qp_in_bits { 3364290650Shselasky u8 opcode[0x10]; 3365290650Shselasky u8 reserved_0[0x10]; 3366290650Shselasky 3367290650Shselasky u8 reserved_1[0x10]; 3368290650Shselasky u8 op_mod[0x10]; 3369290650Shselasky 3370290650Shselasky u8 reserved_2[0x8]; 3371290650Shselasky u8 qpn[0x18]; 3372290650Shselasky 3373290650Shselasky u8 reserved_3[0x20]; 3374290650Shselasky}; 3375290650Shselasky 3376290650Shselaskystruct mlx5_ifc_sqerr2rts_qp_out_bits { 3377290650Shselasky u8 status[0x8]; 3378290650Shselasky u8 reserved_0[0x18]; 3379290650Shselasky 3380290650Shselasky u8 syndrome[0x20]; 3381290650Shselasky 3382290650Shselasky u8 reserved_1[0x40]; 3383290650Shselasky}; 3384290650Shselasky 3385290650Shselaskystruct mlx5_ifc_sqerr2rts_qp_in_bits { 3386290650Shselasky u8 opcode[0x10]; 3387290650Shselasky u8 reserved_0[0x10]; 3388290650Shselasky 3389290650Shselasky u8 reserved_1[0x10]; 3390290650Shselasky u8 op_mod[0x10]; 3391290650Shselasky 3392290650Shselasky u8 reserved_2[0x8]; 3393290650Shselasky u8 qpn[0x18]; 3394290650Shselasky 3395290650Shselasky u8 reserved_3[0x20]; 3396290650Shselasky 3397290650Shselasky u8 opt_param_mask[0x20]; 3398290650Shselasky 3399290650Shselasky u8 reserved_4[0x20]; 3400290650Shselasky 3401290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3402290650Shselasky 3403290650Shselasky u8 reserved_5[0x80]; 3404290650Shselasky}; 3405290650Shselasky 3406290650Shselaskystruct mlx5_ifc_sqd2rts_qp_out_bits { 3407290650Shselasky u8 status[0x8]; 3408290650Shselasky u8 reserved_0[0x18]; 3409290650Shselasky 3410290650Shselasky u8 syndrome[0x20]; 3411290650Shselasky 3412290650Shselasky u8 reserved_1[0x40]; 3413290650Shselasky}; 3414290650Shselasky 3415290650Shselaskystruct mlx5_ifc_sqd2rts_qp_in_bits { 3416290650Shselasky u8 opcode[0x10]; 3417290650Shselasky u8 reserved_0[0x10]; 3418290650Shselasky 3419290650Shselasky u8 reserved_1[0x10]; 3420290650Shselasky u8 op_mod[0x10]; 3421290650Shselasky 3422290650Shselasky u8 reserved_2[0x8]; 3423290650Shselasky u8 qpn[0x18]; 3424290650Shselasky 3425290650Shselasky u8 reserved_3[0x20]; 3426290650Shselasky 3427290650Shselasky u8 opt_param_mask[0x20]; 3428290650Shselasky 3429290650Shselasky u8 reserved_4[0x20]; 3430290650Shselasky 3431290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3432290650Shselasky 3433290650Shselasky u8 reserved_5[0x80]; 3434290650Shselasky}; 3435290650Shselasky 3436290650Shselaskystruct mlx5_ifc_set_wol_rol_out_bits { 3437290650Shselasky u8 status[0x8]; 3438290650Shselasky u8 reserved_0[0x18]; 3439290650Shselasky 3440290650Shselasky u8 syndrome[0x20]; 3441290650Shselasky 3442290650Shselasky u8 reserved_1[0x40]; 3443290650Shselasky}; 3444290650Shselasky 3445290650Shselaskystruct mlx5_ifc_set_wol_rol_in_bits { 3446290650Shselasky u8 opcode[0x10]; 3447290650Shselasky u8 reserved_0[0x10]; 3448290650Shselasky 3449290650Shselasky u8 reserved_1[0x10]; 3450290650Shselasky u8 op_mod[0x10]; 3451290650Shselasky 3452290650Shselasky u8 rol_mode_valid[0x1]; 3453290650Shselasky u8 wol_mode_valid[0x1]; 3454290650Shselasky u8 reserved_2[0xe]; 3455290650Shselasky u8 rol_mode[0x8]; 3456290650Shselasky u8 wol_mode[0x8]; 3457290650Shselasky 3458290650Shselasky u8 reserved_3[0x20]; 3459290650Shselasky}; 3460290650Shselasky 3461290650Shselaskystruct mlx5_ifc_set_roce_address_out_bits { 3462290650Shselasky u8 status[0x8]; 3463290650Shselasky u8 reserved_0[0x18]; 3464290650Shselasky 3465290650Shselasky u8 syndrome[0x20]; 3466290650Shselasky 3467290650Shselasky u8 reserved_1[0x40]; 3468290650Shselasky}; 3469290650Shselasky 3470290650Shselaskystruct mlx5_ifc_set_roce_address_in_bits { 3471290650Shselasky u8 opcode[0x10]; 3472290650Shselasky u8 reserved_0[0x10]; 3473290650Shselasky 3474290650Shselasky u8 reserved_1[0x10]; 3475290650Shselasky u8 op_mod[0x10]; 3476290650Shselasky 3477290650Shselasky u8 roce_address_index[0x10]; 3478290650Shselasky u8 reserved_2[0x10]; 3479290650Shselasky 3480290650Shselasky u8 reserved_3[0x20]; 3481290650Shselasky 3482290650Shselasky struct mlx5_ifc_roce_addr_layout_bits roce_address; 3483290650Shselasky}; 3484290650Shselasky 3485290650Shselaskystruct mlx5_ifc_set_rdb_out_bits { 3486290650Shselasky u8 status[0x8]; 3487290650Shselasky u8 reserved_0[0x18]; 3488290650Shselasky 3489290650Shselasky u8 syndrome[0x20]; 3490290650Shselasky 3491290650Shselasky u8 reserved_1[0x40]; 3492290650Shselasky}; 3493290650Shselasky 3494290650Shselaskystruct mlx5_ifc_set_rdb_in_bits { 3495290650Shselasky u8 opcode[0x10]; 3496290650Shselasky u8 reserved_0[0x10]; 3497290650Shselasky 3498290650Shselasky u8 reserved_1[0x10]; 3499290650Shselasky u8 op_mod[0x10]; 3500290650Shselasky 3501290650Shselasky u8 reserved_2[0x8]; 3502290650Shselasky u8 qpn[0x18]; 3503290650Shselasky 3504290650Shselasky u8 reserved_3[0x18]; 3505290650Shselasky u8 rdb_list_size[0x8]; 3506290650Shselasky 3507290650Shselasky struct mlx5_ifc_rdbc_bits rdb_context[0]; 3508290650Shselasky}; 3509290650Shselasky 3510290650Shselaskystruct mlx5_ifc_set_mad_demux_out_bits { 3511290650Shselasky u8 status[0x8]; 3512290650Shselasky u8 reserved_0[0x18]; 3513290650Shselasky 3514290650Shselasky u8 syndrome[0x20]; 3515290650Shselasky 3516290650Shselasky u8 reserved_1[0x40]; 3517290650Shselasky}; 3518290650Shselasky 3519290650Shselaskyenum { 3520290650Shselasky MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0, 3521290650Shselasky MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2, 3522290650Shselasky}; 3523290650Shselasky 3524290650Shselaskystruct mlx5_ifc_set_mad_demux_in_bits { 3525290650Shselasky u8 opcode[0x10]; 3526290650Shselasky u8 reserved_0[0x10]; 3527290650Shselasky 3528290650Shselasky u8 reserved_1[0x10]; 3529290650Shselasky u8 op_mod[0x10]; 3530290650Shselasky 3531290650Shselasky u8 reserved_2[0x20]; 3532290650Shselasky 3533290650Shselasky u8 reserved_3[0x6]; 3534290650Shselasky u8 demux_mode[0x2]; 3535290650Shselasky u8 reserved_4[0x18]; 3536290650Shselasky}; 3537290650Shselasky 3538290650Shselaskystruct mlx5_ifc_set_l2_table_entry_out_bits { 3539290650Shselasky u8 status[0x8]; 3540290650Shselasky u8 reserved_0[0x18]; 3541290650Shselasky 3542290650Shselasky u8 syndrome[0x20]; 3543290650Shselasky 3544290650Shselasky u8 reserved_1[0x40]; 3545290650Shselasky}; 3546290650Shselasky 3547290650Shselaskystruct mlx5_ifc_set_l2_table_entry_in_bits { 3548290650Shselasky u8 opcode[0x10]; 3549290650Shselasky u8 reserved_0[0x10]; 3550290650Shselasky 3551290650Shselasky u8 reserved_1[0x10]; 3552290650Shselasky u8 op_mod[0x10]; 3553290650Shselasky 3554290650Shselasky u8 reserved_2[0x60]; 3555290650Shselasky 3556290650Shselasky u8 reserved_3[0x8]; 3557290650Shselasky u8 table_index[0x18]; 3558290650Shselasky 3559290650Shselasky u8 reserved_4[0x20]; 3560290650Shselasky 3561290650Shselasky u8 reserved_5[0x13]; 3562290650Shselasky u8 vlan_valid[0x1]; 3563290650Shselasky u8 vlan[0xc]; 3564290650Shselasky 3565290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_address; 3566290650Shselasky 3567290650Shselasky u8 reserved_6[0xc0]; 3568290650Shselasky}; 3569290650Shselasky 3570290650Shselaskystruct mlx5_ifc_set_issi_out_bits { 3571290650Shselasky u8 status[0x8]; 3572290650Shselasky u8 reserved_0[0x18]; 3573290650Shselasky 3574290650Shselasky u8 syndrome[0x20]; 3575290650Shselasky 3576290650Shselasky u8 reserved_1[0x40]; 3577290650Shselasky}; 3578290650Shselasky 3579290650Shselaskystruct mlx5_ifc_set_issi_in_bits { 3580290650Shselasky u8 opcode[0x10]; 3581290650Shselasky u8 reserved_0[0x10]; 3582290650Shselasky 3583290650Shselasky u8 reserved_1[0x10]; 3584290650Shselasky u8 op_mod[0x10]; 3585290650Shselasky 3586290650Shselasky u8 reserved_2[0x10]; 3587290650Shselasky u8 current_issi[0x10]; 3588290650Shselasky 3589290650Shselasky u8 reserved_3[0x20]; 3590290650Shselasky}; 3591290650Shselasky 3592290650Shselaskystruct mlx5_ifc_set_hca_cap_out_bits { 3593290650Shselasky u8 status[0x8]; 3594290650Shselasky u8 reserved_0[0x18]; 3595290650Shselasky 3596290650Shselasky u8 syndrome[0x20]; 3597290650Shselasky 3598290650Shselasky u8 reserved_1[0x40]; 3599290650Shselasky}; 3600290650Shselasky 3601290650Shselaskystruct mlx5_ifc_set_hca_cap_in_bits { 3602290650Shselasky u8 opcode[0x10]; 3603290650Shselasky u8 reserved_0[0x10]; 3604290650Shselasky 3605290650Shselasky u8 reserved_1[0x10]; 3606290650Shselasky u8 op_mod[0x10]; 3607290650Shselasky 3608290650Shselasky u8 reserved_2[0x40]; 3609290650Shselasky 3610290650Shselasky union mlx5_ifc_hca_cap_union_bits capability; 3611290650Shselasky}; 3612290650Shselasky 3613306233Shselaskyenum { 3614306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0, 3615306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1, 3616306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2, 3617306233Shselasky MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3 3618306233Shselasky}; 3619306233Shselasky 3620290650Shselaskystruct mlx5_ifc_set_flow_table_root_out_bits { 3621290650Shselasky u8 status[0x8]; 3622290650Shselasky u8 reserved_0[0x18]; 3623290650Shselasky 3624290650Shselasky u8 syndrome[0x20]; 3625290650Shselasky 3626290650Shselasky u8 reserved_1[0x40]; 3627290650Shselasky}; 3628290650Shselasky 3629290650Shselaskystruct mlx5_ifc_set_flow_table_root_in_bits { 3630290650Shselasky u8 opcode[0x10]; 3631290650Shselasky u8 reserved_0[0x10]; 3632290650Shselasky 3633290650Shselasky u8 reserved_1[0x10]; 3634290650Shselasky u8 op_mod[0x10]; 3635290650Shselasky 3636290650Shselasky u8 other_vport[0x1]; 3637290650Shselasky u8 reserved_2[0xf]; 3638290650Shselasky u8 vport_number[0x10]; 3639290650Shselasky 3640290650Shselasky u8 reserved_3[0x20]; 3641290650Shselasky 3642290650Shselasky u8 table_type[0x8]; 3643290650Shselasky u8 reserved_4[0x18]; 3644290650Shselasky 3645290650Shselasky u8 reserved_5[0x8]; 3646290650Shselasky u8 table_id[0x18]; 3647290650Shselasky 3648306233Shselasky u8 reserved_6[0x8]; 3649306233Shselasky u8 underlay_qpn[0x18]; 3650306233Shselasky 3651306233Shselasky u8 reserved_7[0x120]; 3652290650Shselasky}; 3653290650Shselasky 3654290650Shselaskystruct mlx5_ifc_set_fte_out_bits { 3655290650Shselasky u8 status[0x8]; 3656290650Shselasky u8 reserved_0[0x18]; 3657290650Shselasky 3658290650Shselasky u8 syndrome[0x20]; 3659290650Shselasky 3660290650Shselasky u8 reserved_1[0x40]; 3661290650Shselasky}; 3662290650Shselasky 3663290650Shselaskystruct mlx5_ifc_set_fte_in_bits { 3664290650Shselasky u8 opcode[0x10]; 3665290650Shselasky u8 reserved_0[0x10]; 3666290650Shselasky 3667290650Shselasky u8 reserved_1[0x10]; 3668290650Shselasky u8 op_mod[0x10]; 3669290650Shselasky 3670290650Shselasky u8 other_vport[0x1]; 3671290650Shselasky u8 reserved_2[0xf]; 3672290650Shselasky u8 vport_number[0x10]; 3673290650Shselasky 3674290650Shselasky u8 reserved_3[0x20]; 3675290650Shselasky 3676290650Shselasky u8 table_type[0x8]; 3677290650Shselasky u8 reserved_4[0x18]; 3678290650Shselasky 3679290650Shselasky u8 reserved_5[0x8]; 3680290650Shselasky u8 table_id[0x18]; 3681290650Shselasky 3682290650Shselasky u8 reserved_6[0x18]; 3683290650Shselasky u8 modify_enable_mask[0x8]; 3684290650Shselasky 3685290650Shselasky u8 reserved_7[0x20]; 3686290650Shselasky 3687290650Shselasky u8 flow_index[0x20]; 3688290650Shselasky 3689290650Shselasky u8 reserved_8[0xe0]; 3690290650Shselasky 3691290650Shselasky struct mlx5_ifc_flow_context_bits flow_context; 3692290650Shselasky}; 3693290650Shselasky 3694290650Shselaskystruct mlx5_ifc_set_driver_version_out_bits { 3695290650Shselasky u8 status[0x8]; 3696290650Shselasky u8 reserved_0[0x18]; 3697290650Shselasky 3698290650Shselasky u8 syndrome[0x20]; 3699290650Shselasky 3700290650Shselasky u8 reserved_1[0x40]; 3701290650Shselasky}; 3702290650Shselasky 3703290650Shselaskystruct mlx5_ifc_set_driver_version_in_bits { 3704290650Shselasky u8 opcode[0x10]; 3705290650Shselasky u8 reserved_0[0x10]; 3706290650Shselasky 3707290650Shselasky u8 reserved_1[0x10]; 3708290650Shselasky u8 op_mod[0x10]; 3709290650Shselasky 3710290650Shselasky u8 reserved_2[0x40]; 3711290650Shselasky 3712290650Shselasky u8 driver_version[64][0x8]; 3713290650Shselasky}; 3714290650Shselasky 3715290650Shselaskystruct mlx5_ifc_set_dc_cnak_trace_out_bits { 3716290650Shselasky u8 status[0x8]; 3717290650Shselasky u8 reserved_0[0x18]; 3718290650Shselasky 3719290650Shselasky u8 syndrome[0x20]; 3720290650Shselasky 3721290650Shselasky u8 reserved_1[0x40]; 3722290650Shselasky}; 3723290650Shselasky 3724290650Shselaskystruct mlx5_ifc_set_dc_cnak_trace_in_bits { 3725290650Shselasky u8 opcode[0x10]; 3726290650Shselasky u8 reserved_0[0x10]; 3727290650Shselasky 3728290650Shselasky u8 reserved_1[0x10]; 3729290650Shselasky u8 op_mod[0x10]; 3730290650Shselasky 3731290650Shselasky u8 enable[0x1]; 3732290650Shselasky u8 reserved_2[0x1f]; 3733290650Shselasky 3734290650Shselasky u8 reserved_3[0x160]; 3735290650Shselasky 3736290650Shselasky struct mlx5_ifc_cmd_pas_bits pas; 3737290650Shselasky}; 3738290650Shselasky 3739290650Shselaskystruct mlx5_ifc_set_burst_size_out_bits { 3740290650Shselasky u8 status[0x8]; 3741290650Shselasky u8 reserved_0[0x18]; 3742290650Shselasky 3743290650Shselasky u8 syndrome[0x20]; 3744290650Shselasky 3745290650Shselasky u8 reserved_1[0x40]; 3746290650Shselasky}; 3747290650Shselasky 3748290650Shselaskystruct mlx5_ifc_set_burst_size_in_bits { 3749290650Shselasky u8 opcode[0x10]; 3750290650Shselasky u8 reserved_0[0x10]; 3751290650Shselasky 3752290650Shselasky u8 reserved_1[0x10]; 3753290650Shselasky u8 op_mod[0x10]; 3754290650Shselasky 3755290650Shselasky u8 reserved_2[0x20]; 3756290650Shselasky 3757290650Shselasky u8 reserved_3[0x9]; 3758290650Shselasky u8 device_burst_size[0x17]; 3759290650Shselasky}; 3760290650Shselasky 3761290650Shselaskystruct mlx5_ifc_rts2rts_qp_out_bits { 3762290650Shselasky u8 status[0x8]; 3763290650Shselasky u8 reserved_0[0x18]; 3764290650Shselasky 3765290650Shselasky u8 syndrome[0x20]; 3766290650Shselasky 3767290650Shselasky u8 reserved_1[0x40]; 3768290650Shselasky}; 3769290650Shselasky 3770290650Shselaskystruct mlx5_ifc_rts2rts_qp_in_bits { 3771290650Shselasky u8 opcode[0x10]; 3772290650Shselasky u8 reserved_0[0x10]; 3773290650Shselasky 3774290650Shselasky u8 reserved_1[0x10]; 3775290650Shselasky u8 op_mod[0x10]; 3776290650Shselasky 3777290650Shselasky u8 reserved_2[0x8]; 3778290650Shselasky u8 qpn[0x18]; 3779290650Shselasky 3780290650Shselasky u8 reserved_3[0x20]; 3781290650Shselasky 3782290650Shselasky u8 opt_param_mask[0x20]; 3783290650Shselasky 3784290650Shselasky u8 reserved_4[0x20]; 3785290650Shselasky 3786290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3787290650Shselasky 3788290650Shselasky u8 reserved_5[0x80]; 3789290650Shselasky}; 3790290650Shselasky 3791290650Shselaskystruct mlx5_ifc_rtr2rts_qp_out_bits { 3792290650Shselasky u8 status[0x8]; 3793290650Shselasky u8 reserved_0[0x18]; 3794290650Shselasky 3795290650Shselasky u8 syndrome[0x20]; 3796290650Shselasky 3797290650Shselasky u8 reserved_1[0x40]; 3798290650Shselasky}; 3799290650Shselasky 3800290650Shselaskystruct mlx5_ifc_rtr2rts_qp_in_bits { 3801290650Shselasky u8 opcode[0x10]; 3802290650Shselasky u8 reserved_0[0x10]; 3803290650Shselasky 3804290650Shselasky u8 reserved_1[0x10]; 3805290650Shselasky u8 op_mod[0x10]; 3806290650Shselasky 3807290650Shselasky u8 reserved_2[0x8]; 3808290650Shselasky u8 qpn[0x18]; 3809290650Shselasky 3810290650Shselasky u8 reserved_3[0x20]; 3811290650Shselasky 3812290650Shselasky u8 opt_param_mask[0x20]; 3813290650Shselasky 3814290650Shselasky u8 reserved_4[0x20]; 3815290650Shselasky 3816290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3817290650Shselasky 3818290650Shselasky u8 reserved_5[0x80]; 3819290650Shselasky}; 3820290650Shselasky 3821290650Shselaskystruct mlx5_ifc_rst2init_qp_out_bits { 3822290650Shselasky u8 status[0x8]; 3823290650Shselasky u8 reserved_0[0x18]; 3824290650Shselasky 3825290650Shselasky u8 syndrome[0x20]; 3826290650Shselasky 3827290650Shselasky u8 reserved_1[0x40]; 3828290650Shselasky}; 3829290650Shselasky 3830290650Shselaskystruct mlx5_ifc_rst2init_qp_in_bits { 3831290650Shselasky u8 opcode[0x10]; 3832290650Shselasky u8 reserved_0[0x10]; 3833290650Shselasky 3834290650Shselasky u8 reserved_1[0x10]; 3835290650Shselasky u8 op_mod[0x10]; 3836290650Shselasky 3837290650Shselasky u8 reserved_2[0x8]; 3838290650Shselasky u8 qpn[0x18]; 3839290650Shselasky 3840290650Shselasky u8 reserved_3[0x20]; 3841290650Shselasky 3842290650Shselasky u8 opt_param_mask[0x20]; 3843290650Shselasky 3844290650Shselasky u8 reserved_4[0x20]; 3845290650Shselasky 3846290650Shselasky struct mlx5_ifc_qpc_bits qpc; 3847290650Shselasky 3848290650Shselasky u8 reserved_5[0x80]; 3849290650Shselasky}; 3850290650Shselasky 3851290650Shselaskystruct mlx5_ifc_resume_qp_out_bits { 3852290650Shselasky u8 status[0x8]; 3853290650Shselasky u8 reserved_0[0x18]; 3854290650Shselasky 3855290650Shselasky u8 syndrome[0x20]; 3856290650Shselasky 3857290650Shselasky u8 reserved_1[0x40]; 3858290650Shselasky}; 3859290650Shselasky 3860290650Shselaskystruct mlx5_ifc_resume_qp_in_bits { 3861290650Shselasky u8 opcode[0x10]; 3862290650Shselasky u8 reserved_0[0x10]; 3863290650Shselasky 3864290650Shselasky u8 reserved_1[0x10]; 3865290650Shselasky u8 op_mod[0x10]; 3866290650Shselasky 3867290650Shselasky u8 reserved_2[0x8]; 3868290650Shselasky u8 qpn[0x18]; 3869290650Shselasky 3870290650Shselasky u8 reserved_3[0x20]; 3871290650Shselasky}; 3872290650Shselasky 3873290650Shselaskystruct mlx5_ifc_query_xrc_srq_out_bits { 3874290650Shselasky u8 status[0x8]; 3875290650Shselasky u8 reserved_0[0x18]; 3876290650Shselasky 3877290650Shselasky u8 syndrome[0x20]; 3878290650Shselasky 3879290650Shselasky u8 reserved_1[0x40]; 3880290650Shselasky 3881290650Shselasky struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry; 3882290650Shselasky 3883290650Shselasky u8 reserved_2[0x600]; 3884290650Shselasky 3885290650Shselasky u8 pas[0][0x40]; 3886290650Shselasky}; 3887290650Shselasky 3888290650Shselaskystruct mlx5_ifc_query_xrc_srq_in_bits { 3889290650Shselasky u8 opcode[0x10]; 3890290650Shselasky u8 reserved_0[0x10]; 3891290650Shselasky 3892290650Shselasky u8 reserved_1[0x10]; 3893290650Shselasky u8 op_mod[0x10]; 3894290650Shselasky 3895290650Shselasky u8 reserved_2[0x8]; 3896290650Shselasky u8 xrc_srqn[0x18]; 3897290650Shselasky 3898290650Shselasky u8 reserved_3[0x20]; 3899290650Shselasky}; 3900290650Shselasky 3901290650Shselaskystruct mlx5_ifc_query_wol_rol_out_bits { 3902290650Shselasky u8 status[0x8]; 3903290650Shselasky u8 reserved_0[0x18]; 3904290650Shselasky 3905290650Shselasky u8 syndrome[0x20]; 3906290650Shselasky 3907290650Shselasky u8 reserved_1[0x10]; 3908290650Shselasky u8 rol_mode[0x8]; 3909290650Shselasky u8 wol_mode[0x8]; 3910290650Shselasky 3911290650Shselasky u8 reserved_2[0x20]; 3912290650Shselasky}; 3913290650Shselasky 3914290650Shselaskystruct mlx5_ifc_query_wol_rol_in_bits { 3915290650Shselasky u8 opcode[0x10]; 3916290650Shselasky u8 reserved_0[0x10]; 3917290650Shselasky 3918290650Shselasky u8 reserved_1[0x10]; 3919290650Shselasky u8 op_mod[0x10]; 3920290650Shselasky 3921290650Shselasky u8 reserved_2[0x40]; 3922290650Shselasky}; 3923290650Shselasky 3924290650Shselaskyenum { 3925290650Shselasky MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0, 3926290650Shselasky MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1, 3927290650Shselasky}; 3928290650Shselasky 3929290650Shselaskystruct mlx5_ifc_query_vport_state_out_bits { 3930290650Shselasky u8 status[0x8]; 3931290650Shselasky u8 reserved_0[0x18]; 3932290650Shselasky 3933290650Shselasky u8 syndrome[0x20]; 3934290650Shselasky 3935290650Shselasky u8 reserved_1[0x20]; 3936290650Shselasky 3937290650Shselasky u8 reserved_2[0x18]; 3938290650Shselasky u8 admin_state[0x4]; 3939290650Shselasky u8 state[0x4]; 3940290650Shselasky}; 3941290650Shselasky 3942290650Shselaskyenum { 3943290650Shselasky MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0, 3944290650Shselasky MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1, 3945290650Shselasky MLX5_QUERY_VPORT_STATE_IN_OP_MOD_UPLINK = 0x2, 3946290650Shselasky}; 3947290650Shselasky 3948290650Shselaskystruct mlx5_ifc_query_vport_state_in_bits { 3949290650Shselasky u8 opcode[0x10]; 3950290650Shselasky u8 reserved_0[0x10]; 3951290650Shselasky 3952290650Shselasky u8 reserved_1[0x10]; 3953290650Shselasky u8 op_mod[0x10]; 3954290650Shselasky 3955290650Shselasky u8 other_vport[0x1]; 3956290650Shselasky u8 reserved_2[0xf]; 3957290650Shselasky u8 vport_number[0x10]; 3958290650Shselasky 3959290650Shselasky u8 reserved_3[0x20]; 3960290650Shselasky}; 3961290650Shselasky 3962347850Shselaskystruct mlx5_ifc_query_vnic_env_out_bits { 3963347850Shselasky u8 status[0x8]; 3964347850Shselasky u8 reserved_at_8[0x18]; 3965347850Shselasky 3966347850Shselasky u8 syndrome[0x20]; 3967347850Shselasky 3968347850Shselasky u8 reserved_at_40[0x40]; 3969347850Shselasky 3970347850Shselasky struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env; 3971347850Shselasky}; 3972347850Shselasky 3973347850Shselaskyenum { 3974347850Shselasky MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0, 3975347850Shselasky}; 3976347850Shselasky 3977347850Shselaskystruct mlx5_ifc_query_vnic_env_in_bits { 3978347850Shselasky u8 opcode[0x10]; 3979347850Shselasky u8 reserved_at_10[0x10]; 3980347850Shselasky 3981347850Shselasky u8 reserved_at_20[0x10]; 3982347850Shselasky u8 op_mod[0x10]; 3983347850Shselasky 3984347850Shselasky u8 other_vport[0x1]; 3985347850Shselasky u8 reserved_at_41[0xf]; 3986347850Shselasky u8 vport_number[0x10]; 3987347850Shselasky 3988347850Shselasky u8 reserved_at_60[0x20]; 3989347850Shselasky}; 3990347850Shselasky 3991290650Shselaskystruct mlx5_ifc_query_vport_counter_out_bits { 3992290650Shselasky u8 status[0x8]; 3993290650Shselasky u8 reserved_0[0x18]; 3994290650Shselasky 3995290650Shselasky u8 syndrome[0x20]; 3996290650Shselasky 3997290650Shselasky u8 reserved_1[0x40]; 3998290650Shselasky 3999290650Shselasky struct mlx5_ifc_traffic_counter_bits received_errors; 4000290650Shselasky 4001290650Shselasky struct mlx5_ifc_traffic_counter_bits transmit_errors; 4002290650Shselasky 4003290650Shselasky struct mlx5_ifc_traffic_counter_bits received_ib_unicast; 4004290650Shselasky 4005290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast; 4006290650Shselasky 4007290650Shselasky struct mlx5_ifc_traffic_counter_bits received_ib_multicast; 4008290650Shselasky 4009290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast; 4010290650Shselasky 4011290650Shselasky struct mlx5_ifc_traffic_counter_bits received_eth_broadcast; 4012290650Shselasky 4013290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast; 4014290650Shselasky 4015290650Shselasky struct mlx5_ifc_traffic_counter_bits received_eth_unicast; 4016290650Shselasky 4017290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast; 4018290650Shselasky 4019290650Shselasky struct mlx5_ifc_traffic_counter_bits received_eth_multicast; 4020290650Shselasky 4021290650Shselasky struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast; 4022290650Shselasky 4023290650Shselasky u8 reserved_2[0xa00]; 4024290650Shselasky}; 4025290650Shselasky 4026290650Shselaskyenum { 4027290650Shselasky MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0, 4028290650Shselasky}; 4029290650Shselasky 4030290650Shselaskystruct mlx5_ifc_query_vport_counter_in_bits { 4031290650Shselasky u8 opcode[0x10]; 4032290650Shselasky u8 reserved_0[0x10]; 4033290650Shselasky 4034290650Shselasky u8 reserved_1[0x10]; 4035290650Shselasky u8 op_mod[0x10]; 4036290650Shselasky 4037290650Shselasky u8 other_vport[0x1]; 4038290650Shselasky u8 reserved_2[0xb]; 4039290650Shselasky u8 port_num[0x4]; 4040290650Shselasky u8 vport_number[0x10]; 4041290650Shselasky 4042290650Shselasky u8 reserved_3[0x60]; 4043290650Shselasky 4044290650Shselasky u8 clear[0x1]; 4045290650Shselasky u8 reserved_4[0x1f]; 4046290650Shselasky 4047290650Shselasky u8 reserved_5[0x20]; 4048290650Shselasky}; 4049290650Shselasky 4050290650Shselaskystruct mlx5_ifc_query_tis_out_bits { 4051290650Shselasky u8 status[0x8]; 4052290650Shselasky u8 reserved_0[0x18]; 4053290650Shselasky 4054290650Shselasky u8 syndrome[0x20]; 4055290650Shselasky 4056290650Shselasky u8 reserved_1[0x40]; 4057290650Shselasky 4058290650Shselasky struct mlx5_ifc_tisc_bits tis_context; 4059290650Shselasky}; 4060290650Shselasky 4061290650Shselaskystruct mlx5_ifc_query_tis_in_bits { 4062290650Shselasky u8 opcode[0x10]; 4063290650Shselasky u8 reserved_0[0x10]; 4064290650Shselasky 4065290650Shselasky u8 reserved_1[0x10]; 4066290650Shselasky u8 op_mod[0x10]; 4067290650Shselasky 4068290650Shselasky u8 reserved_2[0x8]; 4069290650Shselasky u8 tisn[0x18]; 4070290650Shselasky 4071290650Shselasky u8 reserved_3[0x20]; 4072290650Shselasky}; 4073290650Shselasky 4074290650Shselaskystruct mlx5_ifc_query_tir_out_bits { 4075290650Shselasky u8 status[0x8]; 4076290650Shselasky u8 reserved_0[0x18]; 4077290650Shselasky 4078290650Shselasky u8 syndrome[0x20]; 4079290650Shselasky 4080290650Shselasky u8 reserved_1[0xc0]; 4081290650Shselasky 4082290650Shselasky struct mlx5_ifc_tirc_bits tir_context; 4083290650Shselasky}; 4084290650Shselasky 4085290650Shselaskystruct mlx5_ifc_query_tir_in_bits { 4086290650Shselasky u8 opcode[0x10]; 4087290650Shselasky u8 reserved_0[0x10]; 4088290650Shselasky 4089290650Shselasky u8 reserved_1[0x10]; 4090290650Shselasky u8 op_mod[0x10]; 4091290650Shselasky 4092290650Shselasky u8 reserved_2[0x8]; 4093290650Shselasky u8 tirn[0x18]; 4094290650Shselasky 4095290650Shselasky u8 reserved_3[0x20]; 4096290650Shselasky}; 4097290650Shselasky 4098290650Shselaskystruct mlx5_ifc_query_srq_out_bits { 4099290650Shselasky u8 status[0x8]; 4100290650Shselasky u8 reserved_0[0x18]; 4101290650Shselasky 4102290650Shselasky u8 syndrome[0x20]; 4103290650Shselasky 4104290650Shselasky u8 reserved_1[0x40]; 4105290650Shselasky 4106290650Shselasky struct mlx5_ifc_srqc_bits srq_context_entry; 4107290650Shselasky 4108290650Shselasky u8 reserved_2[0x600]; 4109290650Shselasky 4110290650Shselasky u8 pas[0][0x40]; 4111290650Shselasky}; 4112290650Shselasky 4113290650Shselaskystruct mlx5_ifc_query_srq_in_bits { 4114290650Shselasky u8 opcode[0x10]; 4115290650Shselasky u8 reserved_0[0x10]; 4116290650Shselasky 4117290650Shselasky u8 reserved_1[0x10]; 4118290650Shselasky u8 op_mod[0x10]; 4119290650Shselasky 4120290650Shselasky u8 reserved_2[0x8]; 4121290650Shselasky u8 srqn[0x18]; 4122290650Shselasky 4123290650Shselasky u8 reserved_3[0x20]; 4124290650Shselasky}; 4125290650Shselasky 4126290650Shselaskystruct mlx5_ifc_query_sq_out_bits { 4127290650Shselasky u8 status[0x8]; 4128290650Shselasky u8 reserved_0[0x18]; 4129290650Shselasky 4130290650Shselasky u8 syndrome[0x20]; 4131290650Shselasky 4132290650Shselasky u8 reserved_1[0xc0]; 4133290650Shselasky 4134290650Shselasky struct mlx5_ifc_sqc_bits sq_context; 4135290650Shselasky}; 4136290650Shselasky 4137290650Shselaskystruct mlx5_ifc_query_sq_in_bits { 4138290650Shselasky u8 opcode[0x10]; 4139290650Shselasky u8 reserved_0[0x10]; 4140290650Shselasky 4141290650Shselasky u8 reserved_1[0x10]; 4142290650Shselasky u8 op_mod[0x10]; 4143290650Shselasky 4144290650Shselasky u8 reserved_2[0x8]; 4145290650Shselasky u8 sqn[0x18]; 4146290650Shselasky 4147290650Shselasky u8 reserved_3[0x20]; 4148290650Shselasky}; 4149290650Shselasky 4150290650Shselaskystruct mlx5_ifc_query_special_contexts_out_bits { 4151290650Shselasky u8 status[0x8]; 4152290650Shselasky u8 reserved_0[0x18]; 4153290650Shselasky 4154290650Shselasky u8 syndrome[0x20]; 4155290650Shselasky 4156331807Shselasky u8 dump_fill_mkey[0x20]; 4157290650Shselasky 4158290650Shselasky u8 resd_lkey[0x20]; 4159290650Shselasky}; 4160290650Shselasky 4161290650Shselaskystruct mlx5_ifc_query_special_contexts_in_bits { 4162290650Shselasky u8 opcode[0x10]; 4163290650Shselasky u8 reserved_0[0x10]; 4164290650Shselasky 4165290650Shselasky u8 reserved_1[0x10]; 4166290650Shselasky u8 op_mod[0x10]; 4167290650Shselasky 4168290650Shselasky u8 reserved_2[0x40]; 4169290650Shselasky}; 4170290650Shselasky 4171308678Shselaskystruct mlx5_ifc_query_scheduling_element_out_bits { 4172308678Shselasky u8 status[0x8]; 4173308678Shselasky u8 reserved_at_8[0x18]; 4174308678Shselasky 4175308678Shselasky u8 syndrome[0x20]; 4176308678Shselasky 4177308678Shselasky u8 reserved_at_40[0xc0]; 4178308678Shselasky 4179308678Shselasky struct mlx5_ifc_scheduling_context_bits scheduling_context; 4180308678Shselasky 4181308678Shselasky u8 reserved_at_300[0x100]; 4182308678Shselasky}; 4183308678Shselasky 4184308678Shselaskyenum { 4185308678Shselasky MLX5_SCHEDULING_ELEMENT_IN_HIERARCHY_E_SWITCH = 0x2, 4186308678Shselasky}; 4187308678Shselasky 4188308678Shselaskystruct mlx5_ifc_query_scheduling_element_in_bits { 4189308678Shselasky u8 opcode[0x10]; 4190308678Shselasky u8 reserved_at_10[0x10]; 4191308678Shselasky 4192308678Shselasky u8 reserved_at_20[0x10]; 4193308678Shselasky u8 op_mod[0x10]; 4194308678Shselasky 4195308678Shselasky u8 scheduling_hierarchy[0x8]; 4196308678Shselasky u8 reserved_at_48[0x18]; 4197308678Shselasky 4198308678Shselasky u8 scheduling_element_id[0x20]; 4199308678Shselasky 4200308678Shselasky u8 reserved_at_80[0x180]; 4201308678Shselasky}; 4202308678Shselasky 4203290650Shselaskystruct mlx5_ifc_query_rqt_out_bits { 4204290650Shselasky u8 status[0x8]; 4205290650Shselasky u8 reserved_0[0x18]; 4206290650Shselasky 4207290650Shselasky u8 syndrome[0x20]; 4208290650Shselasky 4209290650Shselasky u8 reserved_1[0xc0]; 4210290650Shselasky 4211290650Shselasky struct mlx5_ifc_rqtc_bits rqt_context; 4212290650Shselasky}; 4213290650Shselasky 4214290650Shselaskystruct mlx5_ifc_query_rqt_in_bits { 4215290650Shselasky u8 opcode[0x10]; 4216290650Shselasky u8 reserved_0[0x10]; 4217290650Shselasky 4218290650Shselasky u8 reserved_1[0x10]; 4219290650Shselasky u8 op_mod[0x10]; 4220290650Shselasky 4221290650Shselasky u8 reserved_2[0x8]; 4222290650Shselasky u8 rqtn[0x18]; 4223290650Shselasky 4224290650Shselasky u8 reserved_3[0x20]; 4225290650Shselasky}; 4226290650Shselasky 4227290650Shselaskystruct mlx5_ifc_query_rq_out_bits { 4228290650Shselasky u8 status[0x8]; 4229290650Shselasky u8 reserved_0[0x18]; 4230290650Shselasky 4231290650Shselasky u8 syndrome[0x20]; 4232290650Shselasky 4233290650Shselasky u8 reserved_1[0xc0]; 4234290650Shselasky 4235290650Shselasky struct mlx5_ifc_rqc_bits rq_context; 4236290650Shselasky}; 4237290650Shselasky 4238290650Shselaskystruct mlx5_ifc_query_rq_in_bits { 4239290650Shselasky u8 opcode[0x10]; 4240290650Shselasky u8 reserved_0[0x10]; 4241290650Shselasky 4242290650Shselasky u8 reserved_1[0x10]; 4243290650Shselasky u8 op_mod[0x10]; 4244290650Shselasky 4245290650Shselasky u8 reserved_2[0x8]; 4246290650Shselasky u8 rqn[0x18]; 4247290650Shselasky 4248290650Shselasky u8 reserved_3[0x20]; 4249290650Shselasky}; 4250290650Shselasky 4251290650Shselaskystruct mlx5_ifc_query_roce_address_out_bits { 4252290650Shselasky u8 status[0x8]; 4253290650Shselasky u8 reserved_0[0x18]; 4254290650Shselasky 4255290650Shselasky u8 syndrome[0x20]; 4256290650Shselasky 4257290650Shselasky u8 reserved_1[0x40]; 4258290650Shselasky 4259290650Shselasky struct mlx5_ifc_roce_addr_layout_bits roce_address; 4260290650Shselasky}; 4261290650Shselasky 4262290650Shselaskystruct mlx5_ifc_query_roce_address_in_bits { 4263290650Shselasky u8 opcode[0x10]; 4264290650Shselasky u8 reserved_0[0x10]; 4265290650Shselasky 4266290650Shselasky u8 reserved_1[0x10]; 4267290650Shselasky u8 op_mod[0x10]; 4268290650Shselasky 4269290650Shselasky u8 roce_address_index[0x10]; 4270290650Shselasky u8 reserved_2[0x10]; 4271290650Shselasky 4272290650Shselasky u8 reserved_3[0x20]; 4273290650Shselasky}; 4274290650Shselasky 4275290650Shselaskystruct mlx5_ifc_query_rmp_out_bits { 4276290650Shselasky u8 status[0x8]; 4277290650Shselasky u8 reserved_0[0x18]; 4278290650Shselasky 4279290650Shselasky u8 syndrome[0x20]; 4280290650Shselasky 4281290650Shselasky u8 reserved_1[0xc0]; 4282290650Shselasky 4283290650Shselasky struct mlx5_ifc_rmpc_bits rmp_context; 4284290650Shselasky}; 4285290650Shselasky 4286290650Shselaskystruct mlx5_ifc_query_rmp_in_bits { 4287290650Shselasky u8 opcode[0x10]; 4288290650Shselasky u8 reserved_0[0x10]; 4289290650Shselasky 4290290650Shselasky u8 reserved_1[0x10]; 4291290650Shselasky u8 op_mod[0x10]; 4292290650Shselasky 4293290650Shselasky u8 reserved_2[0x8]; 4294290650Shselasky u8 rmpn[0x18]; 4295290650Shselasky 4296290650Shselasky u8 reserved_3[0x20]; 4297290650Shselasky}; 4298290650Shselasky 4299290650Shselaskystruct mlx5_ifc_query_rdb_out_bits { 4300290650Shselasky u8 status[0x8]; 4301290650Shselasky u8 reserved_0[0x18]; 4302290650Shselasky 4303290650Shselasky u8 syndrome[0x20]; 4304290650Shselasky 4305290650Shselasky u8 reserved_1[0x20]; 4306290650Shselasky 4307290650Shselasky u8 reserved_2[0x18]; 4308290650Shselasky u8 rdb_list_size[0x8]; 4309290650Shselasky 4310290650Shselasky struct mlx5_ifc_rdbc_bits rdb_context[0]; 4311290650Shselasky}; 4312290650Shselasky 4313290650Shselaskystruct mlx5_ifc_query_rdb_in_bits { 4314290650Shselasky u8 opcode[0x10]; 4315290650Shselasky u8 reserved_0[0x10]; 4316290650Shselasky 4317290650Shselasky u8 reserved_1[0x10]; 4318290650Shselasky u8 op_mod[0x10]; 4319290650Shselasky 4320290650Shselasky u8 reserved_2[0x8]; 4321290650Shselasky u8 qpn[0x18]; 4322290650Shselasky 4323290650Shselasky u8 reserved_3[0x20]; 4324290650Shselasky}; 4325290650Shselasky 4326290650Shselaskystruct mlx5_ifc_query_qp_out_bits { 4327290650Shselasky u8 status[0x8]; 4328290650Shselasky u8 reserved_0[0x18]; 4329290650Shselasky 4330290650Shselasky u8 syndrome[0x20]; 4331290650Shselasky 4332290650Shselasky u8 reserved_1[0x40]; 4333290650Shselasky 4334290650Shselasky u8 opt_param_mask[0x20]; 4335290650Shselasky 4336290650Shselasky u8 reserved_2[0x20]; 4337290650Shselasky 4338290650Shselasky struct mlx5_ifc_qpc_bits qpc; 4339290650Shselasky 4340290650Shselasky u8 reserved_3[0x80]; 4341290650Shselasky 4342290650Shselasky u8 pas[0][0x40]; 4343290650Shselasky}; 4344290650Shselasky 4345290650Shselaskystruct mlx5_ifc_query_qp_in_bits { 4346290650Shselasky u8 opcode[0x10]; 4347290650Shselasky u8 reserved_0[0x10]; 4348290650Shselasky 4349290650Shselasky u8 reserved_1[0x10]; 4350290650Shselasky u8 op_mod[0x10]; 4351290650Shselasky 4352290650Shselasky u8 reserved_2[0x8]; 4353290650Shselasky u8 qpn[0x18]; 4354290650Shselasky 4355290650Shselasky u8 reserved_3[0x20]; 4356290650Shselasky}; 4357290650Shselasky 4358290650Shselaskystruct mlx5_ifc_query_q_counter_out_bits { 4359290650Shselasky u8 status[0x8]; 4360290650Shselasky u8 reserved_0[0x18]; 4361290650Shselasky 4362290650Shselasky u8 syndrome[0x20]; 4363290650Shselasky 4364290650Shselasky u8 reserved_1[0x40]; 4365290650Shselasky 4366290650Shselasky u8 rx_write_requests[0x20]; 4367290650Shselasky 4368290650Shselasky u8 reserved_2[0x20]; 4369290650Shselasky 4370290650Shselasky u8 rx_read_requests[0x20]; 4371290650Shselasky 4372290650Shselasky u8 reserved_3[0x20]; 4373290650Shselasky 4374290650Shselasky u8 rx_atomic_requests[0x20]; 4375290650Shselasky 4376290650Shselasky u8 reserved_4[0x20]; 4377290650Shselasky 4378290650Shselasky u8 rx_dct_connect[0x20]; 4379290650Shselasky 4380290650Shselasky u8 reserved_5[0x20]; 4381290650Shselasky 4382290650Shselasky u8 out_of_buffer[0x20]; 4383290650Shselasky 4384321992Shselasky u8 reserved_7[0x20]; 4385290650Shselasky 4386290650Shselasky u8 out_of_sequence[0x20]; 4387290650Shselasky 4388321992Shselasky u8 reserved_8[0x20]; 4389306233Shselasky 4390321992Shselasky u8 duplicate_request[0x20]; 4391306233Shselasky 4392321992Shselasky u8 reserved_9[0x20]; 4393306233Shselasky 4394321992Shselasky u8 rnr_nak_retry_err[0x20]; 4395306233Shselasky 4396321992Shselasky u8 reserved_10[0x20]; 4397306233Shselasky 4398321992Shselasky u8 packet_seq_err[0x20]; 4399306233Shselasky 4400321992Shselasky u8 reserved_11[0x20]; 4401306233Shselasky 4402321992Shselasky u8 implied_nak_seq_err[0x20]; 4403306233Shselasky 4404321992Shselasky u8 reserved_12[0x20]; 4405306233Shselasky 4406321992Shselasky u8 local_ack_timeout_err[0x20]; 4407306233Shselasky 4408321992Shselasky u8 reserved_13[0x20]; 4409321992Shselasky 4410321992Shselasky u8 resp_rnr_nak[0x20]; 4411321992Shselasky 4412321992Shselasky u8 reserved_14[0x20]; 4413321992Shselasky 4414321992Shselasky u8 req_rnr_retries_exceeded[0x20]; 4415321992Shselasky 4416321992Shselasky u8 reserved_15[0x460]; 4417290650Shselasky}; 4418290650Shselasky 4419290650Shselaskystruct mlx5_ifc_query_q_counter_in_bits { 4420290650Shselasky u8 opcode[0x10]; 4421290650Shselasky u8 reserved_0[0x10]; 4422290650Shselasky 4423290650Shselasky u8 reserved_1[0x10]; 4424290650Shselasky u8 op_mod[0x10]; 4425290650Shselasky 4426290650Shselasky u8 reserved_2[0x80]; 4427290650Shselasky 4428290650Shselasky u8 clear[0x1]; 4429290650Shselasky u8 reserved_3[0x1f]; 4430290650Shselasky 4431290650Shselasky u8 reserved_4[0x18]; 4432290650Shselasky u8 counter_set_id[0x8]; 4433290650Shselasky}; 4434290650Shselasky 4435290650Shselaskystruct mlx5_ifc_query_pages_out_bits { 4436290650Shselasky u8 status[0x8]; 4437290650Shselasky u8 reserved_0[0x18]; 4438290650Shselasky 4439290650Shselasky u8 syndrome[0x20]; 4440290650Shselasky 4441290650Shselasky u8 reserved_1[0x10]; 4442290650Shselasky u8 function_id[0x10]; 4443290650Shselasky 4444290650Shselasky u8 num_pages[0x20]; 4445290650Shselasky}; 4446290650Shselasky 4447290650Shselaskyenum { 4448331807Shselasky MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1, 4449331807Shselasky MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2, 4450331807Shselasky MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3, 4451290650Shselasky}; 4452290650Shselasky 4453290650Shselaskystruct mlx5_ifc_query_pages_in_bits { 4454290650Shselasky u8 opcode[0x10]; 4455290650Shselasky u8 reserved_0[0x10]; 4456290650Shselasky 4457290650Shselasky u8 reserved_1[0x10]; 4458290650Shselasky u8 op_mod[0x10]; 4459290650Shselasky 4460290650Shselasky u8 reserved_2[0x10]; 4461290650Shselasky u8 function_id[0x10]; 4462290650Shselasky 4463290650Shselasky u8 reserved_3[0x20]; 4464290650Shselasky}; 4465290650Shselasky 4466290650Shselaskystruct mlx5_ifc_query_nic_vport_context_out_bits { 4467290650Shselasky u8 status[0x8]; 4468290650Shselasky u8 reserved_0[0x18]; 4469290650Shselasky 4470290650Shselasky u8 syndrome[0x20]; 4471290650Shselasky 4472290650Shselasky u8 reserved_1[0x40]; 4473290650Shselasky 4474290650Shselasky struct mlx5_ifc_nic_vport_context_bits nic_vport_context; 4475290650Shselasky}; 4476290650Shselasky 4477290650Shselaskystruct mlx5_ifc_query_nic_vport_context_in_bits { 4478290650Shselasky u8 opcode[0x10]; 4479290650Shselasky u8 reserved_0[0x10]; 4480290650Shselasky 4481290650Shselasky u8 reserved_1[0x10]; 4482290650Shselasky u8 op_mod[0x10]; 4483290650Shselasky 4484290650Shselasky u8 other_vport[0x1]; 4485290650Shselasky u8 reserved_2[0xf]; 4486290650Shselasky u8 vport_number[0x10]; 4487290650Shselasky 4488290650Shselasky u8 reserved_3[0x5]; 4489290650Shselasky u8 allowed_list_type[0x3]; 4490290650Shselasky u8 reserved_4[0x18]; 4491290650Shselasky}; 4492290650Shselasky 4493290650Shselaskystruct mlx5_ifc_query_mkey_out_bits { 4494290650Shselasky u8 status[0x8]; 4495290650Shselasky u8 reserved_0[0x18]; 4496290650Shselasky 4497290650Shselasky u8 syndrome[0x20]; 4498290650Shselasky 4499290650Shselasky u8 reserved_1[0x40]; 4500290650Shselasky 4501290650Shselasky struct mlx5_ifc_mkc_bits memory_key_mkey_entry; 4502290650Shselasky 4503290650Shselasky u8 reserved_2[0x600]; 4504290650Shselasky 4505290650Shselasky u8 bsf0_klm0_pas_mtt0_1[16][0x8]; 4506290650Shselasky 4507290650Shselasky u8 bsf1_klm1_pas_mtt2_3[16][0x8]; 4508290650Shselasky}; 4509290650Shselasky 4510290650Shselaskystruct mlx5_ifc_query_mkey_in_bits { 4511290650Shselasky u8 opcode[0x10]; 4512290650Shselasky u8 reserved_0[0x10]; 4513290650Shselasky 4514290650Shselasky u8 reserved_1[0x10]; 4515290650Shselasky u8 op_mod[0x10]; 4516290650Shselasky 4517290650Shselasky u8 reserved_2[0x8]; 4518290650Shselasky u8 mkey_index[0x18]; 4519290650Shselasky 4520290650Shselasky u8 pg_access[0x1]; 4521290650Shselasky u8 reserved_3[0x1f]; 4522290650Shselasky}; 4523290650Shselasky 4524290650Shselaskystruct mlx5_ifc_query_mad_demux_out_bits { 4525290650Shselasky u8 status[0x8]; 4526290650Shselasky u8 reserved_0[0x18]; 4527290650Shselasky 4528290650Shselasky u8 syndrome[0x20]; 4529290650Shselasky 4530290650Shselasky u8 reserved_1[0x40]; 4531290650Shselasky 4532290650Shselasky u8 mad_dumux_parameters_block[0x20]; 4533290650Shselasky}; 4534290650Shselasky 4535290650Shselaskystruct mlx5_ifc_query_mad_demux_in_bits { 4536290650Shselasky u8 opcode[0x10]; 4537290650Shselasky u8 reserved_0[0x10]; 4538290650Shselasky 4539290650Shselasky u8 reserved_1[0x10]; 4540290650Shselasky u8 op_mod[0x10]; 4541290650Shselasky 4542290650Shselasky u8 reserved_2[0x40]; 4543290650Shselasky}; 4544290650Shselasky 4545290650Shselaskystruct mlx5_ifc_query_l2_table_entry_out_bits { 4546290650Shselasky u8 status[0x8]; 4547290650Shselasky u8 reserved_0[0x18]; 4548290650Shselasky 4549290650Shselasky u8 syndrome[0x20]; 4550290650Shselasky 4551290650Shselasky u8 reserved_1[0xa0]; 4552290650Shselasky 4553290650Shselasky u8 reserved_2[0x13]; 4554290650Shselasky u8 vlan_valid[0x1]; 4555290650Shselasky u8 vlan[0xc]; 4556290650Shselasky 4557290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_address; 4558290650Shselasky 4559290650Shselasky u8 reserved_3[0xc0]; 4560290650Shselasky}; 4561290650Shselasky 4562290650Shselaskystruct mlx5_ifc_query_l2_table_entry_in_bits { 4563290650Shselasky u8 opcode[0x10]; 4564290650Shselasky u8 reserved_0[0x10]; 4565290650Shselasky 4566290650Shselasky u8 reserved_1[0x10]; 4567290650Shselasky u8 op_mod[0x10]; 4568290650Shselasky 4569290650Shselasky u8 reserved_2[0x60]; 4570290650Shselasky 4571290650Shselasky u8 reserved_3[0x8]; 4572290650Shselasky u8 table_index[0x18]; 4573290650Shselasky 4574290650Shselasky u8 reserved_4[0x140]; 4575290650Shselasky}; 4576290650Shselasky 4577290650Shselaskystruct mlx5_ifc_query_issi_out_bits { 4578290650Shselasky u8 status[0x8]; 4579290650Shselasky u8 reserved_0[0x18]; 4580290650Shselasky 4581290650Shselasky u8 syndrome[0x20]; 4582290650Shselasky 4583290650Shselasky u8 reserved_1[0x10]; 4584290650Shselasky u8 current_issi[0x10]; 4585290650Shselasky 4586290650Shselasky u8 reserved_2[0xa0]; 4587290650Shselasky 4588290650Shselasky u8 supported_issi_reserved[76][0x8]; 4589290650Shselasky u8 supported_issi_dw0[0x20]; 4590290650Shselasky}; 4591290650Shselasky 4592290650Shselaskystruct mlx5_ifc_query_issi_in_bits { 4593290650Shselasky u8 opcode[0x10]; 4594290650Shselasky u8 reserved_0[0x10]; 4595290650Shselasky 4596290650Shselasky u8 reserved_1[0x10]; 4597290650Shselasky u8 op_mod[0x10]; 4598290650Shselasky 4599290650Shselasky u8 reserved_2[0x40]; 4600290650Shselasky}; 4601290650Shselasky 4602290650Shselaskystruct mlx5_ifc_query_hca_vport_pkey_out_bits { 4603290650Shselasky u8 status[0x8]; 4604290650Shselasky u8 reserved_0[0x18]; 4605290650Shselasky 4606290650Shselasky u8 syndrome[0x20]; 4607290650Shselasky 4608290650Shselasky u8 reserved_1[0x40]; 4609290650Shselasky 4610290650Shselasky struct mlx5_ifc_pkey_bits pkey[0]; 4611290650Shselasky}; 4612290650Shselasky 4613290650Shselaskystruct mlx5_ifc_query_hca_vport_pkey_in_bits { 4614290650Shselasky u8 opcode[0x10]; 4615290650Shselasky u8 reserved_0[0x10]; 4616290650Shselasky 4617290650Shselasky u8 reserved_1[0x10]; 4618290650Shselasky u8 op_mod[0x10]; 4619290650Shselasky 4620290650Shselasky u8 other_vport[0x1]; 4621290650Shselasky u8 reserved_2[0xb]; 4622290650Shselasky u8 port_num[0x4]; 4623290650Shselasky u8 vport_number[0x10]; 4624290650Shselasky 4625290650Shselasky u8 reserved_3[0x10]; 4626290650Shselasky u8 pkey_index[0x10]; 4627290650Shselasky}; 4628290650Shselasky 4629290650Shselaskystruct mlx5_ifc_query_hca_vport_gid_out_bits { 4630290650Shselasky u8 status[0x8]; 4631290650Shselasky u8 reserved_0[0x18]; 4632290650Shselasky 4633290650Shselasky u8 syndrome[0x20]; 4634290650Shselasky 4635290650Shselasky u8 reserved_1[0x20]; 4636290650Shselasky 4637290650Shselasky u8 gids_num[0x10]; 4638290650Shselasky u8 reserved_2[0x10]; 4639290650Shselasky 4640290650Shselasky struct mlx5_ifc_array128_auto_bits gid[0]; 4641290650Shselasky}; 4642290650Shselasky 4643290650Shselaskystruct mlx5_ifc_query_hca_vport_gid_in_bits { 4644290650Shselasky u8 opcode[0x10]; 4645290650Shselasky u8 reserved_0[0x10]; 4646290650Shselasky 4647290650Shselasky u8 reserved_1[0x10]; 4648290650Shselasky u8 op_mod[0x10]; 4649290650Shselasky 4650290650Shselasky u8 other_vport[0x1]; 4651290650Shselasky u8 reserved_2[0xb]; 4652290650Shselasky u8 port_num[0x4]; 4653290650Shselasky u8 vport_number[0x10]; 4654290650Shselasky 4655290650Shselasky u8 reserved_3[0x10]; 4656290650Shselasky u8 gid_index[0x10]; 4657290650Shselasky}; 4658290650Shselasky 4659290650Shselaskystruct mlx5_ifc_query_hca_vport_context_out_bits { 4660290650Shselasky u8 status[0x8]; 4661290650Shselasky u8 reserved_0[0x18]; 4662290650Shselasky 4663290650Shselasky u8 syndrome[0x20]; 4664290650Shselasky 4665290650Shselasky u8 reserved_1[0x40]; 4666290650Shselasky 4667290650Shselasky struct mlx5_ifc_hca_vport_context_bits hca_vport_context; 4668290650Shselasky}; 4669290650Shselasky 4670290650Shselaskystruct mlx5_ifc_query_hca_vport_context_in_bits { 4671290650Shselasky u8 opcode[0x10]; 4672290650Shselasky u8 reserved_0[0x10]; 4673290650Shselasky 4674290650Shselasky u8 reserved_1[0x10]; 4675290650Shselasky u8 op_mod[0x10]; 4676290650Shselasky 4677290650Shselasky u8 other_vport[0x1]; 4678290650Shselasky u8 reserved_2[0xb]; 4679290650Shselasky u8 port_num[0x4]; 4680290650Shselasky u8 vport_number[0x10]; 4681290650Shselasky 4682290650Shselasky u8 reserved_3[0x20]; 4683290650Shselasky}; 4684290650Shselasky 4685290650Shselaskystruct mlx5_ifc_query_hca_cap_out_bits { 4686290650Shselasky u8 status[0x8]; 4687290650Shselasky u8 reserved_0[0x18]; 4688290650Shselasky 4689290650Shselasky u8 syndrome[0x20]; 4690290650Shselasky 4691290650Shselasky u8 reserved_1[0x40]; 4692290650Shselasky 4693290650Shselasky union mlx5_ifc_hca_cap_union_bits capability; 4694290650Shselasky}; 4695290650Shselasky 4696290650Shselaskystruct mlx5_ifc_query_hca_cap_in_bits { 4697290650Shselasky u8 opcode[0x10]; 4698290650Shselasky u8 reserved_0[0x10]; 4699290650Shselasky 4700290650Shselasky u8 reserved_1[0x10]; 4701290650Shselasky u8 op_mod[0x10]; 4702290650Shselasky 4703290650Shselasky u8 reserved_2[0x40]; 4704290650Shselasky}; 4705290650Shselasky 4706290650Shselaskystruct mlx5_ifc_query_flow_table_out_bits { 4707290650Shselasky u8 status[0x8]; 4708329200Shselasky u8 reserved_at_8[0x18]; 4709290650Shselasky 4710290650Shselasky u8 syndrome[0x20]; 4711290650Shselasky 4712329200Shselasky u8 reserved_at_40[0x80]; 4713290650Shselasky 4714329200Shselasky struct mlx5_ifc_flow_table_context_bits flow_table_context; 4715290650Shselasky}; 4716290650Shselasky 4717290650Shselaskystruct mlx5_ifc_query_flow_table_in_bits { 4718290650Shselasky u8 opcode[0x10]; 4719290650Shselasky u8 reserved_0[0x10]; 4720290650Shselasky 4721290650Shselasky u8 reserved_1[0x10]; 4722290650Shselasky u8 op_mod[0x10]; 4723290650Shselasky 4724290650Shselasky u8 other_vport[0x1]; 4725290650Shselasky u8 reserved_2[0xf]; 4726290650Shselasky u8 vport_number[0x10]; 4727290650Shselasky 4728290650Shselasky u8 reserved_3[0x20]; 4729290650Shselasky 4730290650Shselasky u8 table_type[0x8]; 4731290650Shselasky u8 reserved_4[0x18]; 4732290650Shselasky 4733290650Shselasky u8 reserved_5[0x8]; 4734290650Shselasky u8 table_id[0x18]; 4735290650Shselasky 4736290650Shselasky u8 reserved_6[0x140]; 4737290650Shselasky}; 4738290650Shselasky 4739290650Shselaskystruct mlx5_ifc_query_fte_out_bits { 4740290650Shselasky u8 status[0x8]; 4741290650Shselasky u8 reserved_0[0x18]; 4742290650Shselasky 4743290650Shselasky u8 syndrome[0x20]; 4744290650Shselasky 4745290650Shselasky u8 reserved_1[0x1c0]; 4746290650Shselasky 4747290650Shselasky struct mlx5_ifc_flow_context_bits flow_context; 4748290650Shselasky}; 4749290650Shselasky 4750290650Shselaskystruct mlx5_ifc_query_fte_in_bits { 4751290650Shselasky u8 opcode[0x10]; 4752290650Shselasky u8 reserved_0[0x10]; 4753290650Shselasky 4754290650Shselasky u8 reserved_1[0x10]; 4755290650Shselasky u8 op_mod[0x10]; 4756290650Shselasky 4757290650Shselasky u8 other_vport[0x1]; 4758290650Shselasky u8 reserved_2[0xf]; 4759290650Shselasky u8 vport_number[0x10]; 4760290650Shselasky 4761290650Shselasky u8 reserved_3[0x20]; 4762290650Shselasky 4763290650Shselasky u8 table_type[0x8]; 4764290650Shselasky u8 reserved_4[0x18]; 4765290650Shselasky 4766290650Shselasky u8 reserved_5[0x8]; 4767290650Shselasky u8 table_id[0x18]; 4768290650Shselasky 4769290650Shselasky u8 reserved_6[0x40]; 4770290650Shselasky 4771290650Shselasky u8 flow_index[0x20]; 4772290650Shselasky 4773290650Shselasky u8 reserved_7[0xe0]; 4774290650Shselasky}; 4775290650Shselasky 4776290650Shselaskyenum { 4777290650Shselasky MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0, 4778290650Shselasky MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1, 4779290650Shselasky MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2, 4780290650Shselasky}; 4781290650Shselasky 4782290650Shselaskystruct mlx5_ifc_query_flow_group_out_bits { 4783290650Shselasky u8 status[0x8]; 4784290650Shselasky u8 reserved_0[0x18]; 4785290650Shselasky 4786290650Shselasky u8 syndrome[0x20]; 4787290650Shselasky 4788290650Shselasky u8 reserved_1[0xa0]; 4789290650Shselasky 4790290650Shselasky u8 start_flow_index[0x20]; 4791290650Shselasky 4792290650Shselasky u8 reserved_2[0x20]; 4793290650Shselasky 4794290650Shselasky u8 end_flow_index[0x20]; 4795290650Shselasky 4796290650Shselasky u8 reserved_3[0xa0]; 4797290650Shselasky 4798290650Shselasky u8 reserved_4[0x18]; 4799290650Shselasky u8 match_criteria_enable[0x8]; 4800290650Shselasky 4801290650Shselasky struct mlx5_ifc_fte_match_param_bits match_criteria; 4802290650Shselasky 4803290650Shselasky u8 reserved_5[0xe00]; 4804290650Shselasky}; 4805290650Shselasky 4806290650Shselaskystruct mlx5_ifc_query_flow_group_in_bits { 4807290650Shselasky u8 opcode[0x10]; 4808290650Shselasky u8 reserved_0[0x10]; 4809290650Shselasky 4810290650Shselasky u8 reserved_1[0x10]; 4811290650Shselasky u8 op_mod[0x10]; 4812290650Shselasky 4813290650Shselasky u8 other_vport[0x1]; 4814290650Shselasky u8 reserved_2[0xf]; 4815290650Shselasky u8 vport_number[0x10]; 4816290650Shselasky 4817290650Shselasky u8 reserved_3[0x20]; 4818290650Shselasky 4819290650Shselasky u8 table_type[0x8]; 4820290650Shselasky u8 reserved_4[0x18]; 4821290650Shselasky 4822290650Shselasky u8 reserved_5[0x8]; 4823290650Shselasky u8 table_id[0x18]; 4824290650Shselasky 4825290650Shselasky u8 group_id[0x20]; 4826290650Shselasky 4827290650Shselasky u8 reserved_6[0x120]; 4828290650Shselasky}; 4829290650Shselasky 4830290650Shselaskystruct mlx5_ifc_query_flow_counter_out_bits { 4831290650Shselasky u8 status[0x8]; 4832329204Shselasky u8 reserved_at_8[0x18]; 4833290650Shselasky 4834290650Shselasky u8 syndrome[0x20]; 4835290650Shselasky 4836329204Shselasky u8 reserved_at_40[0x40]; 4837290650Shselasky 4838329204Shselasky struct mlx5_ifc_traffic_counter_bits flow_statistics[0]; 4839290650Shselasky}; 4840290650Shselasky 4841290650Shselaskystruct mlx5_ifc_query_flow_counter_in_bits { 4842290650Shselasky u8 opcode[0x10]; 4843329204Shselasky u8 reserved_at_10[0x10]; 4844290650Shselasky 4845329204Shselasky u8 reserved_at_20[0x10]; 4846290650Shselasky u8 op_mod[0x10]; 4847290650Shselasky 4848329204Shselasky u8 reserved_at_40[0x80]; 4849290650Shselasky 4850290650Shselasky u8 clear[0x1]; 4851329204Shselasky u8 reserved_at_c1[0xf]; 4852329204Shselasky u8 num_of_counters[0x10]; 4853290650Shselasky 4854329204Shselasky u8 reserved_at_e0[0x10]; 4855290650Shselasky u8 flow_counter_id[0x10]; 4856290650Shselasky}; 4857290650Shselasky 4858290650Shselaskystruct mlx5_ifc_query_esw_vport_context_out_bits { 4859290650Shselasky u8 status[0x8]; 4860290650Shselasky u8 reserved_0[0x18]; 4861290650Shselasky 4862290650Shselasky u8 syndrome[0x20]; 4863290650Shselasky 4864290650Shselasky u8 reserved_1[0x40]; 4865290650Shselasky 4866290650Shselasky struct mlx5_ifc_esw_vport_context_bits esw_vport_context; 4867290650Shselasky}; 4868290650Shselasky 4869290650Shselaskystruct mlx5_ifc_query_esw_vport_context_in_bits { 4870290650Shselasky u8 opcode[0x10]; 4871290650Shselasky u8 reserved_0[0x10]; 4872290650Shselasky 4873290650Shselasky u8 reserved_1[0x10]; 4874290650Shselasky u8 op_mod[0x10]; 4875290650Shselasky 4876290650Shselasky u8 other_vport[0x1]; 4877290650Shselasky u8 reserved_2[0xf]; 4878290650Shselasky u8 vport_number[0x10]; 4879290650Shselasky 4880290650Shselasky u8 reserved_3[0x20]; 4881290650Shselasky}; 4882290650Shselasky 4883290650Shselaskystruct mlx5_ifc_query_eq_out_bits { 4884290650Shselasky u8 status[0x8]; 4885290650Shselasky u8 reserved_0[0x18]; 4886290650Shselasky 4887290650Shselasky u8 syndrome[0x20]; 4888290650Shselasky 4889290650Shselasky u8 reserved_1[0x40]; 4890290650Shselasky 4891290650Shselasky struct mlx5_ifc_eqc_bits eq_context_entry; 4892290650Shselasky 4893290650Shselasky u8 reserved_2[0x40]; 4894290650Shselasky 4895290650Shselasky u8 event_bitmask[0x40]; 4896290650Shselasky 4897290650Shselasky u8 reserved_3[0x580]; 4898290650Shselasky 4899290650Shselasky u8 pas[0][0x40]; 4900290650Shselasky}; 4901290650Shselasky 4902290650Shselaskystruct mlx5_ifc_query_eq_in_bits { 4903290650Shselasky u8 opcode[0x10]; 4904290650Shselasky u8 reserved_0[0x10]; 4905290650Shselasky 4906290650Shselasky u8 reserved_1[0x10]; 4907290650Shselasky u8 op_mod[0x10]; 4908290650Shselasky 4909290650Shselasky u8 reserved_2[0x18]; 4910290650Shselasky u8 eq_number[0x8]; 4911290650Shselasky 4912290650Shselasky u8 reserved_3[0x20]; 4913290650Shselasky}; 4914290650Shselasky 4915290650Shselaskystruct mlx5_ifc_query_dct_out_bits { 4916290650Shselasky u8 status[0x8]; 4917290650Shselasky u8 reserved_0[0x18]; 4918290650Shselasky 4919290650Shselasky u8 syndrome[0x20]; 4920290650Shselasky 4921290650Shselasky u8 reserved_1[0x40]; 4922290650Shselasky 4923290650Shselasky struct mlx5_ifc_dctc_bits dct_context_entry; 4924290650Shselasky 4925290650Shselasky u8 reserved_2[0x180]; 4926290650Shselasky}; 4927290650Shselasky 4928290650Shselaskystruct mlx5_ifc_query_dct_in_bits { 4929290650Shselasky u8 opcode[0x10]; 4930290650Shselasky u8 reserved_0[0x10]; 4931290650Shselasky 4932290650Shselasky u8 reserved_1[0x10]; 4933290650Shselasky u8 op_mod[0x10]; 4934290650Shselasky 4935290650Shselasky u8 reserved_2[0x8]; 4936290650Shselasky u8 dctn[0x18]; 4937290650Shselasky 4938290650Shselasky u8 reserved_3[0x20]; 4939290650Shselasky}; 4940290650Shselasky 4941290650Shselaskystruct mlx5_ifc_query_dc_cnak_trace_out_bits { 4942290650Shselasky u8 status[0x8]; 4943290650Shselasky u8 reserved_0[0x18]; 4944290650Shselasky 4945290650Shselasky u8 syndrome[0x20]; 4946290650Shselasky 4947290650Shselasky u8 enable[0x1]; 4948290650Shselasky u8 reserved_1[0x1f]; 4949290650Shselasky 4950290650Shselasky u8 reserved_2[0x160]; 4951290650Shselasky 4952290650Shselasky struct mlx5_ifc_cmd_pas_bits pas; 4953290650Shselasky}; 4954290650Shselasky 4955290650Shselaskystruct mlx5_ifc_query_dc_cnak_trace_in_bits { 4956290650Shselasky u8 opcode[0x10]; 4957290650Shselasky u8 reserved_0[0x10]; 4958290650Shselasky 4959290650Shselasky u8 reserved_1[0x10]; 4960290650Shselasky u8 op_mod[0x10]; 4961290650Shselasky 4962290650Shselasky u8 reserved_2[0x40]; 4963290650Shselasky}; 4964290650Shselasky 4965290650Shselaskystruct mlx5_ifc_query_cq_out_bits { 4966290650Shselasky u8 status[0x8]; 4967290650Shselasky u8 reserved_0[0x18]; 4968290650Shselasky 4969290650Shselasky u8 syndrome[0x20]; 4970290650Shselasky 4971290650Shselasky u8 reserved_1[0x40]; 4972290650Shselasky 4973290650Shselasky struct mlx5_ifc_cqc_bits cq_context; 4974290650Shselasky 4975290650Shselasky u8 reserved_2[0x600]; 4976290650Shselasky 4977290650Shselasky u8 pas[0][0x40]; 4978290650Shselasky}; 4979290650Shselasky 4980290650Shselaskystruct mlx5_ifc_query_cq_in_bits { 4981290650Shselasky u8 opcode[0x10]; 4982290650Shselasky u8 reserved_0[0x10]; 4983290650Shselasky 4984290650Shselasky u8 reserved_1[0x10]; 4985290650Shselasky u8 op_mod[0x10]; 4986290650Shselasky 4987290650Shselasky u8 reserved_2[0x8]; 4988290650Shselasky u8 cqn[0x18]; 4989290650Shselasky 4990290650Shselasky u8 reserved_3[0x20]; 4991290650Shselasky}; 4992290650Shselasky 4993290650Shselaskystruct mlx5_ifc_query_cong_status_out_bits { 4994290650Shselasky u8 status[0x8]; 4995290650Shselasky u8 reserved_0[0x18]; 4996290650Shselasky 4997290650Shselasky u8 syndrome[0x20]; 4998290650Shselasky 4999290650Shselasky u8 reserved_1[0x20]; 5000290650Shselasky 5001290650Shselasky u8 enable[0x1]; 5002290650Shselasky u8 tag_enable[0x1]; 5003290650Shselasky u8 reserved_2[0x1e]; 5004290650Shselasky}; 5005290650Shselasky 5006290650Shselaskystruct mlx5_ifc_query_cong_status_in_bits { 5007290650Shselasky u8 opcode[0x10]; 5008290650Shselasky u8 reserved_0[0x10]; 5009290650Shselasky 5010290650Shselasky u8 reserved_1[0x10]; 5011290650Shselasky u8 op_mod[0x10]; 5012290650Shselasky 5013290650Shselasky u8 reserved_2[0x18]; 5014290650Shselasky u8 priority[0x4]; 5015290650Shselasky u8 cong_protocol[0x4]; 5016290650Shselasky 5017290650Shselasky u8 reserved_3[0x20]; 5018290650Shselasky}; 5019290650Shselasky 5020290650Shselaskystruct mlx5_ifc_query_cong_statistics_out_bits { 5021290650Shselasky u8 status[0x8]; 5022290650Shselasky u8 reserved_0[0x18]; 5023290650Shselasky 5024290650Shselasky u8 syndrome[0x20]; 5025290650Shselasky 5026290650Shselasky u8 reserved_1[0x40]; 5027290650Shselasky 5028331808Shselasky u8 rp_cur_flows[0x20]; 5029290650Shselasky 5030290650Shselasky u8 sum_flows[0x20]; 5031290650Shselasky 5032331808Shselasky u8 rp_cnp_ignored_high[0x20]; 5033290650Shselasky 5034331808Shselasky u8 rp_cnp_ignored_low[0x20]; 5035290650Shselasky 5036331808Shselasky u8 rp_cnp_handled_high[0x20]; 5037290650Shselasky 5038331808Shselasky u8 rp_cnp_handled_low[0x20]; 5039290650Shselasky 5040290650Shselasky u8 reserved_2[0x100]; 5041290650Shselasky 5042290650Shselasky u8 time_stamp_high[0x20]; 5043290650Shselasky 5044290650Shselasky u8 time_stamp_low[0x20]; 5045290650Shselasky 5046290650Shselasky u8 accumulators_period[0x20]; 5047290650Shselasky 5048331808Shselasky u8 np_ecn_marked_roce_packets_high[0x20]; 5049290650Shselasky 5050331808Shselasky u8 np_ecn_marked_roce_packets_low[0x20]; 5051290650Shselasky 5052331808Shselasky u8 np_cnp_sent_high[0x20]; 5053290650Shselasky 5054331808Shselasky u8 np_cnp_sent_low[0x20]; 5055290650Shselasky 5056290650Shselasky u8 reserved_3[0x560]; 5057290650Shselasky}; 5058290650Shselasky 5059290650Shselaskystruct mlx5_ifc_query_cong_statistics_in_bits { 5060290650Shselasky u8 opcode[0x10]; 5061290650Shselasky u8 reserved_0[0x10]; 5062290650Shselasky 5063290650Shselasky u8 reserved_1[0x10]; 5064290650Shselasky u8 op_mod[0x10]; 5065290650Shselasky 5066290650Shselasky u8 clear[0x1]; 5067290650Shselasky u8 reserved_2[0x1f]; 5068290650Shselasky 5069290650Shselasky u8 reserved_3[0x20]; 5070290650Shselasky}; 5071290650Shselasky 5072290650Shselaskystruct mlx5_ifc_query_cong_params_out_bits { 5073290650Shselasky u8 status[0x8]; 5074290650Shselasky u8 reserved_0[0x18]; 5075290650Shselasky 5076290650Shselasky u8 syndrome[0x20]; 5077290650Shselasky 5078290650Shselasky u8 reserved_1[0x40]; 5079290650Shselasky 5080290650Shselasky union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters; 5081290650Shselasky}; 5082290650Shselasky 5083290650Shselaskystruct mlx5_ifc_query_cong_params_in_bits { 5084290650Shselasky u8 opcode[0x10]; 5085290650Shselasky u8 reserved_0[0x10]; 5086290650Shselasky 5087290650Shselasky u8 reserved_1[0x10]; 5088290650Shselasky u8 op_mod[0x10]; 5089290650Shselasky 5090290650Shselasky u8 reserved_2[0x1c]; 5091290650Shselasky u8 cong_protocol[0x4]; 5092290650Shselasky 5093290650Shselasky u8 reserved_3[0x20]; 5094290650Shselasky}; 5095290650Shselasky 5096290650Shselaskystruct mlx5_ifc_query_burst_size_out_bits { 5097290650Shselasky u8 status[0x8]; 5098290650Shselasky u8 reserved_0[0x18]; 5099290650Shselasky 5100290650Shselasky u8 syndrome[0x20]; 5101290650Shselasky 5102290650Shselasky u8 reserved_1[0x20]; 5103290650Shselasky 5104290650Shselasky u8 reserved_2[0x9]; 5105290650Shselasky u8 device_burst_size[0x17]; 5106290650Shselasky}; 5107290650Shselasky 5108290650Shselaskystruct mlx5_ifc_query_burst_size_in_bits { 5109290650Shselasky u8 opcode[0x10]; 5110290650Shselasky u8 reserved_0[0x10]; 5111290650Shselasky 5112290650Shselasky u8 reserved_1[0x10]; 5113290650Shselasky u8 op_mod[0x10]; 5114290650Shselasky 5115290650Shselasky u8 reserved_2[0x40]; 5116290650Shselasky}; 5117290650Shselasky 5118290650Shselaskystruct mlx5_ifc_query_adapter_out_bits { 5119290650Shselasky u8 status[0x8]; 5120290650Shselasky u8 reserved_0[0x18]; 5121290650Shselasky 5122290650Shselasky u8 syndrome[0x20]; 5123290650Shselasky 5124290650Shselasky u8 reserved_1[0x40]; 5125290650Shselasky 5126290650Shselasky struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct; 5127290650Shselasky}; 5128290650Shselasky 5129290650Shselaskystruct mlx5_ifc_query_adapter_in_bits { 5130290650Shselasky u8 opcode[0x10]; 5131290650Shselasky u8 reserved_0[0x10]; 5132290650Shselasky 5133290650Shselasky u8 reserved_1[0x10]; 5134290650Shselasky u8 op_mod[0x10]; 5135290650Shselasky 5136290650Shselasky u8 reserved_2[0x40]; 5137290650Shselasky}; 5138290650Shselasky 5139290650Shselaskystruct mlx5_ifc_qp_2rst_out_bits { 5140290650Shselasky u8 status[0x8]; 5141290650Shselasky u8 reserved_0[0x18]; 5142290650Shselasky 5143290650Shselasky u8 syndrome[0x20]; 5144290650Shselasky 5145290650Shselasky u8 reserved_1[0x40]; 5146290650Shselasky}; 5147290650Shselasky 5148290650Shselaskystruct mlx5_ifc_qp_2rst_in_bits { 5149290650Shselasky u8 opcode[0x10]; 5150290650Shselasky u8 reserved_0[0x10]; 5151290650Shselasky 5152290650Shselasky u8 reserved_1[0x10]; 5153290650Shselasky u8 op_mod[0x10]; 5154290650Shselasky 5155290650Shselasky u8 reserved_2[0x8]; 5156290650Shselasky u8 qpn[0x18]; 5157290650Shselasky 5158290650Shselasky u8 reserved_3[0x20]; 5159290650Shselasky}; 5160290650Shselasky 5161290650Shselaskystruct mlx5_ifc_qp_2err_out_bits { 5162290650Shselasky u8 status[0x8]; 5163290650Shselasky u8 reserved_0[0x18]; 5164290650Shselasky 5165290650Shselasky u8 syndrome[0x20]; 5166290650Shselasky 5167290650Shselasky u8 reserved_1[0x40]; 5168290650Shselasky}; 5169290650Shselasky 5170290650Shselaskystruct mlx5_ifc_qp_2err_in_bits { 5171290650Shselasky u8 opcode[0x10]; 5172290650Shselasky u8 reserved_0[0x10]; 5173290650Shselasky 5174290650Shselasky u8 reserved_1[0x10]; 5175290650Shselasky u8 op_mod[0x10]; 5176290650Shselasky 5177290650Shselasky u8 reserved_2[0x8]; 5178290650Shselasky u8 qpn[0x18]; 5179290650Shselasky 5180290650Shselasky u8 reserved_3[0x20]; 5181290650Shselasky}; 5182290650Shselasky 5183308678Shselaskystruct mlx5_ifc_para_vport_element_bits { 5184308678Shselasky u8 reserved_at_0[0xc]; 5185308678Shselasky u8 traffic_class[0x4]; 5186308678Shselasky u8 qos_para_vport_number[0x10]; 5187308678Shselasky}; 5188308678Shselasky 5189290650Shselaskystruct mlx5_ifc_page_fault_resume_out_bits { 5190290650Shselasky u8 status[0x8]; 5191290650Shselasky u8 reserved_0[0x18]; 5192290650Shselasky 5193290650Shselasky u8 syndrome[0x20]; 5194290650Shselasky 5195290650Shselasky u8 reserved_1[0x40]; 5196290650Shselasky}; 5197290650Shselasky 5198290650Shselaskystruct mlx5_ifc_page_fault_resume_in_bits { 5199290650Shselasky u8 opcode[0x10]; 5200290650Shselasky u8 reserved_0[0x10]; 5201290650Shselasky 5202290650Shselasky u8 reserved_1[0x10]; 5203290650Shselasky u8 op_mod[0x10]; 5204290650Shselasky 5205290650Shselasky u8 error[0x1]; 5206290650Shselasky u8 reserved_2[0x4]; 5207290650Shselasky u8 rdma[0x1]; 5208290650Shselasky u8 read_write[0x1]; 5209290650Shselasky u8 req_res[0x1]; 5210290650Shselasky u8 qpn[0x18]; 5211290650Shselasky 5212290650Shselasky u8 reserved_3[0x20]; 5213290650Shselasky}; 5214290650Shselasky 5215290650Shselaskystruct mlx5_ifc_nop_out_bits { 5216290650Shselasky u8 status[0x8]; 5217290650Shselasky u8 reserved_0[0x18]; 5218290650Shselasky 5219290650Shselasky u8 syndrome[0x20]; 5220290650Shselasky 5221290650Shselasky u8 reserved_1[0x40]; 5222290650Shselasky}; 5223290650Shselasky 5224290650Shselaskystruct mlx5_ifc_nop_in_bits { 5225290650Shselasky u8 opcode[0x10]; 5226290650Shselasky u8 reserved_0[0x10]; 5227290650Shselasky 5228290650Shselasky u8 reserved_1[0x10]; 5229290650Shselasky u8 op_mod[0x10]; 5230290650Shselasky 5231290650Shselasky u8 reserved_2[0x40]; 5232290650Shselasky}; 5233290650Shselasky 5234290650Shselaskystruct mlx5_ifc_modify_vport_state_out_bits { 5235290650Shselasky u8 status[0x8]; 5236290650Shselasky u8 reserved_0[0x18]; 5237290650Shselasky 5238290650Shselasky u8 syndrome[0x20]; 5239290650Shselasky 5240290650Shselasky u8 reserved_1[0x40]; 5241290650Shselasky}; 5242290650Shselasky 5243290650Shselaskyenum { 5244290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_NIC_VPORT = 0x0, 5245290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1, 5246290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_OP_MOD_UPLINK = 0x2, 5247290650Shselasky}; 5248290650Shselasky 5249290650Shselaskyenum { 5250290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_DOWN = 0x0, 5251290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_UP = 0x1, 5252290650Shselasky MLX5_MODIFY_VPORT_STATE_IN_ADMIN_STATE_FOLLOW = 0x2, 5253290650Shselasky}; 5254290650Shselasky 5255290650Shselaskystruct mlx5_ifc_modify_vport_state_in_bits { 5256290650Shselasky u8 opcode[0x10]; 5257290650Shselasky u8 reserved_0[0x10]; 5258290650Shselasky 5259290650Shselasky u8 reserved_1[0x10]; 5260290650Shselasky u8 op_mod[0x10]; 5261290650Shselasky 5262290650Shselasky u8 other_vport[0x1]; 5263290650Shselasky u8 reserved_2[0xf]; 5264290650Shselasky u8 vport_number[0x10]; 5265290650Shselasky 5266290650Shselasky u8 reserved_3[0x18]; 5267290650Shselasky u8 admin_state[0x4]; 5268290650Shselasky u8 reserved_4[0x4]; 5269290650Shselasky}; 5270290650Shselasky 5271290650Shselaskystruct mlx5_ifc_modify_tis_out_bits { 5272290650Shselasky u8 status[0x8]; 5273290650Shselasky u8 reserved_0[0x18]; 5274290650Shselasky 5275290650Shselasky u8 syndrome[0x20]; 5276290650Shselasky 5277290650Shselasky u8 reserved_1[0x40]; 5278290650Shselasky}; 5279290650Shselasky 5280329204Shselaskystruct mlx5_ifc_modify_tis_bitmask_bits { 5281329204Shselasky u8 reserved_at_0[0x20]; 5282329204Shselasky 5283329204Shselasky u8 reserved_at_20[0x1d]; 5284329204Shselasky u8 lag_tx_port_affinity[0x1]; 5285329204Shselasky u8 strict_lag_tx_port_affinity[0x1]; 5286329204Shselasky u8 prio[0x1]; 5287329204Shselasky}; 5288329204Shselasky 5289290650Shselaskystruct mlx5_ifc_modify_tis_in_bits { 5290290650Shselasky u8 opcode[0x10]; 5291290650Shselasky u8 reserved_0[0x10]; 5292290650Shselasky 5293290650Shselasky u8 reserved_1[0x10]; 5294290650Shselasky u8 op_mod[0x10]; 5295290650Shselasky 5296290650Shselasky u8 reserved_2[0x8]; 5297290650Shselasky u8 tisn[0x18]; 5298290650Shselasky 5299290650Shselasky u8 reserved_3[0x20]; 5300290650Shselasky 5301329204Shselasky struct mlx5_ifc_modify_tis_bitmask_bits bitmask; 5302290650Shselasky 5303290650Shselasky u8 reserved_4[0x40]; 5304290650Shselasky 5305290650Shselasky struct mlx5_ifc_tisc_bits ctx; 5306290650Shselasky}; 5307290650Shselasky 5308290650Shselaskystruct mlx5_ifc_modify_tir_out_bits { 5309290650Shselasky u8 status[0x8]; 5310290650Shselasky u8 reserved_0[0x18]; 5311290650Shselasky 5312290650Shselasky u8 syndrome[0x20]; 5313290650Shselasky 5314290650Shselasky u8 reserved_1[0x40]; 5315290650Shselasky}; 5316290650Shselasky 5317308678Shselaskyenum 5318308678Shselasky{ 5319308678Shselasky MLX5_MODIFY_SQ_BITMASK_PACKET_PACING_RATE_LIMIT_INDEX = 0x1 << 0, 5320308678Shselasky MLX5_MODIFY_SQ_BITMASK_QOS_PARA_VPORT_NUMBER = 0x1 << 1 5321308678Shselasky}; 5322308678Shselasky 5323290650Shselaskystruct mlx5_ifc_modify_tir_in_bits { 5324290650Shselasky u8 opcode[0x10]; 5325290650Shselasky u8 reserved_0[0x10]; 5326290650Shselasky 5327290650Shselasky u8 reserved_1[0x10]; 5328290650Shselasky u8 op_mod[0x10]; 5329290650Shselasky 5330290650Shselasky u8 reserved_2[0x8]; 5331290650Shselasky u8 tirn[0x18]; 5332290650Shselasky 5333290650Shselasky u8 reserved_3[0x20]; 5334290650Shselasky 5335290650Shselasky u8 modify_bitmask[0x40]; 5336290650Shselasky 5337290650Shselasky u8 reserved_4[0x40]; 5338290650Shselasky 5339290650Shselasky struct mlx5_ifc_tirc_bits tir_context; 5340290650Shselasky}; 5341290650Shselasky 5342290650Shselaskystruct mlx5_ifc_modify_sq_out_bits { 5343290650Shselasky u8 status[0x8]; 5344290650Shselasky u8 reserved_0[0x18]; 5345290650Shselasky 5346290650Shselasky u8 syndrome[0x20]; 5347290650Shselasky 5348290650Shselasky u8 reserved_1[0x40]; 5349290650Shselasky}; 5350290650Shselasky 5351290650Shselaskystruct mlx5_ifc_modify_sq_in_bits { 5352290650Shselasky u8 opcode[0x10]; 5353290650Shselasky u8 reserved_0[0x10]; 5354290650Shselasky 5355290650Shselasky u8 reserved_1[0x10]; 5356290650Shselasky u8 op_mod[0x10]; 5357290650Shselasky 5358290650Shselasky u8 sq_state[0x4]; 5359290650Shselasky u8 reserved_2[0x4]; 5360290650Shselasky u8 sqn[0x18]; 5361290650Shselasky 5362290650Shselasky u8 reserved_3[0x20]; 5363290650Shselasky 5364290650Shselasky u8 modify_bitmask[0x40]; 5365290650Shselasky 5366290650Shselasky u8 reserved_4[0x40]; 5367290650Shselasky 5368290650Shselasky struct mlx5_ifc_sqc_bits ctx; 5369290650Shselasky}; 5370290650Shselasky 5371308678Shselaskystruct mlx5_ifc_modify_scheduling_element_out_bits { 5372308678Shselasky u8 status[0x8]; 5373308678Shselasky u8 reserved_at_8[0x18]; 5374308678Shselasky 5375308678Shselasky u8 syndrome[0x20]; 5376308678Shselasky 5377308678Shselasky u8 reserved_at_40[0x1c0]; 5378308678Shselasky}; 5379308678Shselasky 5380308678Shselaskyenum { 5381308678Shselasky MLX5_MODIFY_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH = 0x2, 5382308678Shselasky}; 5383308678Shselasky 5384308678Shselaskyenum { 5385308678Shselasky MLX5_MODIFY_SCHEDULING_ELEMENT_BITMASK_BW_SHARE = 0x1, 5386308678Shselasky MLX5_MODIFY_SCHEDULING_ELEMENT_BITMASK_MAX_AVERAGE_BW = 0x2, 5387308678Shselasky}; 5388308678Shselasky 5389308678Shselaskystruct mlx5_ifc_modify_scheduling_element_in_bits { 5390308678Shselasky u8 opcode[0x10]; 5391308678Shselasky u8 reserved_at_10[0x10]; 5392308678Shselasky 5393308678Shselasky u8 reserved_at_20[0x10]; 5394308678Shselasky u8 op_mod[0x10]; 5395308678Shselasky 5396308678Shselasky u8 scheduling_hierarchy[0x8]; 5397308678Shselasky u8 reserved_at_48[0x18]; 5398308678Shselasky 5399308678Shselasky u8 scheduling_element_id[0x20]; 5400308678Shselasky 5401308678Shselasky u8 reserved_at_80[0x20]; 5402308678Shselasky 5403308678Shselasky u8 modify_bitmask[0x20]; 5404308678Shselasky 5405308678Shselasky u8 reserved_at_c0[0x40]; 5406308678Shselasky 5407308678Shselasky struct mlx5_ifc_scheduling_context_bits scheduling_context; 5408308678Shselasky 5409308678Shselasky u8 reserved_at_300[0x100]; 5410308678Shselasky}; 5411308678Shselasky 5412290650Shselaskystruct mlx5_ifc_modify_rqt_out_bits { 5413290650Shselasky u8 status[0x8]; 5414290650Shselasky u8 reserved_0[0x18]; 5415290650Shselasky 5416290650Shselasky u8 syndrome[0x20]; 5417290650Shselasky 5418290650Shselasky u8 reserved_1[0x40]; 5419290650Shselasky}; 5420290650Shselasky 5421290650Shselaskystruct mlx5_ifc_modify_rqt_in_bits { 5422290650Shselasky u8 opcode[0x10]; 5423290650Shselasky u8 reserved_0[0x10]; 5424290650Shselasky 5425290650Shselasky u8 reserved_1[0x10]; 5426290650Shselasky u8 op_mod[0x10]; 5427290650Shselasky 5428290650Shselasky u8 reserved_2[0x8]; 5429290650Shselasky u8 rqtn[0x18]; 5430290650Shselasky 5431290650Shselasky u8 reserved_3[0x20]; 5432290650Shselasky 5433290650Shselasky u8 modify_bitmask[0x40]; 5434290650Shselasky 5435290650Shselasky u8 reserved_4[0x40]; 5436290650Shselasky 5437290650Shselasky struct mlx5_ifc_rqtc_bits ctx; 5438290650Shselasky}; 5439290650Shselasky 5440290650Shselaskystruct mlx5_ifc_modify_rq_out_bits { 5441290650Shselasky u8 status[0x8]; 5442290650Shselasky u8 reserved_0[0x18]; 5443290650Shselasky 5444290650Shselasky u8 syndrome[0x20]; 5445290650Shselasky 5446290650Shselasky u8 reserved_1[0x40]; 5447290650Shselasky}; 5448290650Shselasky 5449329204Shselaskyenum { 5450329204Shselasky MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1, 5451329204Shselasky MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_MODIFY_RQ_COUNTER_SET_ID = 1ULL << 3, 5452306233Shselasky}; 5453306233Shselasky 5454290650Shselaskystruct mlx5_ifc_modify_rq_in_bits { 5455290650Shselasky u8 opcode[0x10]; 5456290650Shselasky u8 reserved_0[0x10]; 5457290650Shselasky 5458290650Shselasky u8 reserved_1[0x10]; 5459290650Shselasky u8 op_mod[0x10]; 5460290650Shselasky 5461290650Shselasky u8 rq_state[0x4]; 5462290650Shselasky u8 reserved_2[0x4]; 5463290650Shselasky u8 rqn[0x18]; 5464290650Shselasky 5465290650Shselasky u8 reserved_3[0x20]; 5466290650Shselasky 5467329204Shselasky u8 modify_bitmask[0x40]; 5468290650Shselasky 5469290650Shselasky u8 reserved_4[0x40]; 5470290650Shselasky 5471290650Shselasky struct mlx5_ifc_rqc_bits ctx; 5472290650Shselasky}; 5473290650Shselasky 5474290650Shselaskystruct mlx5_ifc_modify_rmp_out_bits { 5475290650Shselasky u8 status[0x8]; 5476290650Shselasky u8 reserved_0[0x18]; 5477290650Shselasky 5478290650Shselasky u8 syndrome[0x20]; 5479290650Shselasky 5480290650Shselasky u8 reserved_1[0x40]; 5481290650Shselasky}; 5482290650Shselasky 5483290650Shselaskystruct mlx5_ifc_rmp_bitmask_bits { 5484290650Shselasky u8 reserved[0x20]; 5485290650Shselasky 5486290650Shselasky u8 reserved1[0x1f]; 5487290650Shselasky u8 lwm[0x1]; 5488290650Shselasky}; 5489290650Shselasky 5490290650Shselaskystruct mlx5_ifc_modify_rmp_in_bits { 5491290650Shselasky u8 opcode[0x10]; 5492290650Shselasky u8 reserved_0[0x10]; 5493290650Shselasky 5494290650Shselasky u8 reserved_1[0x10]; 5495290650Shselasky u8 op_mod[0x10]; 5496290650Shselasky 5497290650Shselasky u8 rmp_state[0x4]; 5498290650Shselasky u8 reserved_2[0x4]; 5499290650Shselasky u8 rmpn[0x18]; 5500290650Shselasky 5501290650Shselasky u8 reserved_3[0x20]; 5502290650Shselasky 5503290650Shselasky struct mlx5_ifc_rmp_bitmask_bits bitmask; 5504290650Shselasky 5505290650Shselasky u8 reserved_4[0x40]; 5506290650Shselasky 5507290650Shselasky struct mlx5_ifc_rmpc_bits ctx; 5508290650Shselasky}; 5509290650Shselasky 5510290650Shselaskystruct mlx5_ifc_modify_nic_vport_context_out_bits { 5511290650Shselasky u8 status[0x8]; 5512290650Shselasky u8 reserved_0[0x18]; 5513290650Shselasky 5514290650Shselasky u8 syndrome[0x20]; 5515290650Shselasky 5516290650Shselasky u8 reserved_1[0x40]; 5517290650Shselasky}; 5518290650Shselasky 5519290650Shselaskystruct mlx5_ifc_modify_nic_vport_field_select_bits { 5520321992Shselasky u8 reserved_0[0x14]; 5521321992Shselasky u8 disable_uc_local_lb[0x1]; 5522321992Shselasky u8 disable_mc_local_lb[0x1]; 5523306233Shselasky u8 node_guid[0x1]; 5524306233Shselasky u8 port_guid[0x1]; 5525290650Shselasky u8 min_wqe_inline_mode[0x1]; 5526290650Shselasky u8 mtu[0x1]; 5527290650Shselasky u8 change_event[0x1]; 5528290650Shselasky u8 promisc[0x1]; 5529290650Shselasky u8 permanent_address[0x1]; 5530290650Shselasky u8 addresses_list[0x1]; 5531290650Shselasky u8 roce_en[0x1]; 5532290650Shselasky u8 reserved_1[0x1]; 5533290650Shselasky}; 5534290650Shselasky 5535290650Shselaskystruct mlx5_ifc_modify_nic_vport_context_in_bits { 5536290650Shselasky u8 opcode[0x10]; 5537290650Shselasky u8 reserved_0[0x10]; 5538290650Shselasky 5539290650Shselasky u8 reserved_1[0x10]; 5540290650Shselasky u8 op_mod[0x10]; 5541290650Shselasky 5542290650Shselasky u8 other_vport[0x1]; 5543290650Shselasky u8 reserved_2[0xf]; 5544290650Shselasky u8 vport_number[0x10]; 5545290650Shselasky 5546290650Shselasky struct mlx5_ifc_modify_nic_vport_field_select_bits field_select; 5547290650Shselasky 5548290650Shselasky u8 reserved_3[0x780]; 5549290650Shselasky 5550290650Shselasky struct mlx5_ifc_nic_vport_context_bits nic_vport_context; 5551290650Shselasky}; 5552290650Shselasky 5553290650Shselaskystruct mlx5_ifc_modify_hca_vport_context_out_bits { 5554290650Shselasky u8 status[0x8]; 5555290650Shselasky u8 reserved_0[0x18]; 5556290650Shselasky 5557290650Shselasky u8 syndrome[0x20]; 5558290650Shselasky 5559290650Shselasky u8 reserved_1[0x40]; 5560290650Shselasky}; 5561290650Shselasky 5562306233Shselaskystruct mlx5_ifc_grh_bits { 5563306233Shselasky u8 ip_version[4]; 5564306233Shselasky u8 traffic_class[8]; 5565306233Shselasky u8 flow_label[20]; 5566306233Shselasky u8 payload_length[16]; 5567306233Shselasky u8 next_header[8]; 5568306233Shselasky u8 hop_limit[8]; 5569306233Shselasky u8 sgid[128]; 5570306233Shselasky u8 dgid[128]; 5571306233Shselasky}; 5572306233Shselasky 5573306233Shselaskystruct mlx5_ifc_bth_bits { 5574306233Shselasky u8 opcode[8]; 5575306233Shselasky u8 se[1]; 5576306233Shselasky u8 migreq[1]; 5577306233Shselasky u8 pad_count[2]; 5578306233Shselasky u8 tver[4]; 5579306233Shselasky u8 p_key[16]; 5580306233Shselasky u8 reserved8[8]; 5581306233Shselasky u8 dest_qp[24]; 5582306233Shselasky u8 ack_req[1]; 5583306233Shselasky u8 reserved7[7]; 5584306233Shselasky u8 psn[24]; 5585306233Shselasky}; 5586306233Shselasky 5587306233Shselaskystruct mlx5_ifc_aeth_bits { 5588306233Shselasky u8 syndrome[8]; 5589306233Shselasky u8 msn[24]; 5590306233Shselasky}; 5591306233Shselasky 5592306233Shselaskystruct mlx5_ifc_dceth_bits { 5593306233Shselasky u8 reserved0[8]; 5594306233Shselasky u8 session_id[24]; 5595306233Shselasky u8 reserved1[8]; 5596306233Shselasky u8 dci_dct[24]; 5597306233Shselasky}; 5598306233Shselasky 5599290650Shselaskystruct mlx5_ifc_modify_hca_vport_context_in_bits { 5600290650Shselasky u8 opcode[0x10]; 5601290650Shselasky u8 reserved_0[0x10]; 5602290650Shselasky 5603290650Shselasky u8 reserved_1[0x10]; 5604290650Shselasky u8 op_mod[0x10]; 5605290650Shselasky 5606290650Shselasky u8 other_vport[0x1]; 5607290650Shselasky u8 reserved_2[0xb]; 5608290650Shselasky u8 port_num[0x4]; 5609290650Shselasky u8 vport_number[0x10]; 5610290650Shselasky 5611290650Shselasky u8 reserved_3[0x20]; 5612290650Shselasky 5613290650Shselasky struct mlx5_ifc_hca_vport_context_bits hca_vport_context; 5614290650Shselasky}; 5615290650Shselasky 5616329200Shselaskystruct mlx5_ifc_modify_flow_table_out_bits { 5617329200Shselasky u8 status[0x8]; 5618329200Shselasky u8 reserved_at_8[0x18]; 5619329200Shselasky 5620329200Shselasky u8 syndrome[0x20]; 5621329200Shselasky 5622329200Shselasky u8 reserved_at_40[0x40]; 5623329200Shselasky}; 5624329200Shselasky 5625329200Shselaskyenum { 5626329200Shselasky MLX5_MODIFY_FLOW_TABLE_SELECT_MISS_ACTION_AND_ID = 0x1, 5627329200Shselasky MLX5_MODIFY_FLOW_TABLE_SELECT_LAG_MASTER_NEXT_TABLE_ID = 0x8000, 5628329200Shselasky}; 5629329200Shselasky 5630329200Shselaskystruct mlx5_ifc_modify_flow_table_in_bits { 5631329200Shselasky u8 opcode[0x10]; 5632329200Shselasky u8 reserved_at_10[0x10]; 5633329200Shselasky 5634329200Shselasky u8 reserved_at_20[0x10]; 5635329200Shselasky u8 op_mod[0x10]; 5636329200Shselasky 5637329200Shselasky u8 other_vport[0x1]; 5638329200Shselasky u8 reserved_at_41[0xf]; 5639329200Shselasky u8 vport_number[0x10]; 5640329200Shselasky 5641329200Shselasky u8 reserved_at_60[0x10]; 5642329200Shselasky u8 modify_field_select[0x10]; 5643329200Shselasky 5644329200Shselasky u8 table_type[0x8]; 5645329200Shselasky u8 reserved_at_88[0x18]; 5646329200Shselasky 5647329200Shselasky u8 reserved_at_a0[0x8]; 5648329200Shselasky u8 table_id[0x18]; 5649329200Shselasky 5650329200Shselasky struct mlx5_ifc_flow_table_context_bits flow_table_context; 5651329200Shselasky}; 5652329200Shselasky 5653290650Shselaskystruct mlx5_ifc_modify_esw_vport_context_out_bits { 5654290650Shselasky u8 status[0x8]; 5655290650Shselasky u8 reserved_0[0x18]; 5656290650Shselasky 5657290650Shselasky u8 syndrome[0x20]; 5658290650Shselasky 5659290650Shselasky u8 reserved_1[0x40]; 5660290650Shselasky}; 5661290650Shselasky 5662306233Shselaskystruct mlx5_ifc_esw_vport_context_fields_select_bits { 5663306233Shselasky u8 reserved[0x1c]; 5664306233Shselasky u8 vport_cvlan_insert[0x1]; 5665306233Shselasky u8 vport_svlan_insert[0x1]; 5666306233Shselasky u8 vport_cvlan_strip[0x1]; 5667306233Shselasky u8 vport_svlan_strip[0x1]; 5668306233Shselasky}; 5669306233Shselasky 5670290650Shselaskystruct mlx5_ifc_modify_esw_vport_context_in_bits { 5671290650Shselasky u8 opcode[0x10]; 5672290650Shselasky u8 reserved_0[0x10]; 5673290650Shselasky 5674290650Shselasky u8 reserved_1[0x10]; 5675290650Shselasky u8 op_mod[0x10]; 5676290650Shselasky 5677290650Shselasky u8 other_vport[0x1]; 5678290650Shselasky u8 reserved_2[0xf]; 5679290650Shselasky u8 vport_number[0x10]; 5680290650Shselasky 5681306233Shselasky struct mlx5_ifc_esw_vport_context_fields_select_bits field_select; 5682290650Shselasky 5683290650Shselasky struct mlx5_ifc_esw_vport_context_bits esw_vport_context; 5684290650Shselasky}; 5685290650Shselasky 5686290650Shselaskystruct mlx5_ifc_modify_cq_out_bits { 5687290650Shselasky u8 status[0x8]; 5688290650Shselasky u8 reserved_0[0x18]; 5689290650Shselasky 5690290650Shselasky u8 syndrome[0x20]; 5691290650Shselasky 5692290650Shselasky u8 reserved_1[0x40]; 5693290650Shselasky}; 5694290650Shselasky 5695290650Shselaskyenum { 5696290650Shselasky MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0, 5697290650Shselasky MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1, 5698290650Shselasky}; 5699290650Shselasky 5700290650Shselaskystruct mlx5_ifc_modify_cq_in_bits { 5701290650Shselasky u8 opcode[0x10]; 5702290650Shselasky u8 reserved_0[0x10]; 5703290650Shselasky 5704290650Shselasky u8 reserved_1[0x10]; 5705290650Shselasky u8 op_mod[0x10]; 5706290650Shselasky 5707290650Shselasky u8 reserved_2[0x8]; 5708290650Shselasky u8 cqn[0x18]; 5709290650Shselasky 5710290650Shselasky union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select; 5711290650Shselasky 5712290650Shselasky struct mlx5_ifc_cqc_bits cq_context; 5713290650Shselasky 5714290650Shselasky u8 reserved_3[0x600]; 5715290650Shselasky 5716290650Shselasky u8 pas[0][0x40]; 5717290650Shselasky}; 5718290650Shselasky 5719290650Shselaskystruct mlx5_ifc_modify_cong_status_out_bits { 5720290650Shselasky u8 status[0x8]; 5721290650Shselasky u8 reserved_0[0x18]; 5722290650Shselasky 5723290650Shselasky u8 syndrome[0x20]; 5724290650Shselasky 5725290650Shselasky u8 reserved_1[0x40]; 5726290650Shselasky}; 5727290650Shselasky 5728290650Shselaskystruct mlx5_ifc_modify_cong_status_in_bits { 5729290650Shselasky u8 opcode[0x10]; 5730290650Shselasky u8 reserved_0[0x10]; 5731290650Shselasky 5732290650Shselasky u8 reserved_1[0x10]; 5733290650Shselasky u8 op_mod[0x10]; 5734290650Shselasky 5735290650Shselasky u8 reserved_2[0x18]; 5736290650Shselasky u8 priority[0x4]; 5737290650Shselasky u8 cong_protocol[0x4]; 5738290650Shselasky 5739290650Shselasky u8 enable[0x1]; 5740290650Shselasky u8 tag_enable[0x1]; 5741290650Shselasky u8 reserved_3[0x1e]; 5742290650Shselasky}; 5743290650Shselasky 5744290650Shselaskystruct mlx5_ifc_modify_cong_params_out_bits { 5745290650Shselasky u8 status[0x8]; 5746290650Shselasky u8 reserved_0[0x18]; 5747290650Shselasky 5748290650Shselasky u8 syndrome[0x20]; 5749290650Shselasky 5750290650Shselasky u8 reserved_1[0x40]; 5751290650Shselasky}; 5752290650Shselasky 5753290650Shselaskystruct mlx5_ifc_modify_cong_params_in_bits { 5754290650Shselasky u8 opcode[0x10]; 5755290650Shselasky u8 reserved_0[0x10]; 5756290650Shselasky 5757290650Shselasky u8 reserved_1[0x10]; 5758290650Shselasky u8 op_mod[0x10]; 5759290650Shselasky 5760290650Shselasky u8 reserved_2[0x1c]; 5761290650Shselasky u8 cong_protocol[0x4]; 5762290650Shselasky 5763290650Shselasky union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select; 5764290650Shselasky 5765290650Shselasky u8 reserved_3[0x80]; 5766290650Shselasky 5767290650Shselasky union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters; 5768290650Shselasky}; 5769290650Shselasky 5770290650Shselaskystruct mlx5_ifc_manage_pages_out_bits { 5771290650Shselasky u8 status[0x8]; 5772290650Shselasky u8 reserved_0[0x18]; 5773290650Shselasky 5774290650Shselasky u8 syndrome[0x20]; 5775290650Shselasky 5776290650Shselasky u8 output_num_entries[0x20]; 5777290650Shselasky 5778290650Shselasky u8 reserved_1[0x20]; 5779290650Shselasky 5780290650Shselasky u8 pas[0][0x40]; 5781290650Shselasky}; 5782290650Shselasky 5783290650Shselaskyenum { 5784290650Shselasky MLX5_PAGES_CANT_GIVE = 0x0, 5785290650Shselasky MLX5_PAGES_GIVE = 0x1, 5786290650Shselasky MLX5_PAGES_TAKE = 0x2, 5787290650Shselasky}; 5788290650Shselasky 5789290650Shselaskystruct mlx5_ifc_manage_pages_in_bits { 5790290650Shselasky u8 opcode[0x10]; 5791290650Shselasky u8 reserved_0[0x10]; 5792290650Shselasky 5793290650Shselasky u8 reserved_1[0x10]; 5794290650Shselasky u8 op_mod[0x10]; 5795290650Shselasky 5796290650Shselasky u8 reserved_2[0x10]; 5797290650Shselasky u8 function_id[0x10]; 5798290650Shselasky 5799290650Shselasky u8 input_num_entries[0x20]; 5800290650Shselasky 5801290650Shselasky u8 pas[0][0x40]; 5802290650Shselasky}; 5803290650Shselasky 5804290650Shselaskystruct mlx5_ifc_mad_ifc_out_bits { 5805290650Shselasky u8 status[0x8]; 5806290650Shselasky u8 reserved_0[0x18]; 5807290650Shselasky 5808290650Shselasky u8 syndrome[0x20]; 5809290650Shselasky 5810290650Shselasky u8 reserved_1[0x40]; 5811290650Shselasky 5812290650Shselasky u8 response_mad_packet[256][0x8]; 5813290650Shselasky}; 5814290650Shselasky 5815290650Shselaskystruct mlx5_ifc_mad_ifc_in_bits { 5816290650Shselasky u8 opcode[0x10]; 5817290650Shselasky u8 reserved_0[0x10]; 5818290650Shselasky 5819290650Shselasky u8 reserved_1[0x10]; 5820290650Shselasky u8 op_mod[0x10]; 5821290650Shselasky 5822290650Shselasky u8 remote_lid[0x10]; 5823290650Shselasky u8 reserved_2[0x8]; 5824290650Shselasky u8 port[0x8]; 5825290650Shselasky 5826290650Shselasky u8 reserved_3[0x20]; 5827290650Shselasky 5828290650Shselasky u8 mad[256][0x8]; 5829290650Shselasky}; 5830290650Shselasky 5831290650Shselaskystruct mlx5_ifc_init_hca_out_bits { 5832290650Shselasky u8 status[0x8]; 5833290650Shselasky u8 reserved_0[0x18]; 5834290650Shselasky 5835290650Shselasky u8 syndrome[0x20]; 5836290650Shselasky 5837290650Shselasky u8 reserved_1[0x40]; 5838290650Shselasky}; 5839290650Shselasky 5840290650Shselaskyenum { 5841290650Shselasky MLX5_INIT_HCA_IN_OP_MOD_INIT = 0x0, 5842290650Shselasky MLX5_INIT_HCA_IN_OP_MOD_PRE_INIT = 0x1, 5843290650Shselasky}; 5844290650Shselasky 5845290650Shselaskystruct mlx5_ifc_init_hca_in_bits { 5846290650Shselasky u8 opcode[0x10]; 5847290650Shselasky u8 reserved_0[0x10]; 5848290650Shselasky 5849290650Shselasky u8 reserved_1[0x10]; 5850290650Shselasky u8 op_mod[0x10]; 5851290650Shselasky 5852290650Shselasky u8 reserved_2[0x40]; 5853290650Shselasky}; 5854290650Shselasky 5855290650Shselaskystruct mlx5_ifc_init2rtr_qp_out_bits { 5856290650Shselasky u8 status[0x8]; 5857290650Shselasky u8 reserved_0[0x18]; 5858290650Shselasky 5859290650Shselasky u8 syndrome[0x20]; 5860290650Shselasky 5861290650Shselasky u8 reserved_1[0x40]; 5862290650Shselasky}; 5863290650Shselasky 5864290650Shselaskystruct mlx5_ifc_init2rtr_qp_in_bits { 5865290650Shselasky u8 opcode[0x10]; 5866290650Shselasky u8 reserved_0[0x10]; 5867290650Shselasky 5868290650Shselasky u8 reserved_1[0x10]; 5869290650Shselasky u8 op_mod[0x10]; 5870290650Shselasky 5871290650Shselasky u8 reserved_2[0x8]; 5872290650Shselasky u8 qpn[0x18]; 5873290650Shselasky 5874290650Shselasky u8 reserved_3[0x20]; 5875290650Shselasky 5876290650Shselasky u8 opt_param_mask[0x20]; 5877290650Shselasky 5878290650Shselasky u8 reserved_4[0x20]; 5879290650Shselasky 5880290650Shselasky struct mlx5_ifc_qpc_bits qpc; 5881290650Shselasky 5882290650Shselasky u8 reserved_5[0x80]; 5883290650Shselasky}; 5884290650Shselasky 5885290650Shselaskystruct mlx5_ifc_init2init_qp_out_bits { 5886290650Shselasky u8 status[0x8]; 5887290650Shselasky u8 reserved_0[0x18]; 5888290650Shselasky 5889290650Shselasky u8 syndrome[0x20]; 5890290650Shselasky 5891290650Shselasky u8 reserved_1[0x40]; 5892290650Shselasky}; 5893290650Shselasky 5894290650Shselaskystruct mlx5_ifc_init2init_qp_in_bits { 5895290650Shselasky u8 opcode[0x10]; 5896290650Shselasky u8 reserved_0[0x10]; 5897290650Shselasky 5898290650Shselasky u8 reserved_1[0x10]; 5899290650Shselasky u8 op_mod[0x10]; 5900290650Shselasky 5901290650Shselasky u8 reserved_2[0x8]; 5902290650Shselasky u8 qpn[0x18]; 5903290650Shselasky 5904290650Shselasky u8 reserved_3[0x20]; 5905290650Shselasky 5906290650Shselasky u8 opt_param_mask[0x20]; 5907290650Shselasky 5908290650Shselasky u8 reserved_4[0x20]; 5909290650Shselasky 5910290650Shselasky struct mlx5_ifc_qpc_bits qpc; 5911290650Shselasky 5912290650Shselasky u8 reserved_5[0x80]; 5913290650Shselasky}; 5914290650Shselasky 5915290650Shselaskystruct mlx5_ifc_get_dropped_packet_log_out_bits { 5916290650Shselasky u8 status[0x8]; 5917290650Shselasky u8 reserved_0[0x18]; 5918290650Shselasky 5919290650Shselasky u8 syndrome[0x20]; 5920290650Shselasky 5921290650Shselasky u8 reserved_1[0x40]; 5922290650Shselasky 5923290650Shselasky u8 packet_headers_log[128][0x8]; 5924290650Shselasky 5925290650Shselasky u8 packet_syndrome[64][0x8]; 5926290650Shselasky}; 5927290650Shselasky 5928290650Shselaskystruct mlx5_ifc_get_dropped_packet_log_in_bits { 5929290650Shselasky u8 opcode[0x10]; 5930290650Shselasky u8 reserved_0[0x10]; 5931290650Shselasky 5932290650Shselasky u8 reserved_1[0x10]; 5933290650Shselasky u8 op_mod[0x10]; 5934290650Shselasky 5935290650Shselasky u8 reserved_2[0x40]; 5936290650Shselasky}; 5937290650Shselasky 5938290650Shselaskystruct mlx5_ifc_gen_eqe_in_bits { 5939290650Shselasky u8 opcode[0x10]; 5940290650Shselasky u8 reserved_0[0x10]; 5941290650Shselasky 5942290650Shselasky u8 reserved_1[0x10]; 5943290650Shselasky u8 op_mod[0x10]; 5944290650Shselasky 5945290650Shselasky u8 reserved_2[0x18]; 5946290650Shselasky u8 eq_number[0x8]; 5947290650Shselasky 5948290650Shselasky u8 reserved_3[0x20]; 5949290650Shselasky 5950290650Shselasky u8 eqe[64][0x8]; 5951290650Shselasky}; 5952290650Shselasky 5953290650Shselaskystruct mlx5_ifc_gen_eq_out_bits { 5954290650Shselasky u8 status[0x8]; 5955290650Shselasky u8 reserved_0[0x18]; 5956290650Shselasky 5957290650Shselasky u8 syndrome[0x20]; 5958290650Shselasky 5959290650Shselasky u8 reserved_1[0x40]; 5960290650Shselasky}; 5961290650Shselasky 5962290650Shselaskystruct mlx5_ifc_enable_hca_out_bits { 5963290650Shselasky u8 status[0x8]; 5964290650Shselasky u8 reserved_0[0x18]; 5965290650Shselasky 5966290650Shselasky u8 syndrome[0x20]; 5967290650Shselasky 5968290650Shselasky u8 reserved_1[0x20]; 5969290650Shselasky}; 5970290650Shselasky 5971290650Shselaskystruct mlx5_ifc_enable_hca_in_bits { 5972290650Shselasky u8 opcode[0x10]; 5973290650Shselasky u8 reserved_0[0x10]; 5974290650Shselasky 5975290650Shselasky u8 reserved_1[0x10]; 5976290650Shselasky u8 op_mod[0x10]; 5977290650Shselasky 5978290650Shselasky u8 reserved_2[0x10]; 5979290650Shselasky u8 function_id[0x10]; 5980290650Shselasky 5981290650Shselasky u8 reserved_3[0x20]; 5982290650Shselasky}; 5983290650Shselasky 5984290650Shselaskystruct mlx5_ifc_drain_dct_out_bits { 5985290650Shselasky u8 status[0x8]; 5986290650Shselasky u8 reserved_0[0x18]; 5987290650Shselasky 5988290650Shselasky u8 syndrome[0x20]; 5989290650Shselasky 5990290650Shselasky u8 reserved_1[0x40]; 5991290650Shselasky}; 5992290650Shselasky 5993290650Shselaskystruct mlx5_ifc_drain_dct_in_bits { 5994290650Shselasky u8 opcode[0x10]; 5995290650Shselasky u8 reserved_0[0x10]; 5996290650Shselasky 5997290650Shselasky u8 reserved_1[0x10]; 5998290650Shselasky u8 op_mod[0x10]; 5999290650Shselasky 6000290650Shselasky u8 reserved_2[0x8]; 6001290650Shselasky u8 dctn[0x18]; 6002290650Shselasky 6003290650Shselasky u8 reserved_3[0x20]; 6004290650Shselasky}; 6005290650Shselasky 6006290650Shselaskystruct mlx5_ifc_disable_hca_out_bits { 6007290650Shselasky u8 status[0x8]; 6008290650Shselasky u8 reserved_0[0x18]; 6009290650Shselasky 6010290650Shselasky u8 syndrome[0x20]; 6011290650Shselasky 6012290650Shselasky u8 reserved_1[0x20]; 6013290650Shselasky}; 6014290650Shselasky 6015290650Shselaskystruct mlx5_ifc_disable_hca_in_bits { 6016290650Shselasky u8 opcode[0x10]; 6017290650Shselasky u8 reserved_0[0x10]; 6018290650Shselasky 6019290650Shselasky u8 reserved_1[0x10]; 6020290650Shselasky u8 op_mod[0x10]; 6021290650Shselasky 6022290650Shselasky u8 reserved_2[0x10]; 6023290650Shselasky u8 function_id[0x10]; 6024290650Shselasky 6025290650Shselasky u8 reserved_3[0x20]; 6026290650Shselasky}; 6027290650Shselasky 6028290650Shselaskystruct mlx5_ifc_detach_from_mcg_out_bits { 6029290650Shselasky u8 status[0x8]; 6030290650Shselasky u8 reserved_0[0x18]; 6031290650Shselasky 6032290650Shselasky u8 syndrome[0x20]; 6033290650Shselasky 6034290650Shselasky u8 reserved_1[0x40]; 6035290650Shselasky}; 6036290650Shselasky 6037290650Shselaskystruct mlx5_ifc_detach_from_mcg_in_bits { 6038290650Shselasky u8 opcode[0x10]; 6039290650Shselasky u8 reserved_0[0x10]; 6040290650Shselasky 6041290650Shselasky u8 reserved_1[0x10]; 6042290650Shselasky u8 op_mod[0x10]; 6043290650Shselasky 6044290650Shselasky u8 reserved_2[0x8]; 6045290650Shselasky u8 qpn[0x18]; 6046290650Shselasky 6047290650Shselasky u8 reserved_3[0x20]; 6048290650Shselasky 6049290650Shselasky u8 multicast_gid[16][0x8]; 6050290650Shselasky}; 6051290650Shselasky 6052290650Shselaskystruct mlx5_ifc_destroy_xrc_srq_out_bits { 6053290650Shselasky u8 status[0x8]; 6054290650Shselasky u8 reserved_0[0x18]; 6055290650Shselasky 6056290650Shselasky u8 syndrome[0x20]; 6057290650Shselasky 6058290650Shselasky u8 reserved_1[0x40]; 6059290650Shselasky}; 6060290650Shselasky 6061290650Shselaskystruct mlx5_ifc_destroy_xrc_srq_in_bits { 6062290650Shselasky u8 opcode[0x10]; 6063290650Shselasky u8 reserved_0[0x10]; 6064290650Shselasky 6065290650Shselasky u8 reserved_1[0x10]; 6066290650Shselasky u8 op_mod[0x10]; 6067290650Shselasky 6068290650Shselasky u8 reserved_2[0x8]; 6069290650Shselasky u8 xrc_srqn[0x18]; 6070290650Shselasky 6071290650Shselasky u8 reserved_3[0x20]; 6072290650Shselasky}; 6073290650Shselasky 6074290650Shselaskystruct mlx5_ifc_destroy_tis_out_bits { 6075290650Shselasky u8 status[0x8]; 6076290650Shselasky u8 reserved_0[0x18]; 6077290650Shselasky 6078290650Shselasky u8 syndrome[0x20]; 6079290650Shselasky 6080290650Shselasky u8 reserved_1[0x40]; 6081290650Shselasky}; 6082290650Shselasky 6083290650Shselaskystruct mlx5_ifc_destroy_tis_in_bits { 6084290650Shselasky u8 opcode[0x10]; 6085290650Shselasky u8 reserved_0[0x10]; 6086290650Shselasky 6087290650Shselasky u8 reserved_1[0x10]; 6088290650Shselasky u8 op_mod[0x10]; 6089290650Shselasky 6090290650Shselasky u8 reserved_2[0x8]; 6091290650Shselasky u8 tisn[0x18]; 6092290650Shselasky 6093290650Shselasky u8 reserved_3[0x20]; 6094290650Shselasky}; 6095290650Shselasky 6096290650Shselaskystruct mlx5_ifc_destroy_tir_out_bits { 6097290650Shselasky u8 status[0x8]; 6098290650Shselasky u8 reserved_0[0x18]; 6099290650Shselasky 6100290650Shselasky u8 syndrome[0x20]; 6101290650Shselasky 6102290650Shselasky u8 reserved_1[0x40]; 6103290650Shselasky}; 6104290650Shselasky 6105290650Shselaskystruct mlx5_ifc_destroy_tir_in_bits { 6106290650Shselasky u8 opcode[0x10]; 6107290650Shselasky u8 reserved_0[0x10]; 6108290650Shselasky 6109290650Shselasky u8 reserved_1[0x10]; 6110290650Shselasky u8 op_mod[0x10]; 6111290650Shselasky 6112290650Shselasky u8 reserved_2[0x8]; 6113290650Shselasky u8 tirn[0x18]; 6114290650Shselasky 6115290650Shselasky u8 reserved_3[0x20]; 6116290650Shselasky}; 6117290650Shselasky 6118290650Shselaskystruct mlx5_ifc_destroy_srq_out_bits { 6119290650Shselasky u8 status[0x8]; 6120290650Shselasky u8 reserved_0[0x18]; 6121290650Shselasky 6122290650Shselasky u8 syndrome[0x20]; 6123290650Shselasky 6124290650Shselasky u8 reserved_1[0x40]; 6125290650Shselasky}; 6126290650Shselasky 6127290650Shselaskystruct mlx5_ifc_destroy_srq_in_bits { 6128290650Shselasky u8 opcode[0x10]; 6129290650Shselasky u8 reserved_0[0x10]; 6130290650Shselasky 6131290650Shselasky u8 reserved_1[0x10]; 6132290650Shselasky u8 op_mod[0x10]; 6133290650Shselasky 6134290650Shselasky u8 reserved_2[0x8]; 6135290650Shselasky u8 srqn[0x18]; 6136290650Shselasky 6137290650Shselasky u8 reserved_3[0x20]; 6138290650Shselasky}; 6139290650Shselasky 6140290650Shselaskystruct mlx5_ifc_destroy_sq_out_bits { 6141290650Shselasky u8 status[0x8]; 6142290650Shselasky u8 reserved_0[0x18]; 6143290650Shselasky 6144290650Shselasky u8 syndrome[0x20]; 6145290650Shselasky 6146290650Shselasky u8 reserved_1[0x40]; 6147290650Shselasky}; 6148290650Shselasky 6149290650Shselaskystruct mlx5_ifc_destroy_sq_in_bits { 6150290650Shselasky u8 opcode[0x10]; 6151290650Shselasky u8 reserved_0[0x10]; 6152290650Shselasky 6153290650Shselasky u8 reserved_1[0x10]; 6154290650Shselasky u8 op_mod[0x10]; 6155290650Shselasky 6156290650Shselasky u8 reserved_2[0x8]; 6157290650Shselasky u8 sqn[0x18]; 6158290650Shselasky 6159290650Shselasky u8 reserved_3[0x20]; 6160290650Shselasky}; 6161290650Shselasky 6162308678Shselaskystruct mlx5_ifc_destroy_scheduling_element_out_bits { 6163308678Shselasky u8 status[0x8]; 6164308678Shselasky u8 reserved_at_8[0x18]; 6165308678Shselasky 6166308678Shselasky u8 syndrome[0x20]; 6167308678Shselasky 6168308678Shselasky u8 reserved_at_40[0x1c0]; 6169308678Shselasky}; 6170308678Shselasky 6171308678Shselaskyenum { 6172308678Shselasky MLX5_DESTROY_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH = 0x2, 6173308678Shselasky}; 6174308678Shselasky 6175308678Shselaskystruct mlx5_ifc_destroy_scheduling_element_in_bits { 6176308678Shselasky u8 opcode[0x10]; 6177308678Shselasky u8 reserved_at_10[0x10]; 6178308678Shselasky 6179308678Shselasky u8 reserved_at_20[0x10]; 6180308678Shselasky u8 op_mod[0x10]; 6181308678Shselasky 6182308678Shselasky u8 scheduling_hierarchy[0x8]; 6183308678Shselasky u8 reserved_at_48[0x18]; 6184308678Shselasky 6185308678Shselasky u8 scheduling_element_id[0x20]; 6186308678Shselasky 6187308678Shselasky u8 reserved_at_80[0x180]; 6188308678Shselasky}; 6189308678Shselasky 6190290650Shselaskystruct mlx5_ifc_destroy_rqt_out_bits { 6191290650Shselasky u8 status[0x8]; 6192290650Shselasky u8 reserved_0[0x18]; 6193290650Shselasky 6194290650Shselasky u8 syndrome[0x20]; 6195290650Shselasky 6196290650Shselasky u8 reserved_1[0x40]; 6197290650Shselasky}; 6198290650Shselasky 6199290650Shselaskystruct mlx5_ifc_destroy_rqt_in_bits { 6200290650Shselasky u8 opcode[0x10]; 6201290650Shselasky u8 reserved_0[0x10]; 6202290650Shselasky 6203290650Shselasky u8 reserved_1[0x10]; 6204290650Shselasky u8 op_mod[0x10]; 6205290650Shselasky 6206290650Shselasky u8 reserved_2[0x8]; 6207290650Shselasky u8 rqtn[0x18]; 6208290650Shselasky 6209290650Shselasky u8 reserved_3[0x20]; 6210290650Shselasky}; 6211290650Shselasky 6212290650Shselaskystruct mlx5_ifc_destroy_rq_out_bits { 6213290650Shselasky u8 status[0x8]; 6214290650Shselasky u8 reserved_0[0x18]; 6215290650Shselasky 6216290650Shselasky u8 syndrome[0x20]; 6217290650Shselasky 6218290650Shselasky u8 reserved_1[0x40]; 6219290650Shselasky}; 6220290650Shselasky 6221290650Shselaskystruct mlx5_ifc_destroy_rq_in_bits { 6222290650Shselasky u8 opcode[0x10]; 6223290650Shselasky u8 reserved_0[0x10]; 6224290650Shselasky 6225290650Shselasky u8 reserved_1[0x10]; 6226290650Shselasky u8 op_mod[0x10]; 6227290650Shselasky 6228290650Shselasky u8 reserved_2[0x8]; 6229290650Shselasky u8 rqn[0x18]; 6230290650Shselasky 6231290650Shselasky u8 reserved_3[0x20]; 6232290650Shselasky}; 6233290650Shselasky 6234290650Shselaskystruct mlx5_ifc_destroy_rmp_out_bits { 6235290650Shselasky u8 status[0x8]; 6236290650Shselasky u8 reserved_0[0x18]; 6237290650Shselasky 6238290650Shselasky u8 syndrome[0x20]; 6239290650Shselasky 6240290650Shselasky u8 reserved_1[0x40]; 6241290650Shselasky}; 6242290650Shselasky 6243290650Shselaskystruct mlx5_ifc_destroy_rmp_in_bits { 6244290650Shselasky u8 opcode[0x10]; 6245290650Shselasky u8 reserved_0[0x10]; 6246290650Shselasky 6247290650Shselasky u8 reserved_1[0x10]; 6248290650Shselasky u8 op_mod[0x10]; 6249290650Shselasky 6250290650Shselasky u8 reserved_2[0x8]; 6251290650Shselasky u8 rmpn[0x18]; 6252290650Shselasky 6253290650Shselasky u8 reserved_3[0x20]; 6254290650Shselasky}; 6255290650Shselasky 6256290650Shselaskystruct mlx5_ifc_destroy_qp_out_bits { 6257290650Shselasky u8 status[0x8]; 6258290650Shselasky u8 reserved_0[0x18]; 6259290650Shselasky 6260290650Shselasky u8 syndrome[0x20]; 6261290650Shselasky 6262290650Shselasky u8 reserved_1[0x40]; 6263290650Shselasky}; 6264290650Shselasky 6265290650Shselaskystruct mlx5_ifc_destroy_qp_in_bits { 6266290650Shselasky u8 opcode[0x10]; 6267290650Shselasky u8 reserved_0[0x10]; 6268290650Shselasky 6269290650Shselasky u8 reserved_1[0x10]; 6270290650Shselasky u8 op_mod[0x10]; 6271290650Shselasky 6272290650Shselasky u8 reserved_2[0x8]; 6273290650Shselasky u8 qpn[0x18]; 6274290650Shselasky 6275290650Shselasky u8 reserved_3[0x20]; 6276290650Shselasky}; 6277290650Shselasky 6278308678Shselaskystruct mlx5_ifc_destroy_qos_para_vport_out_bits { 6279308678Shselasky u8 status[0x8]; 6280308678Shselasky u8 reserved_at_8[0x18]; 6281308678Shselasky 6282308678Shselasky u8 syndrome[0x20]; 6283308678Shselasky 6284308678Shselasky u8 reserved_at_40[0x1c0]; 6285308678Shselasky}; 6286308678Shselasky 6287308678Shselaskystruct mlx5_ifc_destroy_qos_para_vport_in_bits { 6288308678Shselasky u8 opcode[0x10]; 6289308678Shselasky u8 reserved_at_10[0x10]; 6290308678Shselasky 6291308678Shselasky u8 reserved_at_20[0x10]; 6292308678Shselasky u8 op_mod[0x10]; 6293308678Shselasky 6294308678Shselasky u8 reserved_at_40[0x20]; 6295308678Shselasky 6296308678Shselasky u8 reserved_at_60[0x10]; 6297308678Shselasky u8 qos_para_vport_number[0x10]; 6298308678Shselasky 6299308678Shselasky u8 reserved_at_80[0x180]; 6300308678Shselasky}; 6301308678Shselasky 6302290650Shselaskystruct mlx5_ifc_destroy_psv_out_bits { 6303290650Shselasky u8 status[0x8]; 6304290650Shselasky u8 reserved_0[0x18]; 6305290650Shselasky 6306290650Shselasky u8 syndrome[0x20]; 6307290650Shselasky 6308290650Shselasky u8 reserved_1[0x40]; 6309290650Shselasky}; 6310290650Shselasky 6311290650Shselaskystruct mlx5_ifc_destroy_psv_in_bits { 6312290650Shselasky u8 opcode[0x10]; 6313290650Shselasky u8 reserved_0[0x10]; 6314290650Shselasky 6315290650Shselasky u8 reserved_1[0x10]; 6316290650Shselasky u8 op_mod[0x10]; 6317290650Shselasky 6318290650Shselasky u8 reserved_2[0x8]; 6319290650Shselasky u8 psvn[0x18]; 6320290650Shselasky 6321290650Shselasky u8 reserved_3[0x20]; 6322290650Shselasky}; 6323290650Shselasky 6324290650Shselaskystruct mlx5_ifc_destroy_mkey_out_bits { 6325290650Shselasky u8 status[0x8]; 6326290650Shselasky u8 reserved_0[0x18]; 6327290650Shselasky 6328290650Shselasky u8 syndrome[0x20]; 6329290650Shselasky 6330290650Shselasky u8 reserved_1[0x40]; 6331290650Shselasky}; 6332290650Shselasky 6333290650Shselaskystruct mlx5_ifc_destroy_mkey_in_bits { 6334290650Shselasky u8 opcode[0x10]; 6335290650Shselasky u8 reserved_0[0x10]; 6336290650Shselasky 6337290650Shselasky u8 reserved_1[0x10]; 6338290650Shselasky u8 op_mod[0x10]; 6339290650Shselasky 6340290650Shselasky u8 reserved_2[0x8]; 6341290650Shselasky u8 mkey_index[0x18]; 6342290650Shselasky 6343290650Shselasky u8 reserved_3[0x20]; 6344290650Shselasky}; 6345290650Shselasky 6346290650Shselaskystruct mlx5_ifc_destroy_flow_table_out_bits { 6347290650Shselasky u8 status[0x8]; 6348290650Shselasky u8 reserved_0[0x18]; 6349290650Shselasky 6350290650Shselasky u8 syndrome[0x20]; 6351290650Shselasky 6352290650Shselasky u8 reserved_1[0x40]; 6353290650Shselasky}; 6354290650Shselasky 6355290650Shselaskystruct mlx5_ifc_destroy_flow_table_in_bits { 6356290650Shselasky u8 opcode[0x10]; 6357290650Shselasky u8 reserved_0[0x10]; 6358290650Shselasky 6359290650Shselasky u8 reserved_1[0x10]; 6360290650Shselasky u8 op_mod[0x10]; 6361290650Shselasky 6362290650Shselasky u8 other_vport[0x1]; 6363290650Shselasky u8 reserved_2[0xf]; 6364290650Shselasky u8 vport_number[0x10]; 6365290650Shselasky 6366290650Shselasky u8 reserved_3[0x20]; 6367290650Shselasky 6368290650Shselasky u8 table_type[0x8]; 6369290650Shselasky u8 reserved_4[0x18]; 6370290650Shselasky 6371290650Shselasky u8 reserved_5[0x8]; 6372290650Shselasky u8 table_id[0x18]; 6373290650Shselasky 6374290650Shselasky u8 reserved_6[0x140]; 6375290650Shselasky}; 6376290650Shselasky 6377290650Shselaskystruct mlx5_ifc_destroy_flow_group_out_bits { 6378290650Shselasky u8 status[0x8]; 6379290650Shselasky u8 reserved_0[0x18]; 6380290650Shselasky 6381290650Shselasky u8 syndrome[0x20]; 6382290650Shselasky 6383290650Shselasky u8 reserved_1[0x40]; 6384290650Shselasky}; 6385290650Shselasky 6386290650Shselaskystruct mlx5_ifc_destroy_flow_group_in_bits { 6387290650Shselasky u8 opcode[0x10]; 6388290650Shselasky u8 reserved_0[0x10]; 6389290650Shselasky 6390290650Shselasky u8 reserved_1[0x10]; 6391290650Shselasky u8 op_mod[0x10]; 6392290650Shselasky 6393290650Shselasky u8 other_vport[0x1]; 6394290650Shselasky u8 reserved_2[0xf]; 6395290650Shselasky u8 vport_number[0x10]; 6396290650Shselasky 6397290650Shselasky u8 reserved_3[0x20]; 6398290650Shselasky 6399290650Shselasky u8 table_type[0x8]; 6400290650Shselasky u8 reserved_4[0x18]; 6401290650Shselasky 6402290650Shselasky u8 reserved_5[0x8]; 6403290650Shselasky u8 table_id[0x18]; 6404290650Shselasky 6405290650Shselasky u8 group_id[0x20]; 6406290650Shselasky 6407290650Shselasky u8 reserved_6[0x120]; 6408290650Shselasky}; 6409290650Shselasky 6410290650Shselaskystruct mlx5_ifc_destroy_eq_out_bits { 6411290650Shselasky u8 status[0x8]; 6412290650Shselasky u8 reserved_0[0x18]; 6413290650Shselasky 6414290650Shselasky u8 syndrome[0x20]; 6415290650Shselasky 6416290650Shselasky u8 reserved_1[0x40]; 6417290650Shselasky}; 6418290650Shselasky 6419290650Shselaskystruct mlx5_ifc_destroy_eq_in_bits { 6420290650Shselasky u8 opcode[0x10]; 6421290650Shselasky u8 reserved_0[0x10]; 6422290650Shselasky 6423290650Shselasky u8 reserved_1[0x10]; 6424290650Shselasky u8 op_mod[0x10]; 6425290650Shselasky 6426290650Shselasky u8 reserved_2[0x18]; 6427290650Shselasky u8 eq_number[0x8]; 6428290650Shselasky 6429290650Shselasky u8 reserved_3[0x20]; 6430290650Shselasky}; 6431290650Shselasky 6432290650Shselaskystruct mlx5_ifc_destroy_dct_out_bits { 6433290650Shselasky u8 status[0x8]; 6434290650Shselasky u8 reserved_0[0x18]; 6435290650Shselasky 6436290650Shselasky u8 syndrome[0x20]; 6437290650Shselasky 6438290650Shselasky u8 reserved_1[0x40]; 6439290650Shselasky}; 6440290650Shselasky 6441290650Shselaskystruct mlx5_ifc_destroy_dct_in_bits { 6442290650Shselasky u8 opcode[0x10]; 6443290650Shselasky u8 reserved_0[0x10]; 6444290650Shselasky 6445290650Shselasky u8 reserved_1[0x10]; 6446290650Shselasky u8 op_mod[0x10]; 6447290650Shselasky 6448290650Shselasky u8 reserved_2[0x8]; 6449290650Shselasky u8 dctn[0x18]; 6450290650Shselasky 6451290650Shselasky u8 reserved_3[0x20]; 6452290650Shselasky}; 6453290650Shselasky 6454290650Shselaskystruct mlx5_ifc_destroy_cq_out_bits { 6455290650Shselasky u8 status[0x8]; 6456290650Shselasky u8 reserved_0[0x18]; 6457290650Shselasky 6458290650Shselasky u8 syndrome[0x20]; 6459290650Shselasky 6460290650Shselasky u8 reserved_1[0x40]; 6461290650Shselasky}; 6462290650Shselasky 6463290650Shselaskystruct mlx5_ifc_destroy_cq_in_bits { 6464290650Shselasky u8 opcode[0x10]; 6465290650Shselasky u8 reserved_0[0x10]; 6466290650Shselasky 6467290650Shselasky u8 reserved_1[0x10]; 6468290650Shselasky u8 op_mod[0x10]; 6469290650Shselasky 6470290650Shselasky u8 reserved_2[0x8]; 6471290650Shselasky u8 cqn[0x18]; 6472290650Shselasky 6473290650Shselasky u8 reserved_3[0x20]; 6474290650Shselasky}; 6475290650Shselasky 6476290650Shselaskystruct mlx5_ifc_delete_vxlan_udp_dport_out_bits { 6477290650Shselasky u8 status[0x8]; 6478290650Shselasky u8 reserved_0[0x18]; 6479290650Shselasky 6480290650Shselasky u8 syndrome[0x20]; 6481290650Shselasky 6482290650Shselasky u8 reserved_1[0x40]; 6483290650Shselasky}; 6484290650Shselasky 6485290650Shselaskystruct mlx5_ifc_delete_vxlan_udp_dport_in_bits { 6486290650Shselasky u8 opcode[0x10]; 6487290650Shselasky u8 reserved_0[0x10]; 6488290650Shselasky 6489290650Shselasky u8 reserved_1[0x10]; 6490290650Shselasky u8 op_mod[0x10]; 6491290650Shselasky 6492290650Shselasky u8 reserved_2[0x20]; 6493290650Shselasky 6494290650Shselasky u8 reserved_3[0x10]; 6495290650Shselasky u8 vxlan_udp_port[0x10]; 6496290650Shselasky}; 6497290650Shselasky 6498290650Shselaskystruct mlx5_ifc_delete_l2_table_entry_out_bits { 6499290650Shselasky u8 status[0x8]; 6500290650Shselasky u8 reserved_0[0x18]; 6501290650Shselasky 6502290650Shselasky u8 syndrome[0x20]; 6503290650Shselasky 6504290650Shselasky u8 reserved_1[0x40]; 6505290650Shselasky}; 6506290650Shselasky 6507290650Shselaskystruct mlx5_ifc_delete_l2_table_entry_in_bits { 6508290650Shselasky u8 opcode[0x10]; 6509290650Shselasky u8 reserved_0[0x10]; 6510290650Shselasky 6511290650Shselasky u8 reserved_1[0x10]; 6512290650Shselasky u8 op_mod[0x10]; 6513290650Shselasky 6514290650Shselasky u8 reserved_2[0x60]; 6515290650Shselasky 6516290650Shselasky u8 reserved_3[0x8]; 6517290650Shselasky u8 table_index[0x18]; 6518290650Shselasky 6519290650Shselasky u8 reserved_4[0x140]; 6520290650Shselasky}; 6521290650Shselasky 6522290650Shselaskystruct mlx5_ifc_delete_fte_out_bits { 6523290650Shselasky u8 status[0x8]; 6524290650Shselasky u8 reserved_0[0x18]; 6525290650Shselasky 6526290650Shselasky u8 syndrome[0x20]; 6527290650Shselasky 6528290650Shselasky u8 reserved_1[0x40]; 6529290650Shselasky}; 6530290650Shselasky 6531290650Shselaskystruct mlx5_ifc_delete_fte_in_bits { 6532290650Shselasky u8 opcode[0x10]; 6533290650Shselasky u8 reserved_0[0x10]; 6534290650Shselasky 6535290650Shselasky u8 reserved_1[0x10]; 6536290650Shselasky u8 op_mod[0x10]; 6537290650Shselasky 6538290650Shselasky u8 other_vport[0x1]; 6539290650Shselasky u8 reserved_2[0xf]; 6540290650Shselasky u8 vport_number[0x10]; 6541290650Shselasky 6542290650Shselasky u8 reserved_3[0x20]; 6543290650Shselasky 6544290650Shselasky u8 table_type[0x8]; 6545290650Shselasky u8 reserved_4[0x18]; 6546290650Shselasky 6547290650Shselasky u8 reserved_5[0x8]; 6548290650Shselasky u8 table_id[0x18]; 6549290650Shselasky 6550290650Shselasky u8 reserved_6[0x40]; 6551290650Shselasky 6552290650Shselasky u8 flow_index[0x20]; 6553290650Shselasky 6554290650Shselasky u8 reserved_7[0xe0]; 6555290650Shselasky}; 6556290650Shselasky 6557290650Shselaskystruct mlx5_ifc_dealloc_xrcd_out_bits { 6558290650Shselasky u8 status[0x8]; 6559290650Shselasky u8 reserved_0[0x18]; 6560290650Shselasky 6561290650Shselasky u8 syndrome[0x20]; 6562290650Shselasky 6563290650Shselasky u8 reserved_1[0x40]; 6564290650Shselasky}; 6565290650Shselasky 6566290650Shselaskystruct mlx5_ifc_dealloc_xrcd_in_bits { 6567290650Shselasky u8 opcode[0x10]; 6568290650Shselasky u8 reserved_0[0x10]; 6569290650Shselasky 6570290650Shselasky u8 reserved_1[0x10]; 6571290650Shselasky u8 op_mod[0x10]; 6572290650Shselasky 6573290650Shselasky u8 reserved_2[0x8]; 6574290650Shselasky u8 xrcd[0x18]; 6575290650Shselasky 6576290650Shselasky u8 reserved_3[0x20]; 6577290650Shselasky}; 6578290650Shselasky 6579290650Shselaskystruct mlx5_ifc_dealloc_uar_out_bits { 6580290650Shselasky u8 status[0x8]; 6581290650Shselasky u8 reserved_0[0x18]; 6582290650Shselasky 6583290650Shselasky u8 syndrome[0x20]; 6584290650Shselasky 6585290650Shselasky u8 reserved_1[0x40]; 6586290650Shselasky}; 6587290650Shselasky 6588290650Shselaskystruct mlx5_ifc_dealloc_uar_in_bits { 6589290650Shselasky u8 opcode[0x10]; 6590290650Shselasky u8 reserved_0[0x10]; 6591290650Shselasky 6592290650Shselasky u8 reserved_1[0x10]; 6593290650Shselasky u8 op_mod[0x10]; 6594290650Shselasky 6595290650Shselasky u8 reserved_2[0x8]; 6596290650Shselasky u8 uar[0x18]; 6597290650Shselasky 6598290650Shselasky u8 reserved_3[0x20]; 6599290650Shselasky}; 6600290650Shselasky 6601290650Shselaskystruct mlx5_ifc_dealloc_transport_domain_out_bits { 6602290650Shselasky u8 status[0x8]; 6603290650Shselasky u8 reserved_0[0x18]; 6604290650Shselasky 6605290650Shselasky u8 syndrome[0x20]; 6606290650Shselasky 6607290650Shselasky u8 reserved_1[0x40]; 6608290650Shselasky}; 6609290650Shselasky 6610290650Shselaskystruct mlx5_ifc_dealloc_transport_domain_in_bits { 6611290650Shselasky u8 opcode[0x10]; 6612290650Shselasky u8 reserved_0[0x10]; 6613290650Shselasky 6614290650Shselasky u8 reserved_1[0x10]; 6615290650Shselasky u8 op_mod[0x10]; 6616290650Shselasky 6617290650Shselasky u8 reserved_2[0x8]; 6618290650Shselasky u8 transport_domain[0x18]; 6619290650Shselasky 6620290650Shselasky u8 reserved_3[0x20]; 6621290650Shselasky}; 6622290650Shselasky 6623290650Shselaskystruct mlx5_ifc_dealloc_q_counter_out_bits { 6624290650Shselasky u8 status[0x8]; 6625290650Shselasky u8 reserved_0[0x18]; 6626290650Shselasky 6627290650Shselasky u8 syndrome[0x20]; 6628290650Shselasky 6629290650Shselasky u8 reserved_1[0x40]; 6630290650Shselasky}; 6631290650Shselasky 6632306233Shselaskystruct mlx5_ifc_counter_id_bits { 6633306233Shselasky u8 reserved[0x10]; 6634306233Shselasky u8 counter_id[0x10]; 6635306233Shselasky}; 6636306233Shselasky 6637308678Shselaskystruct mlx5_ifc_diagnostic_params_context_bits { 6638306233Shselasky u8 num_of_counters[0x10]; 6639306233Shselasky u8 reserved_2[0x8]; 6640306233Shselasky u8 log_num_of_samples[0x8]; 6641306233Shselasky 6642306233Shselasky u8 single[0x1]; 6643306233Shselasky u8 repetitive[0x1]; 6644306233Shselasky u8 sync[0x1]; 6645306233Shselasky u8 clear[0x1]; 6646306233Shselasky u8 on_demand[0x1]; 6647306233Shselasky u8 enable[0x1]; 6648306233Shselasky u8 reserved_3[0x12]; 6649306233Shselasky u8 log_sample_period[0x8]; 6650306233Shselasky 6651306233Shselasky u8 reserved_4[0x80]; 6652306233Shselasky 6653306233Shselasky struct mlx5_ifc_counter_id_bits counter_id[0]; 6654306233Shselasky}; 6655306233Shselasky 6656308678Shselaskystruct mlx5_ifc_set_diagnostic_params_in_bits { 6657308678Shselasky u8 opcode[0x10]; 6658308678Shselasky u8 reserved_0[0x10]; 6659308678Shselasky 6660308678Shselasky u8 reserved_1[0x10]; 6661308678Shselasky u8 op_mod[0x10]; 6662308678Shselasky 6663308678Shselasky struct mlx5_ifc_diagnostic_params_context_bits diagnostic_params_ctx; 6664308678Shselasky}; 6665308678Shselasky 6666308678Shselaskystruct mlx5_ifc_set_diagnostic_params_out_bits { 6667306233Shselasky u8 status[0x8]; 6668306233Shselasky u8 reserved_0[0x18]; 6669306233Shselasky 6670306233Shselasky u8 syndrome[0x20]; 6671306233Shselasky 6672306233Shselasky u8 reserved_1[0x40]; 6673306233Shselasky}; 6674306233Shselasky 6675308678Shselaskystruct mlx5_ifc_query_diagnostic_counters_in_bits { 6676306233Shselasky u8 opcode[0x10]; 6677306233Shselasky u8 reserved_0[0x10]; 6678306233Shselasky 6679306233Shselasky u8 reserved_1[0x10]; 6680306233Shselasky u8 op_mod[0x10]; 6681306233Shselasky 6682306233Shselasky u8 num_of_samples[0x10]; 6683306233Shselasky u8 sample_index[0x10]; 6684306233Shselasky 6685306233Shselasky u8 reserved_2[0x20]; 6686306233Shselasky}; 6687306233Shselasky 6688306233Shselaskystruct mlx5_ifc_diagnostic_counter_bits { 6689306233Shselasky u8 counter_id[0x10]; 6690306233Shselasky u8 sample_id[0x10]; 6691306233Shselasky 6692306233Shselasky u8 time_stamp_31_0[0x20]; 6693306233Shselasky 6694306233Shselasky u8 counter_value_h[0x20]; 6695306233Shselasky 6696306233Shselasky u8 counter_value_l[0x20]; 6697306233Shselasky}; 6698306233Shselasky 6699308678Shselaskystruct mlx5_ifc_query_diagnostic_counters_out_bits { 6700306233Shselasky u8 status[0x8]; 6701306233Shselasky u8 reserved_0[0x18]; 6702306233Shselasky 6703306233Shselasky u8 syndrome[0x20]; 6704306233Shselasky 6705306233Shselasky u8 reserved_1[0x40]; 6706306233Shselasky 6707306233Shselasky struct mlx5_ifc_diagnostic_counter_bits diag_counter[0]; 6708306233Shselasky}; 6709306233Shselasky 6710290650Shselaskystruct mlx5_ifc_dealloc_q_counter_in_bits { 6711290650Shselasky u8 opcode[0x10]; 6712290650Shselasky u8 reserved_0[0x10]; 6713290650Shselasky 6714290650Shselasky u8 reserved_1[0x10]; 6715290650Shselasky u8 op_mod[0x10]; 6716290650Shselasky 6717290650Shselasky u8 reserved_2[0x18]; 6718290650Shselasky u8 counter_set_id[0x8]; 6719290650Shselasky 6720290650Shselasky u8 reserved_3[0x20]; 6721290650Shselasky}; 6722290650Shselasky 6723290650Shselaskystruct mlx5_ifc_dealloc_pd_out_bits { 6724290650Shselasky u8 status[0x8]; 6725290650Shselasky u8 reserved_0[0x18]; 6726290650Shselasky 6727290650Shselasky u8 syndrome[0x20]; 6728290650Shselasky 6729290650Shselasky u8 reserved_1[0x40]; 6730290650Shselasky}; 6731290650Shselasky 6732290650Shselaskystruct mlx5_ifc_dealloc_pd_in_bits { 6733290650Shselasky u8 opcode[0x10]; 6734290650Shselasky u8 reserved_0[0x10]; 6735290650Shselasky 6736290650Shselasky u8 reserved_1[0x10]; 6737290650Shselasky u8 op_mod[0x10]; 6738290650Shselasky 6739290650Shselasky u8 reserved_2[0x8]; 6740290650Shselasky u8 pd[0x18]; 6741290650Shselasky 6742290650Shselasky u8 reserved_3[0x20]; 6743290650Shselasky}; 6744290650Shselasky 6745290650Shselaskystruct mlx5_ifc_dealloc_flow_counter_out_bits { 6746290650Shselasky u8 status[0x8]; 6747290650Shselasky u8 reserved_0[0x18]; 6748290650Shselasky 6749290650Shselasky u8 syndrome[0x20]; 6750290650Shselasky 6751290650Shselasky u8 reserved_1[0x40]; 6752290650Shselasky}; 6753290650Shselasky 6754290650Shselaskystruct mlx5_ifc_dealloc_flow_counter_in_bits { 6755290650Shselasky u8 opcode[0x10]; 6756290650Shselasky u8 reserved_0[0x10]; 6757290650Shselasky 6758290650Shselasky u8 reserved_1[0x10]; 6759290650Shselasky u8 op_mod[0x10]; 6760290650Shselasky 6761290650Shselasky u8 reserved_2[0x10]; 6762290650Shselasky u8 flow_counter_id[0x10]; 6763290650Shselasky 6764290650Shselasky u8 reserved_3[0x20]; 6765290650Shselasky}; 6766290650Shselasky 6767290650Shselaskystruct mlx5_ifc_deactivate_tracer_out_bits { 6768290650Shselasky u8 status[0x8]; 6769290650Shselasky u8 reserved_0[0x18]; 6770290650Shselasky 6771290650Shselasky u8 syndrome[0x20]; 6772290650Shselasky 6773290650Shselasky u8 reserved_1[0x40]; 6774290650Shselasky}; 6775290650Shselasky 6776290650Shselaskystruct mlx5_ifc_deactivate_tracer_in_bits { 6777290650Shselasky u8 opcode[0x10]; 6778290650Shselasky u8 reserved_0[0x10]; 6779290650Shselasky 6780290650Shselasky u8 reserved_1[0x10]; 6781290650Shselasky u8 op_mod[0x10]; 6782290650Shselasky 6783290650Shselasky u8 mkey[0x20]; 6784290650Shselasky 6785290650Shselasky u8 reserved_2[0x20]; 6786290650Shselasky}; 6787290650Shselasky 6788290650Shselaskystruct mlx5_ifc_create_xrc_srq_out_bits { 6789290650Shselasky u8 status[0x8]; 6790290650Shselasky u8 reserved_0[0x18]; 6791290650Shselasky 6792290650Shselasky u8 syndrome[0x20]; 6793290650Shselasky 6794290650Shselasky u8 reserved_1[0x8]; 6795290650Shselasky u8 xrc_srqn[0x18]; 6796290650Shselasky 6797290650Shselasky u8 reserved_2[0x20]; 6798290650Shselasky}; 6799290650Shselasky 6800290650Shselaskystruct mlx5_ifc_create_xrc_srq_in_bits { 6801290650Shselasky u8 opcode[0x10]; 6802290650Shselasky u8 reserved_0[0x10]; 6803290650Shselasky 6804290650Shselasky u8 reserved_1[0x10]; 6805290650Shselasky u8 op_mod[0x10]; 6806290650Shselasky 6807290650Shselasky u8 reserved_2[0x40]; 6808290650Shselasky 6809290650Shselasky struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry; 6810290650Shselasky 6811290650Shselasky u8 reserved_3[0x600]; 6812290650Shselasky 6813290650Shselasky u8 pas[0][0x40]; 6814290650Shselasky}; 6815290650Shselasky 6816290650Shselaskystruct mlx5_ifc_create_tis_out_bits { 6817290650Shselasky u8 status[0x8]; 6818290650Shselasky u8 reserved_0[0x18]; 6819290650Shselasky 6820290650Shselasky u8 syndrome[0x20]; 6821290650Shselasky 6822290650Shselasky u8 reserved_1[0x8]; 6823290650Shselasky u8 tisn[0x18]; 6824290650Shselasky 6825290650Shselasky u8 reserved_2[0x20]; 6826290650Shselasky}; 6827290650Shselasky 6828290650Shselaskystruct mlx5_ifc_create_tis_in_bits { 6829290650Shselasky u8 opcode[0x10]; 6830290650Shselasky u8 reserved_0[0x10]; 6831290650Shselasky 6832290650Shselasky u8 reserved_1[0x10]; 6833290650Shselasky u8 op_mod[0x10]; 6834290650Shselasky 6835290650Shselasky u8 reserved_2[0xc0]; 6836290650Shselasky 6837290650Shselasky struct mlx5_ifc_tisc_bits ctx; 6838290650Shselasky}; 6839290650Shselasky 6840290650Shselaskystruct mlx5_ifc_create_tir_out_bits { 6841290650Shselasky u8 status[0x8]; 6842290650Shselasky u8 reserved_0[0x18]; 6843290650Shselasky 6844290650Shselasky u8 syndrome[0x20]; 6845290650Shselasky 6846290650Shselasky u8 reserved_1[0x8]; 6847290650Shselasky u8 tirn[0x18]; 6848290650Shselasky 6849290650Shselasky u8 reserved_2[0x20]; 6850290650Shselasky}; 6851290650Shselasky 6852290650Shselaskystruct mlx5_ifc_create_tir_in_bits { 6853290650Shselasky u8 opcode[0x10]; 6854290650Shselasky u8 reserved_0[0x10]; 6855290650Shselasky 6856290650Shselasky u8 reserved_1[0x10]; 6857290650Shselasky u8 op_mod[0x10]; 6858290650Shselasky 6859290650Shselasky u8 reserved_2[0xc0]; 6860290650Shselasky 6861290650Shselasky struct mlx5_ifc_tirc_bits tir_context; 6862290650Shselasky}; 6863290650Shselasky 6864290650Shselaskystruct mlx5_ifc_create_srq_out_bits { 6865290650Shselasky u8 status[0x8]; 6866290650Shselasky u8 reserved_0[0x18]; 6867290650Shselasky 6868290650Shselasky u8 syndrome[0x20]; 6869290650Shselasky 6870290650Shselasky u8 reserved_1[0x8]; 6871290650Shselasky u8 srqn[0x18]; 6872290650Shselasky 6873290650Shselasky u8 reserved_2[0x20]; 6874290650Shselasky}; 6875290650Shselasky 6876290650Shselaskystruct mlx5_ifc_create_srq_in_bits { 6877290650Shselasky u8 opcode[0x10]; 6878290650Shselasky u8 reserved_0[0x10]; 6879290650Shselasky 6880290650Shselasky u8 reserved_1[0x10]; 6881290650Shselasky u8 op_mod[0x10]; 6882290650Shselasky 6883290650Shselasky u8 reserved_2[0x40]; 6884290650Shselasky 6885290650Shselasky struct mlx5_ifc_srqc_bits srq_context_entry; 6886290650Shselasky 6887290650Shselasky u8 reserved_3[0x600]; 6888290650Shselasky 6889290650Shselasky u8 pas[0][0x40]; 6890290650Shselasky}; 6891290650Shselasky 6892290650Shselaskystruct mlx5_ifc_create_sq_out_bits { 6893290650Shselasky u8 status[0x8]; 6894290650Shselasky u8 reserved_0[0x18]; 6895290650Shselasky 6896290650Shselasky u8 syndrome[0x20]; 6897290650Shselasky 6898290650Shselasky u8 reserved_1[0x8]; 6899290650Shselasky u8 sqn[0x18]; 6900290650Shselasky 6901290650Shselasky u8 reserved_2[0x20]; 6902290650Shselasky}; 6903290650Shselasky 6904290650Shselaskystruct mlx5_ifc_create_sq_in_bits { 6905290650Shselasky u8 opcode[0x10]; 6906290650Shselasky u8 reserved_0[0x10]; 6907290650Shselasky 6908290650Shselasky u8 reserved_1[0x10]; 6909290650Shselasky u8 op_mod[0x10]; 6910290650Shselasky 6911290650Shselasky u8 reserved_2[0xc0]; 6912290650Shselasky 6913290650Shselasky struct mlx5_ifc_sqc_bits ctx; 6914290650Shselasky}; 6915290650Shselasky 6916308678Shselaskystruct mlx5_ifc_create_scheduling_element_out_bits { 6917308678Shselasky u8 status[0x8]; 6918308678Shselasky u8 reserved_at_8[0x18]; 6919308678Shselasky 6920308678Shselasky u8 syndrome[0x20]; 6921308678Shselasky 6922308678Shselasky u8 reserved_at_40[0x40]; 6923308678Shselasky 6924308678Shselasky u8 scheduling_element_id[0x20]; 6925308678Shselasky 6926308678Shselasky u8 reserved_at_a0[0x160]; 6927308678Shselasky}; 6928308678Shselasky 6929308678Shselaskyenum { 6930308678Shselasky MLX5_CREATE_SCHEDULING_ELEMENT_IN_SCHEDULING_HIERARCHY_E_SWITCH = 0x2, 6931308678Shselasky}; 6932308678Shselasky 6933308678Shselaskystruct mlx5_ifc_create_scheduling_element_in_bits { 6934308678Shselasky u8 opcode[0x10]; 6935308678Shselasky u8 reserved_at_10[0x10]; 6936308678Shselasky 6937308678Shselasky u8 reserved_at_20[0x10]; 6938308678Shselasky u8 op_mod[0x10]; 6939308678Shselasky 6940308678Shselasky u8 scheduling_hierarchy[0x8]; 6941308678Shselasky u8 reserved_at_48[0x18]; 6942308678Shselasky 6943308678Shselasky u8 reserved_at_60[0xa0]; 6944308678Shselasky 6945308678Shselasky struct mlx5_ifc_scheduling_context_bits scheduling_context; 6946308678Shselasky 6947308678Shselasky u8 reserved_at_300[0x100]; 6948308678Shselasky}; 6949308678Shselasky 6950290650Shselaskystruct mlx5_ifc_create_rqt_out_bits { 6951290650Shselasky u8 status[0x8]; 6952290650Shselasky u8 reserved_0[0x18]; 6953290650Shselasky 6954290650Shselasky u8 syndrome[0x20]; 6955290650Shselasky 6956290650Shselasky u8 reserved_1[0x8]; 6957290650Shselasky u8 rqtn[0x18]; 6958290650Shselasky 6959290650Shselasky u8 reserved_2[0x20]; 6960290650Shselasky}; 6961290650Shselasky 6962290650Shselaskystruct mlx5_ifc_create_rqt_in_bits { 6963290650Shselasky u8 opcode[0x10]; 6964290650Shselasky u8 reserved_0[0x10]; 6965290650Shselasky 6966290650Shselasky u8 reserved_1[0x10]; 6967290650Shselasky u8 op_mod[0x10]; 6968290650Shselasky 6969290650Shselasky u8 reserved_2[0xc0]; 6970290650Shselasky 6971290650Shselasky struct mlx5_ifc_rqtc_bits rqt_context; 6972290650Shselasky}; 6973290650Shselasky 6974290650Shselaskystruct mlx5_ifc_create_rq_out_bits { 6975290650Shselasky u8 status[0x8]; 6976290650Shselasky u8 reserved_0[0x18]; 6977290650Shselasky 6978290650Shselasky u8 syndrome[0x20]; 6979290650Shselasky 6980290650Shselasky u8 reserved_1[0x8]; 6981290650Shselasky u8 rqn[0x18]; 6982290650Shselasky 6983290650Shselasky u8 reserved_2[0x20]; 6984290650Shselasky}; 6985290650Shselasky 6986290650Shselaskystruct mlx5_ifc_create_rq_in_bits { 6987290650Shselasky u8 opcode[0x10]; 6988290650Shselasky u8 reserved_0[0x10]; 6989290650Shselasky 6990290650Shselasky u8 reserved_1[0x10]; 6991290650Shselasky u8 op_mod[0x10]; 6992290650Shselasky 6993290650Shselasky u8 reserved_2[0xc0]; 6994290650Shselasky 6995290650Shselasky struct mlx5_ifc_rqc_bits ctx; 6996290650Shselasky}; 6997290650Shselasky 6998290650Shselaskystruct mlx5_ifc_create_rmp_out_bits { 6999290650Shselasky u8 status[0x8]; 7000290650Shselasky u8 reserved_0[0x18]; 7001290650Shselasky 7002290650Shselasky u8 syndrome[0x20]; 7003290650Shselasky 7004290650Shselasky u8 reserved_1[0x8]; 7005290650Shselasky u8 rmpn[0x18]; 7006290650Shselasky 7007290650Shselasky u8 reserved_2[0x20]; 7008290650Shselasky}; 7009290650Shselasky 7010290650Shselaskystruct mlx5_ifc_create_rmp_in_bits { 7011290650Shselasky u8 opcode[0x10]; 7012290650Shselasky u8 reserved_0[0x10]; 7013290650Shselasky 7014290650Shselasky u8 reserved_1[0x10]; 7015290650Shselasky u8 op_mod[0x10]; 7016290650Shselasky 7017290650Shselasky u8 reserved_2[0xc0]; 7018290650Shselasky 7019290650Shselasky struct mlx5_ifc_rmpc_bits ctx; 7020290650Shselasky}; 7021290650Shselasky 7022290650Shselaskystruct mlx5_ifc_create_qp_out_bits { 7023290650Shselasky u8 status[0x8]; 7024290650Shselasky u8 reserved_0[0x18]; 7025290650Shselasky 7026290650Shselasky u8 syndrome[0x20]; 7027290650Shselasky 7028290650Shselasky u8 reserved_1[0x8]; 7029290650Shselasky u8 qpn[0x18]; 7030290650Shselasky 7031290650Shselasky u8 reserved_2[0x20]; 7032290650Shselasky}; 7033290650Shselasky 7034290650Shselaskystruct mlx5_ifc_create_qp_in_bits { 7035290650Shselasky u8 opcode[0x10]; 7036290650Shselasky u8 reserved_0[0x10]; 7037290650Shselasky 7038290650Shselasky u8 reserved_1[0x10]; 7039290650Shselasky u8 op_mod[0x10]; 7040290650Shselasky 7041306233Shselasky u8 reserved_2[0x8]; 7042306233Shselasky u8 input_qpn[0x18]; 7043290650Shselasky 7044306233Shselasky u8 reserved_3[0x20]; 7045306233Shselasky 7046290650Shselasky u8 opt_param_mask[0x20]; 7047290650Shselasky 7048306233Shselasky u8 reserved_4[0x20]; 7049290650Shselasky 7050290650Shselasky struct mlx5_ifc_qpc_bits qpc; 7051290650Shselasky 7052306233Shselasky u8 reserved_5[0x80]; 7053290650Shselasky 7054290650Shselasky u8 pas[0][0x40]; 7055290650Shselasky}; 7056290650Shselasky 7057308678Shselaskystruct mlx5_ifc_create_qos_para_vport_out_bits { 7058308678Shselasky u8 status[0x8]; 7059308678Shselasky u8 reserved_at_8[0x18]; 7060308678Shselasky 7061308678Shselasky u8 syndrome[0x20]; 7062308678Shselasky 7063308678Shselasky u8 reserved_at_40[0x20]; 7064308678Shselasky 7065308678Shselasky u8 reserved_at_60[0x10]; 7066308678Shselasky u8 qos_para_vport_number[0x10]; 7067308678Shselasky 7068308678Shselasky u8 reserved_at_80[0x180]; 7069308678Shselasky}; 7070308678Shselasky 7071308678Shselaskystruct mlx5_ifc_create_qos_para_vport_in_bits { 7072308678Shselasky u8 opcode[0x10]; 7073308678Shselasky u8 reserved_at_10[0x10]; 7074308678Shselasky 7075308678Shselasky u8 reserved_at_20[0x10]; 7076308678Shselasky u8 op_mod[0x10]; 7077308678Shselasky 7078308678Shselasky u8 reserved_at_40[0x1c0]; 7079308678Shselasky}; 7080308678Shselasky 7081290650Shselaskystruct mlx5_ifc_create_psv_out_bits { 7082290650Shselasky u8 status[0x8]; 7083290650Shselasky u8 reserved_0[0x18]; 7084290650Shselasky 7085290650Shselasky u8 syndrome[0x20]; 7086290650Shselasky 7087290650Shselasky u8 reserved_1[0x40]; 7088290650Shselasky 7089290650Shselasky u8 reserved_2[0x8]; 7090290650Shselasky u8 psv0_index[0x18]; 7091290650Shselasky 7092290650Shselasky u8 reserved_3[0x8]; 7093290650Shselasky u8 psv1_index[0x18]; 7094290650Shselasky 7095290650Shselasky u8 reserved_4[0x8]; 7096290650Shselasky u8 psv2_index[0x18]; 7097290650Shselasky 7098290650Shselasky u8 reserved_5[0x8]; 7099290650Shselasky u8 psv3_index[0x18]; 7100290650Shselasky}; 7101290650Shselasky 7102290650Shselaskystruct mlx5_ifc_create_psv_in_bits { 7103290650Shselasky u8 opcode[0x10]; 7104290650Shselasky u8 reserved_0[0x10]; 7105290650Shselasky 7106290650Shselasky u8 reserved_1[0x10]; 7107290650Shselasky u8 op_mod[0x10]; 7108290650Shselasky 7109290650Shselasky u8 num_psv[0x4]; 7110290650Shselasky u8 reserved_2[0x4]; 7111290650Shselasky u8 pd[0x18]; 7112290650Shselasky 7113290650Shselasky u8 reserved_3[0x20]; 7114290650Shselasky}; 7115290650Shselasky 7116290650Shselaskystruct mlx5_ifc_create_mkey_out_bits { 7117290650Shselasky u8 status[0x8]; 7118290650Shselasky u8 reserved_0[0x18]; 7119290650Shselasky 7120290650Shselasky u8 syndrome[0x20]; 7121290650Shselasky 7122290650Shselasky u8 reserved_1[0x8]; 7123290650Shselasky u8 mkey_index[0x18]; 7124290650Shselasky 7125290650Shselasky u8 reserved_2[0x20]; 7126290650Shselasky}; 7127290650Shselasky 7128290650Shselaskystruct mlx5_ifc_create_mkey_in_bits { 7129290650Shselasky u8 opcode[0x10]; 7130290650Shselasky u8 reserved_0[0x10]; 7131290650Shselasky 7132290650Shselasky u8 reserved_1[0x10]; 7133290650Shselasky u8 op_mod[0x10]; 7134290650Shselasky 7135290650Shselasky u8 reserved_2[0x20]; 7136290650Shselasky 7137290650Shselasky u8 pg_access[0x1]; 7138290650Shselasky u8 reserved_3[0x1f]; 7139290650Shselasky 7140290650Shselasky struct mlx5_ifc_mkc_bits memory_key_mkey_entry; 7141290650Shselasky 7142290650Shselasky u8 reserved_4[0x80]; 7143290650Shselasky 7144290650Shselasky u8 translations_octword_actual_size[0x20]; 7145290650Shselasky 7146290650Shselasky u8 reserved_5[0x560]; 7147290650Shselasky 7148290650Shselasky u8 klm_pas_mtt[0][0x20]; 7149290650Shselasky}; 7150290650Shselasky 7151290650Shselaskystruct mlx5_ifc_create_flow_table_out_bits { 7152290650Shselasky u8 status[0x8]; 7153290650Shselasky u8 reserved_0[0x18]; 7154290650Shselasky 7155290650Shselasky u8 syndrome[0x20]; 7156290650Shselasky 7157290650Shselasky u8 reserved_1[0x8]; 7158290650Shselasky u8 table_id[0x18]; 7159290650Shselasky 7160290650Shselasky u8 reserved_2[0x20]; 7161290650Shselasky}; 7162290650Shselasky 7163290650Shselaskystruct mlx5_ifc_create_flow_table_in_bits { 7164290650Shselasky u8 opcode[0x10]; 7165329200Shselasky u8 reserved_at_10[0x10]; 7166290650Shselasky 7167329200Shselasky u8 reserved_at_20[0x10]; 7168290650Shselasky u8 op_mod[0x10]; 7169290650Shselasky 7170290650Shselasky u8 other_vport[0x1]; 7171329200Shselasky u8 reserved_at_41[0xf]; 7172290650Shselasky u8 vport_number[0x10]; 7173290650Shselasky 7174329200Shselasky u8 reserved_at_60[0x20]; 7175290650Shselasky 7176290650Shselasky u8 table_type[0x8]; 7177329200Shselasky u8 reserved_at_88[0x18]; 7178290650Shselasky 7179329200Shselasky u8 reserved_at_a0[0x20]; 7180290650Shselasky 7181329200Shselasky struct mlx5_ifc_flow_table_context_bits flow_table_context; 7182290650Shselasky}; 7183290650Shselasky 7184290650Shselaskystruct mlx5_ifc_create_flow_group_out_bits { 7185290650Shselasky u8 status[0x8]; 7186290650Shselasky u8 reserved_0[0x18]; 7187290650Shselasky 7188290650Shselasky u8 syndrome[0x20]; 7189290650Shselasky 7190290650Shselasky u8 reserved_1[0x8]; 7191290650Shselasky u8 group_id[0x18]; 7192290650Shselasky 7193290650Shselasky u8 reserved_2[0x20]; 7194290650Shselasky}; 7195290650Shselasky 7196290650Shselaskyenum { 7197290650Shselasky MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0, 7198290650Shselasky MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1, 7199290650Shselasky MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2, 7200290650Shselasky}; 7201290650Shselasky 7202290650Shselaskystruct mlx5_ifc_create_flow_group_in_bits { 7203290650Shselasky u8 opcode[0x10]; 7204290650Shselasky u8 reserved_0[0x10]; 7205290650Shselasky 7206290650Shselasky u8 reserved_1[0x10]; 7207290650Shselasky u8 op_mod[0x10]; 7208290650Shselasky 7209290650Shselasky u8 other_vport[0x1]; 7210290650Shselasky u8 reserved_2[0xf]; 7211290650Shselasky u8 vport_number[0x10]; 7212290650Shselasky 7213290650Shselasky u8 reserved_3[0x20]; 7214290650Shselasky 7215290650Shselasky u8 table_type[0x8]; 7216290650Shselasky u8 reserved_4[0x18]; 7217290650Shselasky 7218290650Shselasky u8 reserved_5[0x8]; 7219290650Shselasky u8 table_id[0x18]; 7220290650Shselasky 7221290650Shselasky u8 reserved_6[0x20]; 7222290650Shselasky 7223290650Shselasky u8 start_flow_index[0x20]; 7224290650Shselasky 7225290650Shselasky u8 reserved_7[0x20]; 7226290650Shselasky 7227290650Shselasky u8 end_flow_index[0x20]; 7228290650Shselasky 7229290650Shselasky u8 reserved_8[0xa0]; 7230290650Shselasky 7231290650Shselasky u8 reserved_9[0x18]; 7232290650Shselasky u8 match_criteria_enable[0x8]; 7233290650Shselasky 7234290650Shselasky struct mlx5_ifc_fte_match_param_bits match_criteria; 7235290650Shselasky 7236290650Shselasky u8 reserved_10[0xe00]; 7237290650Shselasky}; 7238290650Shselasky 7239290650Shselaskystruct mlx5_ifc_create_eq_out_bits { 7240290650Shselasky u8 status[0x8]; 7241290650Shselasky u8 reserved_0[0x18]; 7242290650Shselasky 7243290650Shselasky u8 syndrome[0x20]; 7244290650Shselasky 7245290650Shselasky u8 reserved_1[0x18]; 7246290650Shselasky u8 eq_number[0x8]; 7247290650Shselasky 7248290650Shselasky u8 reserved_2[0x20]; 7249290650Shselasky}; 7250290650Shselasky 7251290650Shselaskystruct mlx5_ifc_create_eq_in_bits { 7252290650Shselasky u8 opcode[0x10]; 7253290650Shselasky u8 reserved_0[0x10]; 7254290650Shselasky 7255290650Shselasky u8 reserved_1[0x10]; 7256290650Shselasky u8 op_mod[0x10]; 7257290650Shselasky 7258290650Shselasky u8 reserved_2[0x40]; 7259290650Shselasky 7260290650Shselasky struct mlx5_ifc_eqc_bits eq_context_entry; 7261290650Shselasky 7262290650Shselasky u8 reserved_3[0x40]; 7263290650Shselasky 7264290650Shselasky u8 event_bitmask[0x40]; 7265290650Shselasky 7266290650Shselasky u8 reserved_4[0x580]; 7267290650Shselasky 7268290650Shselasky u8 pas[0][0x40]; 7269290650Shselasky}; 7270290650Shselasky 7271290650Shselaskystruct mlx5_ifc_create_dct_out_bits { 7272290650Shselasky u8 status[0x8]; 7273290650Shselasky u8 reserved_0[0x18]; 7274290650Shselasky 7275290650Shselasky u8 syndrome[0x20]; 7276290650Shselasky 7277290650Shselasky u8 reserved_1[0x8]; 7278290650Shselasky u8 dctn[0x18]; 7279290650Shselasky 7280290650Shselasky u8 reserved_2[0x20]; 7281290650Shselasky}; 7282290650Shselasky 7283290650Shselaskystruct mlx5_ifc_create_dct_in_bits { 7284290650Shselasky u8 opcode[0x10]; 7285290650Shselasky u8 reserved_0[0x10]; 7286290650Shselasky 7287290650Shselasky u8 reserved_1[0x10]; 7288290650Shselasky u8 op_mod[0x10]; 7289290650Shselasky 7290290650Shselasky u8 reserved_2[0x40]; 7291290650Shselasky 7292290650Shselasky struct mlx5_ifc_dctc_bits dct_context_entry; 7293290650Shselasky 7294290650Shselasky u8 reserved_3[0x180]; 7295290650Shselasky}; 7296290650Shselasky 7297290650Shselaskystruct mlx5_ifc_create_cq_out_bits { 7298290650Shselasky u8 status[0x8]; 7299290650Shselasky u8 reserved_0[0x18]; 7300290650Shselasky 7301290650Shselasky u8 syndrome[0x20]; 7302290650Shselasky 7303290650Shselasky u8 reserved_1[0x8]; 7304290650Shselasky u8 cqn[0x18]; 7305290650Shselasky 7306290650Shselasky u8 reserved_2[0x20]; 7307290650Shselasky}; 7308290650Shselasky 7309290650Shselaskystruct mlx5_ifc_create_cq_in_bits { 7310290650Shselasky u8 opcode[0x10]; 7311290650Shselasky u8 reserved_0[0x10]; 7312290650Shselasky 7313290650Shselasky u8 reserved_1[0x10]; 7314290650Shselasky u8 op_mod[0x10]; 7315290650Shselasky 7316290650Shselasky u8 reserved_2[0x40]; 7317290650Shselasky 7318290650Shselasky struct mlx5_ifc_cqc_bits cq_context; 7319290650Shselasky 7320290650Shselasky u8 reserved_3[0x600]; 7321290650Shselasky 7322290650Shselasky u8 pas[0][0x40]; 7323290650Shselasky}; 7324290650Shselasky 7325290650Shselaskystruct mlx5_ifc_config_int_moderation_out_bits { 7326290650Shselasky u8 status[0x8]; 7327290650Shselasky u8 reserved_0[0x18]; 7328290650Shselasky 7329290650Shselasky u8 syndrome[0x20]; 7330290650Shselasky 7331290650Shselasky u8 reserved_1[0x4]; 7332290650Shselasky u8 min_delay[0xc]; 7333290650Shselasky u8 int_vector[0x10]; 7334290650Shselasky 7335290650Shselasky u8 reserved_2[0x20]; 7336290650Shselasky}; 7337290650Shselasky 7338290650Shselaskyenum { 7339290650Shselasky MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0, 7340290650Shselasky MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1, 7341290650Shselasky}; 7342290650Shselasky 7343290650Shselaskystruct mlx5_ifc_config_int_moderation_in_bits { 7344290650Shselasky u8 opcode[0x10]; 7345290650Shselasky u8 reserved_0[0x10]; 7346290650Shselasky 7347290650Shselasky u8 reserved_1[0x10]; 7348290650Shselasky u8 op_mod[0x10]; 7349290650Shselasky 7350290650Shselasky u8 reserved_2[0x4]; 7351290650Shselasky u8 min_delay[0xc]; 7352290650Shselasky u8 int_vector[0x10]; 7353290650Shselasky 7354290650Shselasky u8 reserved_3[0x20]; 7355290650Shselasky}; 7356290650Shselasky 7357290650Shselaskystruct mlx5_ifc_attach_to_mcg_out_bits { 7358290650Shselasky u8 status[0x8]; 7359290650Shselasky u8 reserved_0[0x18]; 7360290650Shselasky 7361290650Shselasky u8 syndrome[0x20]; 7362290650Shselasky 7363290650Shselasky u8 reserved_1[0x40]; 7364290650Shselasky}; 7365290650Shselasky 7366290650Shselaskystruct mlx5_ifc_attach_to_mcg_in_bits { 7367290650Shselasky u8 opcode[0x10]; 7368290650Shselasky u8 reserved_0[0x10]; 7369290650Shselasky 7370290650Shselasky u8 reserved_1[0x10]; 7371290650Shselasky u8 op_mod[0x10]; 7372290650Shselasky 7373290650Shselasky u8 reserved_2[0x8]; 7374290650Shselasky u8 qpn[0x18]; 7375290650Shselasky 7376290650Shselasky u8 reserved_3[0x20]; 7377290650Shselasky 7378290650Shselasky u8 multicast_gid[16][0x8]; 7379290650Shselasky}; 7380290650Shselasky 7381290650Shselaskystruct mlx5_ifc_arm_xrc_srq_out_bits { 7382290650Shselasky u8 status[0x8]; 7383290650Shselasky u8 reserved_0[0x18]; 7384290650Shselasky 7385290650Shselasky u8 syndrome[0x20]; 7386290650Shselasky 7387290650Shselasky u8 reserved_1[0x40]; 7388290650Shselasky}; 7389290650Shselasky 7390290650Shselaskyenum { 7391290650Shselasky MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1, 7392290650Shselasky}; 7393290650Shselasky 7394290650Shselaskystruct mlx5_ifc_arm_xrc_srq_in_bits { 7395290650Shselasky u8 opcode[0x10]; 7396290650Shselasky u8 reserved_0[0x10]; 7397290650Shselasky 7398290650Shselasky u8 reserved_1[0x10]; 7399290650Shselasky u8 op_mod[0x10]; 7400290650Shselasky 7401290650Shselasky u8 reserved_2[0x8]; 7402290650Shselasky u8 xrc_srqn[0x18]; 7403290650Shselasky 7404290650Shselasky u8 reserved_3[0x10]; 7405290650Shselasky u8 lwm[0x10]; 7406290650Shselasky}; 7407290650Shselasky 7408290650Shselaskystruct mlx5_ifc_arm_rq_out_bits { 7409290650Shselasky u8 status[0x8]; 7410290650Shselasky u8 reserved_0[0x18]; 7411290650Shselasky 7412290650Shselasky u8 syndrome[0x20]; 7413290650Shselasky 7414290650Shselasky u8 reserved_1[0x40]; 7415290650Shselasky}; 7416290650Shselasky 7417290650Shselaskyenum { 7418290650Shselasky MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1, 7419290650Shselasky}; 7420290650Shselasky 7421290650Shselaskystruct mlx5_ifc_arm_rq_in_bits { 7422290650Shselasky u8 opcode[0x10]; 7423290650Shselasky u8 reserved_0[0x10]; 7424290650Shselasky 7425290650Shselasky u8 reserved_1[0x10]; 7426290650Shselasky u8 op_mod[0x10]; 7427290650Shselasky 7428290650Shselasky u8 reserved_2[0x8]; 7429290650Shselasky u8 srq_number[0x18]; 7430290650Shselasky 7431290650Shselasky u8 reserved_3[0x10]; 7432290650Shselasky u8 lwm[0x10]; 7433290650Shselasky}; 7434290650Shselasky 7435290650Shselaskystruct mlx5_ifc_arm_dct_out_bits { 7436290650Shselasky u8 status[0x8]; 7437290650Shselasky u8 reserved_0[0x18]; 7438290650Shselasky 7439290650Shselasky u8 syndrome[0x20]; 7440290650Shselasky 7441290650Shselasky u8 reserved_1[0x40]; 7442290650Shselasky}; 7443290650Shselasky 7444290650Shselaskystruct mlx5_ifc_arm_dct_in_bits { 7445290650Shselasky u8 opcode[0x10]; 7446290650Shselasky u8 reserved_0[0x10]; 7447290650Shselasky 7448290650Shselasky u8 reserved_1[0x10]; 7449290650Shselasky u8 op_mod[0x10]; 7450290650Shselasky 7451290650Shselasky u8 reserved_2[0x8]; 7452290650Shselasky u8 dctn[0x18]; 7453290650Shselasky 7454290650Shselasky u8 reserved_3[0x20]; 7455290650Shselasky}; 7456290650Shselasky 7457290650Shselaskystruct mlx5_ifc_alloc_xrcd_out_bits { 7458290650Shselasky u8 status[0x8]; 7459290650Shselasky u8 reserved_0[0x18]; 7460290650Shselasky 7461290650Shselasky u8 syndrome[0x20]; 7462290650Shselasky 7463290650Shselasky u8 reserved_1[0x8]; 7464290650Shselasky u8 xrcd[0x18]; 7465290650Shselasky 7466290650Shselasky u8 reserved_2[0x20]; 7467290650Shselasky}; 7468290650Shselasky 7469290650Shselaskystruct mlx5_ifc_alloc_xrcd_in_bits { 7470290650Shselasky u8 opcode[0x10]; 7471290650Shselasky u8 reserved_0[0x10]; 7472290650Shselasky 7473290650Shselasky u8 reserved_1[0x10]; 7474290650Shselasky u8 op_mod[0x10]; 7475290650Shselasky 7476290650Shselasky u8 reserved_2[0x40]; 7477290650Shselasky}; 7478290650Shselasky 7479290650Shselaskystruct mlx5_ifc_alloc_uar_out_bits { 7480290650Shselasky u8 status[0x8]; 7481290650Shselasky u8 reserved_0[0x18]; 7482290650Shselasky 7483290650Shselasky u8 syndrome[0x20]; 7484290650Shselasky 7485290650Shselasky u8 reserved_1[0x8]; 7486290650Shselasky u8 uar[0x18]; 7487290650Shselasky 7488290650Shselasky u8 reserved_2[0x20]; 7489290650Shselasky}; 7490290650Shselasky 7491290650Shselaskystruct mlx5_ifc_alloc_uar_in_bits { 7492290650Shselasky u8 opcode[0x10]; 7493290650Shselasky u8 reserved_0[0x10]; 7494290650Shselasky 7495290650Shselasky u8 reserved_1[0x10]; 7496290650Shselasky u8 op_mod[0x10]; 7497290650Shselasky 7498290650Shselasky u8 reserved_2[0x40]; 7499290650Shselasky}; 7500290650Shselasky 7501290650Shselaskystruct mlx5_ifc_alloc_transport_domain_out_bits { 7502290650Shselasky u8 status[0x8]; 7503290650Shselasky u8 reserved_0[0x18]; 7504290650Shselasky 7505290650Shselasky u8 syndrome[0x20]; 7506290650Shselasky 7507290650Shselasky u8 reserved_1[0x8]; 7508290650Shselasky u8 transport_domain[0x18]; 7509290650Shselasky 7510290650Shselasky u8 reserved_2[0x20]; 7511290650Shselasky}; 7512290650Shselasky 7513290650Shselaskystruct mlx5_ifc_alloc_transport_domain_in_bits { 7514290650Shselasky u8 opcode[0x10]; 7515290650Shselasky u8 reserved_0[0x10]; 7516290650Shselasky 7517290650Shselasky u8 reserved_1[0x10]; 7518290650Shselasky u8 op_mod[0x10]; 7519290650Shselasky 7520290650Shselasky u8 reserved_2[0x40]; 7521290650Shselasky}; 7522290650Shselasky 7523290650Shselaskystruct mlx5_ifc_alloc_q_counter_out_bits { 7524290650Shselasky u8 status[0x8]; 7525290650Shselasky u8 reserved_0[0x18]; 7526290650Shselasky 7527290650Shselasky u8 syndrome[0x20]; 7528290650Shselasky 7529290650Shselasky u8 reserved_1[0x18]; 7530290650Shselasky u8 counter_set_id[0x8]; 7531290650Shselasky 7532290650Shselasky u8 reserved_2[0x20]; 7533290650Shselasky}; 7534290650Shselasky 7535290650Shselaskystruct mlx5_ifc_alloc_q_counter_in_bits { 7536290650Shselasky u8 opcode[0x10]; 7537290650Shselasky u8 reserved_0[0x10]; 7538290650Shselasky 7539290650Shselasky u8 reserved_1[0x10]; 7540290650Shselasky u8 op_mod[0x10]; 7541290650Shselasky 7542290650Shselasky u8 reserved_2[0x40]; 7543290650Shselasky}; 7544290650Shselasky 7545290650Shselaskystruct mlx5_ifc_alloc_pd_out_bits { 7546290650Shselasky u8 status[0x8]; 7547290650Shselasky u8 reserved_0[0x18]; 7548290650Shselasky 7549290650Shselasky u8 syndrome[0x20]; 7550290650Shselasky 7551290650Shselasky u8 reserved_1[0x8]; 7552290650Shselasky u8 pd[0x18]; 7553290650Shselasky 7554290650Shselasky u8 reserved_2[0x20]; 7555290650Shselasky}; 7556290650Shselasky 7557290650Shselaskystruct mlx5_ifc_alloc_pd_in_bits { 7558290650Shselasky u8 opcode[0x10]; 7559290650Shselasky u8 reserved_0[0x10]; 7560290650Shselasky 7561290650Shselasky u8 reserved_1[0x10]; 7562290650Shselasky u8 op_mod[0x10]; 7563290650Shselasky 7564290650Shselasky u8 reserved_2[0x40]; 7565290650Shselasky}; 7566290650Shselasky 7567290650Shselaskystruct mlx5_ifc_alloc_flow_counter_out_bits { 7568290650Shselasky u8 status[0x8]; 7569290650Shselasky u8 reserved_0[0x18]; 7570290650Shselasky 7571290650Shselasky u8 syndrome[0x20]; 7572290650Shselasky 7573290650Shselasky u8 reserved_1[0x10]; 7574290650Shselasky u8 flow_counter_id[0x10]; 7575290650Shselasky 7576290650Shselasky u8 reserved_2[0x20]; 7577290650Shselasky}; 7578290650Shselasky 7579290650Shselaskystruct mlx5_ifc_alloc_flow_counter_in_bits { 7580290650Shselasky u8 opcode[0x10]; 7581290650Shselasky u8 reserved_0[0x10]; 7582290650Shselasky 7583290650Shselasky u8 reserved_1[0x10]; 7584290650Shselasky u8 op_mod[0x10]; 7585290650Shselasky 7586290650Shselasky u8 reserved_2[0x40]; 7587290650Shselasky}; 7588290650Shselasky 7589290650Shselaskystruct mlx5_ifc_add_vxlan_udp_dport_out_bits { 7590290650Shselasky u8 status[0x8]; 7591290650Shselasky u8 reserved_0[0x18]; 7592290650Shselasky 7593290650Shselasky u8 syndrome[0x20]; 7594290650Shselasky 7595290650Shselasky u8 reserved_1[0x40]; 7596290650Shselasky}; 7597290650Shselasky 7598290650Shselaskystruct mlx5_ifc_add_vxlan_udp_dport_in_bits { 7599290650Shselasky u8 opcode[0x10]; 7600290650Shselasky u8 reserved_0[0x10]; 7601290650Shselasky 7602290650Shselasky u8 reserved_1[0x10]; 7603290650Shselasky u8 op_mod[0x10]; 7604290650Shselasky 7605290650Shselasky u8 reserved_2[0x20]; 7606290650Shselasky 7607290650Shselasky u8 reserved_3[0x10]; 7608290650Shselasky u8 vxlan_udp_port[0x10]; 7609290650Shselasky}; 7610290650Shselasky 7611290650Shselaskystruct mlx5_ifc_activate_tracer_out_bits { 7612290650Shselasky u8 status[0x8]; 7613290650Shselasky u8 reserved_0[0x18]; 7614290650Shselasky 7615290650Shselasky u8 syndrome[0x20]; 7616290650Shselasky 7617290650Shselasky u8 reserved_1[0x40]; 7618290650Shselasky}; 7619290650Shselasky 7620290650Shselaskystruct mlx5_ifc_activate_tracer_in_bits { 7621290650Shselasky u8 opcode[0x10]; 7622290650Shselasky u8 reserved_0[0x10]; 7623290650Shselasky 7624290650Shselasky u8 reserved_1[0x10]; 7625290650Shselasky u8 op_mod[0x10]; 7626290650Shselasky 7627290650Shselasky u8 mkey[0x20]; 7628290650Shselasky 7629290650Shselasky u8 reserved_2[0x20]; 7630290650Shselasky}; 7631290650Shselasky 7632306233Shselaskystruct mlx5_ifc_set_rate_limit_out_bits { 7633306233Shselasky u8 status[0x8]; 7634306233Shselasky u8 reserved_at_8[0x18]; 7635306233Shselasky 7636306233Shselasky u8 syndrome[0x20]; 7637306233Shselasky 7638306233Shselasky u8 reserved_at_40[0x40]; 7639306233Shselasky}; 7640306233Shselasky 7641306233Shselaskystruct mlx5_ifc_set_rate_limit_in_bits { 7642306233Shselasky u8 opcode[0x10]; 7643306233Shselasky u8 reserved_at_10[0x10]; 7644306233Shselasky 7645306233Shselasky u8 reserved_at_20[0x10]; 7646306233Shselasky u8 op_mod[0x10]; 7647306233Shselasky 7648306233Shselasky u8 reserved_at_40[0x10]; 7649306233Shselasky u8 rate_limit_index[0x10]; 7650306233Shselasky 7651306233Shselasky u8 reserved_at_60[0x20]; 7652306233Shselasky 7653306233Shselasky u8 rate_limit[0x20]; 7654308678Shselasky u8 burst_upper_bound[0x20]; 7655306233Shselasky}; 7656306233Shselasky 7657290650Shselaskystruct mlx5_ifc_access_register_out_bits { 7658290650Shselasky u8 status[0x8]; 7659290650Shselasky u8 reserved_0[0x18]; 7660290650Shselasky 7661290650Shselasky u8 syndrome[0x20]; 7662290650Shselasky 7663290650Shselasky u8 reserved_1[0x40]; 7664290650Shselasky 7665290650Shselasky u8 register_data[0][0x20]; 7666290650Shselasky}; 7667290650Shselasky 7668290650Shselaskyenum { 7669290650Shselasky MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0, 7670290650Shselasky MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1, 7671290650Shselasky}; 7672290650Shselasky 7673290650Shselaskystruct mlx5_ifc_access_register_in_bits { 7674290650Shselasky u8 opcode[0x10]; 7675290650Shselasky u8 reserved_0[0x10]; 7676290650Shselasky 7677290650Shselasky u8 reserved_1[0x10]; 7678290650Shselasky u8 op_mod[0x10]; 7679290650Shselasky 7680290650Shselasky u8 reserved_2[0x10]; 7681290650Shselasky u8 register_id[0x10]; 7682290650Shselasky 7683290650Shselasky u8 argument[0x20]; 7684290650Shselasky 7685290650Shselasky u8 register_data[0][0x20]; 7686290650Shselasky}; 7687290650Shselasky 7688290650Shselaskystruct mlx5_ifc_sltp_reg_bits { 7689290650Shselasky u8 status[0x4]; 7690290650Shselasky u8 version[0x4]; 7691290650Shselasky u8 local_port[0x8]; 7692290650Shselasky u8 pnat[0x2]; 7693290650Shselasky u8 reserved_0[0x2]; 7694290650Shselasky u8 lane[0x4]; 7695290650Shselasky u8 reserved_1[0x8]; 7696290650Shselasky 7697290650Shselasky u8 reserved_2[0x20]; 7698290650Shselasky 7699290650Shselasky u8 reserved_3[0x7]; 7700290650Shselasky u8 polarity[0x1]; 7701290650Shselasky u8 ob_tap0[0x8]; 7702290650Shselasky u8 ob_tap1[0x8]; 7703290650Shselasky u8 ob_tap2[0x8]; 7704290650Shselasky 7705290650Shselasky u8 reserved_4[0xc]; 7706290650Shselasky u8 ob_preemp_mode[0x4]; 7707290650Shselasky u8 ob_reg[0x8]; 7708290650Shselasky u8 ob_bias[0x8]; 7709290650Shselasky 7710290650Shselasky u8 reserved_5[0x20]; 7711290650Shselasky}; 7712290650Shselasky 7713290650Shselaskystruct mlx5_ifc_slrp_reg_bits { 7714290650Shselasky u8 status[0x4]; 7715290650Shselasky u8 version[0x4]; 7716290650Shselasky u8 local_port[0x8]; 7717290650Shselasky u8 pnat[0x2]; 7718290650Shselasky u8 reserved_0[0x2]; 7719290650Shselasky u8 lane[0x4]; 7720290650Shselasky u8 reserved_1[0x8]; 7721290650Shselasky 7722290650Shselasky u8 ib_sel[0x2]; 7723290650Shselasky u8 reserved_2[0x11]; 7724290650Shselasky u8 dp_sel[0x1]; 7725290650Shselasky u8 dp90sel[0x4]; 7726290650Shselasky u8 mix90phase[0x8]; 7727290650Shselasky 7728290650Shselasky u8 ffe_tap0[0x8]; 7729290650Shselasky u8 ffe_tap1[0x8]; 7730290650Shselasky u8 ffe_tap2[0x8]; 7731290650Shselasky u8 ffe_tap3[0x8]; 7732290650Shselasky 7733290650Shselasky u8 ffe_tap4[0x8]; 7734290650Shselasky u8 ffe_tap5[0x8]; 7735290650Shselasky u8 ffe_tap6[0x8]; 7736290650Shselasky u8 ffe_tap7[0x8]; 7737290650Shselasky 7738290650Shselasky u8 ffe_tap8[0x8]; 7739290650Shselasky u8 mixerbias_tap_amp[0x8]; 7740290650Shselasky u8 reserved_3[0x7]; 7741290650Shselasky u8 ffe_tap_en[0x9]; 7742290650Shselasky 7743290650Shselasky u8 ffe_tap_offset0[0x8]; 7744290650Shselasky u8 ffe_tap_offset1[0x8]; 7745290650Shselasky u8 slicer_offset0[0x10]; 7746290650Shselasky 7747290650Shselasky u8 mixer_offset0[0x10]; 7748290650Shselasky u8 mixer_offset1[0x10]; 7749290650Shselasky 7750290650Shselasky u8 mixerbgn_inp[0x8]; 7751290650Shselasky u8 mixerbgn_inn[0x8]; 7752290650Shselasky u8 mixerbgn_refp[0x8]; 7753290650Shselasky u8 mixerbgn_refn[0x8]; 7754290650Shselasky 7755290650Shselasky u8 sel_slicer_lctrl_h[0x1]; 7756290650Shselasky u8 sel_slicer_lctrl_l[0x1]; 7757290650Shselasky u8 reserved_4[0x1]; 7758290650Shselasky u8 ref_mixer_vreg[0x5]; 7759290650Shselasky u8 slicer_gctrl[0x8]; 7760290650Shselasky u8 lctrl_input[0x8]; 7761290650Shselasky u8 mixer_offset_cm1[0x8]; 7762290650Shselasky 7763290650Shselasky u8 common_mode[0x6]; 7764290650Shselasky u8 reserved_5[0x1]; 7765290650Shselasky u8 mixer_offset_cm0[0x9]; 7766290650Shselasky u8 reserved_6[0x7]; 7767290650Shselasky u8 slicer_offset_cm[0x9]; 7768290650Shselasky}; 7769290650Shselasky 7770290650Shselaskystruct mlx5_ifc_slrg_reg_bits { 7771290650Shselasky u8 status[0x4]; 7772290650Shselasky u8 version[0x4]; 7773290650Shselasky u8 local_port[0x8]; 7774290650Shselasky u8 pnat[0x2]; 7775290650Shselasky u8 reserved_0[0x2]; 7776290650Shselasky u8 lane[0x4]; 7777290650Shselasky u8 reserved_1[0x8]; 7778290650Shselasky 7779290650Shselasky u8 time_to_link_up[0x10]; 7780290650Shselasky u8 reserved_2[0xc]; 7781290650Shselasky u8 grade_lane_speed[0x4]; 7782290650Shselasky 7783290650Shselasky u8 grade_version[0x8]; 7784290650Shselasky u8 grade[0x18]; 7785290650Shselasky 7786290650Shselasky u8 reserved_3[0x4]; 7787290650Shselasky u8 height_grade_type[0x4]; 7788290650Shselasky u8 height_grade[0x18]; 7789290650Shselasky 7790290650Shselasky u8 height_dz[0x10]; 7791290650Shselasky u8 height_dv[0x10]; 7792290650Shselasky 7793290650Shselasky u8 reserved_4[0x10]; 7794290650Shselasky u8 height_sigma[0x10]; 7795290650Shselasky 7796290650Shselasky u8 reserved_5[0x20]; 7797290650Shselasky 7798290650Shselasky u8 reserved_6[0x4]; 7799290650Shselasky u8 phase_grade_type[0x4]; 7800290650Shselasky u8 phase_grade[0x18]; 7801290650Shselasky 7802290650Shselasky u8 reserved_7[0x8]; 7803290650Shselasky u8 phase_eo_pos[0x8]; 7804290650Shselasky u8 reserved_8[0x8]; 7805290650Shselasky u8 phase_eo_neg[0x8]; 7806290650Shselasky 7807290650Shselasky u8 ffe_set_tested[0x10]; 7808290650Shselasky u8 test_errors_per_lane[0x10]; 7809290650Shselasky}; 7810290650Shselasky 7811290650Shselaskystruct mlx5_ifc_pvlc_reg_bits { 7812290650Shselasky u8 reserved_0[0x8]; 7813290650Shselasky u8 local_port[0x8]; 7814290650Shselasky u8 reserved_1[0x10]; 7815290650Shselasky 7816290650Shselasky u8 reserved_2[0x1c]; 7817290650Shselasky u8 vl_hw_cap[0x4]; 7818290650Shselasky 7819290650Shselasky u8 reserved_3[0x1c]; 7820290650Shselasky u8 vl_admin[0x4]; 7821290650Shselasky 7822290650Shselasky u8 reserved_4[0x1c]; 7823290650Shselasky u8 vl_operational[0x4]; 7824290650Shselasky}; 7825290650Shselasky 7826290650Shselaskystruct mlx5_ifc_pude_reg_bits { 7827290650Shselasky u8 swid[0x8]; 7828290650Shselasky u8 local_port[0x8]; 7829290650Shselasky u8 reserved_0[0x4]; 7830290650Shselasky u8 admin_status[0x4]; 7831290650Shselasky u8 reserved_1[0x4]; 7832290650Shselasky u8 oper_status[0x4]; 7833290650Shselasky 7834290650Shselasky u8 reserved_2[0x60]; 7835290650Shselasky}; 7836290650Shselasky 7837290650Shselaskyenum { 7838290650Shselasky MLX5_PTYS_REG_PROTO_MASK_INFINIBAND = 0x1, 7839290650Shselasky MLX5_PTYS_REG_PROTO_MASK_ETHERNET = 0x4, 7840290650Shselasky}; 7841290650Shselasky 7842290650Shselaskystruct mlx5_ifc_ptys_reg_bits { 7843306233Shselasky u8 reserved_0[0x1]; 7844306233Shselasky u8 an_disable_admin[0x1]; 7845306233Shselasky u8 an_disable_cap[0x1]; 7846306233Shselasky u8 reserved_1[0x4]; 7847306233Shselasky u8 force_tx_aba_param[0x1]; 7848290650Shselasky u8 local_port[0x8]; 7849306233Shselasky u8 reserved_2[0xd]; 7850290650Shselasky u8 proto_mask[0x3]; 7851290650Shselasky 7852306233Shselasky u8 an_status[0x4]; 7853306233Shselasky u8 reserved_3[0xc]; 7854306233Shselasky u8 data_rate_oper[0x10]; 7855290650Shselasky 7856347855Shselasky u8 ext_eth_proto_capability[0x20]; 7857306233Shselasky 7858290650Shselasky u8 eth_proto_capability[0x20]; 7859290650Shselasky 7860290650Shselasky u8 ib_link_width_capability[0x10]; 7861290650Shselasky u8 ib_proto_capability[0x10]; 7862290650Shselasky 7863347855Shselasky u8 ext_eth_proto_admin[0x20]; 7864290650Shselasky 7865290650Shselasky u8 eth_proto_admin[0x20]; 7866290650Shselasky 7867290650Shselasky u8 ib_link_width_admin[0x10]; 7868290650Shselasky u8 ib_proto_admin[0x10]; 7869290650Shselasky 7870347855Shselasky u8 ext_eth_proto_oper[0x20]; 7871290650Shselasky 7872290650Shselasky u8 eth_proto_oper[0x20]; 7873290650Shselasky 7874290650Shselasky u8 ib_link_width_oper[0x10]; 7875290650Shselasky u8 ib_proto_oper[0x10]; 7876290650Shselasky 7877347855Shselasky u8 reserved_4[0x1c]; 7878347855Shselasky u8 connector_type[0x4]; 7879290650Shselasky 7880290650Shselasky u8 eth_proto_lp_advertise[0x20]; 7881290650Shselasky 7882306233Shselasky u8 reserved_5[0x60]; 7883290650Shselasky}; 7884290650Shselasky 7885290650Shselaskystruct mlx5_ifc_ptas_reg_bits { 7886290650Shselasky u8 reserved_0[0x20]; 7887290650Shselasky 7888290650Shselasky u8 algorithm_options[0x10]; 7889290650Shselasky u8 reserved_1[0x4]; 7890290650Shselasky u8 repetitions_mode[0x4]; 7891290650Shselasky u8 num_of_repetitions[0x8]; 7892290650Shselasky 7893290650Shselasky u8 grade_version[0x8]; 7894290650Shselasky u8 height_grade_type[0x4]; 7895290650Shselasky u8 phase_grade_type[0x4]; 7896290650Shselasky u8 height_grade_weight[0x8]; 7897290650Shselasky u8 phase_grade_weight[0x8]; 7898290650Shselasky 7899290650Shselasky u8 gisim_measure_bits[0x10]; 7900290650Shselasky u8 adaptive_tap_measure_bits[0x10]; 7901290650Shselasky 7902290650Shselasky u8 ber_bath_high_error_threshold[0x10]; 7903290650Shselasky u8 ber_bath_mid_error_threshold[0x10]; 7904290650Shselasky 7905290650Shselasky u8 ber_bath_low_error_threshold[0x10]; 7906290650Shselasky u8 one_ratio_high_threshold[0x10]; 7907290650Shselasky 7908290650Shselasky u8 one_ratio_high_mid_threshold[0x10]; 7909290650Shselasky u8 one_ratio_low_mid_threshold[0x10]; 7910290650Shselasky 7911290650Shselasky u8 one_ratio_low_threshold[0x10]; 7912290650Shselasky u8 ndeo_error_threshold[0x10]; 7913290650Shselasky 7914290650Shselasky u8 mixer_offset_step_size[0x10]; 7915290650Shselasky u8 reserved_2[0x8]; 7916290650Shselasky u8 mix90_phase_for_voltage_bath[0x8]; 7917290650Shselasky 7918290650Shselasky u8 mixer_offset_start[0x10]; 7919290650Shselasky u8 mixer_offset_end[0x10]; 7920290650Shselasky 7921290650Shselasky u8 reserved_3[0x15]; 7922290650Shselasky u8 ber_test_time[0xb]; 7923290650Shselasky}; 7924290650Shselasky 7925290650Shselaskystruct mlx5_ifc_pspa_reg_bits { 7926290650Shselasky u8 swid[0x8]; 7927290650Shselasky u8 local_port[0x8]; 7928290650Shselasky u8 sub_port[0x8]; 7929290650Shselasky u8 reserved_0[0x8]; 7930290650Shselasky 7931290650Shselasky u8 reserved_1[0x20]; 7932290650Shselasky}; 7933290650Shselasky 7934290650Shselaskystruct mlx5_ifc_ppsc_reg_bits { 7935290650Shselasky u8 reserved_0[0x8]; 7936290650Shselasky u8 local_port[0x8]; 7937290650Shselasky u8 reserved_1[0x10]; 7938290650Shselasky 7939290650Shselasky u8 reserved_2[0x60]; 7940290650Shselasky 7941290650Shselasky u8 reserved_3[0x1c]; 7942290650Shselasky u8 wrps_admin[0x4]; 7943290650Shselasky 7944290650Shselasky u8 reserved_4[0x1c]; 7945290650Shselasky u8 wrps_status[0x4]; 7946290650Shselasky 7947290650Shselasky u8 up_th_vld[0x1]; 7948290650Shselasky u8 down_th_vld[0x1]; 7949290650Shselasky u8 reserved_5[0x6]; 7950290650Shselasky u8 up_threshold[0x8]; 7951290650Shselasky u8 reserved_6[0x8]; 7952290650Shselasky u8 down_threshold[0x8]; 7953290650Shselasky 7954290650Shselasky u8 reserved_7[0x20]; 7955290650Shselasky 7956290650Shselasky u8 reserved_8[0x1c]; 7957290650Shselasky u8 srps_admin[0x4]; 7958290650Shselasky 7959290650Shselasky u8 reserved_9[0x60]; 7960290650Shselasky}; 7961290650Shselasky 7962290650Shselaskystruct mlx5_ifc_pplr_reg_bits { 7963290650Shselasky u8 reserved_0[0x8]; 7964290650Shselasky u8 local_port[0x8]; 7965290650Shselasky u8 reserved_1[0x10]; 7966290650Shselasky 7967290650Shselasky u8 reserved_2[0x8]; 7968290650Shselasky u8 lb_cap[0x8]; 7969290650Shselasky u8 reserved_3[0x8]; 7970290650Shselasky u8 lb_en[0x8]; 7971290650Shselasky}; 7972290650Shselasky 7973290650Shselaskystruct mlx5_ifc_pplm_reg_bits { 7974353244Shselasky u8 reserved_at_0[0x8]; 7975353244Shselasky u8 local_port[0x8]; 7976353244Shselasky u8 reserved_at_10[0x10]; 7977290650Shselasky 7978353244Shselasky u8 reserved_at_20[0x20]; 7979290650Shselasky 7980353244Shselasky u8 port_profile_mode[0x8]; 7981353244Shselasky u8 static_port_profile[0x8]; 7982353244Shselasky u8 active_port_profile[0x8]; 7983353244Shselasky u8 reserved_at_58[0x8]; 7984290650Shselasky 7985353244Shselasky u8 retransmission_active[0x8]; 7986353244Shselasky u8 fec_mode_active[0x18]; 7987290650Shselasky 7988353244Shselasky u8 rs_fec_correction_bypass_cap[0x4]; 7989353244Shselasky u8 reserved_at_84[0x8]; 7990353244Shselasky u8 fec_override_cap_56g[0x4]; 7991353244Shselasky u8 fec_override_cap_100g[0x4]; 7992353244Shselasky u8 fec_override_cap_50g[0x4]; 7993353244Shselasky u8 fec_override_cap_25g[0x4]; 7994353244Shselasky u8 fec_override_cap_10g_40g[0x4]; 7995290650Shselasky 7996353244Shselasky u8 rs_fec_correction_bypass_admin[0x4]; 7997353244Shselasky u8 reserved_at_a4[0x8]; 7998353244Shselasky u8 fec_override_admin_56g[0x4]; 7999353244Shselasky u8 fec_override_admin_100g[0x4]; 8000353244Shselasky u8 fec_override_admin_50g[0x4]; 8001353244Shselasky u8 fec_override_admin_25g[0x4]; 8002353244Shselasky u8 fec_override_admin_10g_40g[0x4]; 8003353244Shselasky 8004353244Shselasky u8 fec_override_cap_400g_8x[0x10]; 8005353244Shselasky u8 fec_override_cap_200g_4x[0x10]; 8006353244Shselasky u8 fec_override_cap_100g_2x[0x10]; 8007353244Shselasky u8 fec_override_cap_50g_1x[0x10]; 8008353244Shselasky 8009353244Shselasky u8 fec_override_admin_400g_8x[0x10]; 8010353244Shselasky u8 fec_override_admin_200g_4x[0x10]; 8011353244Shselasky u8 fec_override_admin_100g_2x[0x10]; 8012353244Shselasky u8 fec_override_admin_50g_1x[0x10]; 8013353244Shselasky 8014353244Shselasky u8 reserved_at_140[0xC0]; 8015290650Shselasky}; 8016290650Shselasky 8017290650Shselaskystruct mlx5_ifc_ppll_reg_bits { 8018290650Shselasky u8 num_pll_groups[0x8]; 8019290650Shselasky u8 pll_group[0x8]; 8020290650Shselasky u8 reserved_0[0x4]; 8021290650Shselasky u8 num_plls[0x4]; 8022290650Shselasky u8 reserved_1[0x8]; 8023290650Shselasky 8024290650Shselasky u8 reserved_2[0x1f]; 8025290650Shselasky u8 ae[0x1]; 8026290650Shselasky 8027290650Shselasky u8 pll_status[4][0x40]; 8028290650Shselasky}; 8029290650Shselasky 8030290650Shselaskystruct mlx5_ifc_ppad_reg_bits { 8031290650Shselasky u8 reserved_0[0x3]; 8032290650Shselasky u8 single_mac[0x1]; 8033290650Shselasky u8 reserved_1[0x4]; 8034290650Shselasky u8 local_port[0x8]; 8035290650Shselasky u8 mac_47_32[0x10]; 8036290650Shselasky 8037290650Shselasky u8 mac_31_0[0x20]; 8038290650Shselasky 8039290650Shselasky u8 reserved_2[0x40]; 8040290650Shselasky}; 8041290650Shselasky 8042290650Shselaskystruct mlx5_ifc_pmtu_reg_bits { 8043290650Shselasky u8 reserved_0[0x8]; 8044290650Shselasky u8 local_port[0x8]; 8045290650Shselasky u8 reserved_1[0x10]; 8046290650Shselasky 8047290650Shselasky u8 max_mtu[0x10]; 8048290650Shselasky u8 reserved_2[0x10]; 8049290650Shselasky 8050290650Shselasky u8 admin_mtu[0x10]; 8051290650Shselasky u8 reserved_3[0x10]; 8052290650Shselasky 8053290650Shselasky u8 oper_mtu[0x10]; 8054290650Shselasky u8 reserved_4[0x10]; 8055290650Shselasky}; 8056290650Shselasky 8057290650Shselaskystruct mlx5_ifc_pmpr_reg_bits { 8058290650Shselasky u8 reserved_0[0x8]; 8059290650Shselasky u8 module[0x8]; 8060290650Shselasky u8 reserved_1[0x10]; 8061290650Shselasky 8062290650Shselasky u8 reserved_2[0x18]; 8063290650Shselasky u8 attenuation_5g[0x8]; 8064290650Shselasky 8065290650Shselasky u8 reserved_3[0x18]; 8066290650Shselasky u8 attenuation_7g[0x8]; 8067290650Shselasky 8068290650Shselasky u8 reserved_4[0x18]; 8069290650Shselasky u8 attenuation_12g[0x8]; 8070290650Shselasky}; 8071290650Shselasky 8072290650Shselaskystruct mlx5_ifc_pmpe_reg_bits { 8073290650Shselasky u8 reserved_0[0x8]; 8074290650Shselasky u8 module[0x8]; 8075290650Shselasky u8 reserved_1[0xc]; 8076290650Shselasky u8 module_status[0x4]; 8077290650Shselasky 8078290650Shselasky u8 reserved_2[0x14]; 8079290650Shselasky u8 error_type[0x4]; 8080290650Shselasky u8 reserved_3[0x8]; 8081290650Shselasky 8082290650Shselasky u8 reserved_4[0x40]; 8083290650Shselasky}; 8084290650Shselasky 8085290650Shselaskystruct mlx5_ifc_pmpc_reg_bits { 8086290650Shselasky u8 module_state_updated[32][0x8]; 8087290650Shselasky}; 8088290650Shselasky 8089290650Shselaskystruct mlx5_ifc_pmlpn_reg_bits { 8090290650Shselasky u8 reserved_0[0x4]; 8091290650Shselasky u8 mlpn_status[0x4]; 8092290650Shselasky u8 local_port[0x8]; 8093290650Shselasky u8 reserved_1[0x10]; 8094290650Shselasky 8095290650Shselasky u8 e[0x1]; 8096290650Shselasky u8 reserved_2[0x1f]; 8097290650Shselasky}; 8098290650Shselasky 8099290650Shselaskystruct mlx5_ifc_pmlp_reg_bits { 8100290650Shselasky u8 rxtx[0x1]; 8101290650Shselasky u8 reserved_0[0x7]; 8102290650Shselasky u8 local_port[0x8]; 8103290650Shselasky u8 reserved_1[0x8]; 8104290650Shselasky u8 width[0x8]; 8105290650Shselasky 8106290650Shselasky u8 lane0_module_mapping[0x20]; 8107290650Shselasky 8108290650Shselasky u8 lane1_module_mapping[0x20]; 8109290650Shselasky 8110290650Shselasky u8 lane2_module_mapping[0x20]; 8111290650Shselasky 8112290650Shselasky u8 lane3_module_mapping[0x20]; 8113290650Shselasky 8114290650Shselasky u8 reserved_2[0x160]; 8115290650Shselasky}; 8116290650Shselasky 8117290650Shselaskystruct mlx5_ifc_pmaos_reg_bits { 8118290650Shselasky u8 reserved_0[0x8]; 8119290650Shselasky u8 module[0x8]; 8120290650Shselasky u8 reserved_1[0x4]; 8121290650Shselasky u8 admin_status[0x4]; 8122290650Shselasky u8 reserved_2[0x4]; 8123290650Shselasky u8 oper_status[0x4]; 8124290650Shselasky 8125290650Shselasky u8 ase[0x1]; 8126290650Shselasky u8 ee[0x1]; 8127290650Shselasky u8 reserved_3[0x12]; 8128290650Shselasky u8 error_type[0x4]; 8129290650Shselasky u8 reserved_4[0x6]; 8130290650Shselasky u8 e[0x2]; 8131290650Shselasky 8132290650Shselasky u8 reserved_5[0x40]; 8133290650Shselasky}; 8134290650Shselasky 8135290650Shselaskystruct mlx5_ifc_plpc_reg_bits { 8136290650Shselasky u8 reserved_0[0x4]; 8137290650Shselasky u8 profile_id[0xc]; 8138290650Shselasky u8 reserved_1[0x4]; 8139290650Shselasky u8 proto_mask[0x4]; 8140290650Shselasky u8 reserved_2[0x8]; 8141290650Shselasky 8142290650Shselasky u8 reserved_3[0x10]; 8143290650Shselasky u8 lane_speed[0x10]; 8144290650Shselasky 8145290650Shselasky u8 reserved_4[0x17]; 8146290650Shselasky u8 lpbf[0x1]; 8147290650Shselasky u8 fec_mode_policy[0x8]; 8148290650Shselasky 8149290650Shselasky u8 retransmission_capability[0x8]; 8150290650Shselasky u8 fec_mode_capability[0x18]; 8151290650Shselasky 8152290650Shselasky u8 retransmission_support_admin[0x8]; 8153290650Shselasky u8 fec_mode_support_admin[0x18]; 8154290650Shselasky 8155290650Shselasky u8 retransmission_request_admin[0x8]; 8156290650Shselasky u8 fec_mode_request_admin[0x18]; 8157290650Shselasky 8158290650Shselasky u8 reserved_5[0x80]; 8159290650Shselasky}; 8160290650Shselasky 8161290650Shselaskystruct mlx5_ifc_pll_status_data_bits { 8162290650Shselasky u8 reserved_0[0x1]; 8163290650Shselasky u8 lock_cal[0x1]; 8164290650Shselasky u8 lock_status[0x2]; 8165290650Shselasky u8 reserved_1[0x2]; 8166290650Shselasky u8 algo_f_ctrl[0xa]; 8167290650Shselasky u8 analog_algo_num_var[0x6]; 8168290650Shselasky u8 f_ctrl_measure[0xa]; 8169290650Shselasky 8170290650Shselasky u8 reserved_2[0x2]; 8171290650Shselasky u8 analog_var[0x6]; 8172290650Shselasky u8 reserved_3[0x2]; 8173290650Shselasky u8 high_var[0x6]; 8174290650Shselasky u8 reserved_4[0x2]; 8175290650Shselasky u8 low_var[0x6]; 8176290650Shselasky u8 reserved_5[0x2]; 8177290650Shselasky u8 mid_val[0x6]; 8178290650Shselasky}; 8179290650Shselasky 8180290650Shselaskystruct mlx5_ifc_plib_reg_bits { 8181290650Shselasky u8 reserved_0[0x8]; 8182290650Shselasky u8 local_port[0x8]; 8183290650Shselasky u8 reserved_1[0x8]; 8184290650Shselasky u8 ib_port[0x8]; 8185290650Shselasky 8186290650Shselasky u8 reserved_2[0x60]; 8187290650Shselasky}; 8188290650Shselasky 8189290650Shselaskystruct mlx5_ifc_plbf_reg_bits { 8190290650Shselasky u8 reserved_0[0x8]; 8191290650Shselasky u8 local_port[0x8]; 8192290650Shselasky u8 reserved_1[0xd]; 8193290650Shselasky u8 lbf_mode[0x3]; 8194290650Shselasky 8195290650Shselasky u8 reserved_2[0x20]; 8196290650Shselasky}; 8197290650Shselasky 8198290650Shselaskystruct mlx5_ifc_pipg_reg_bits { 8199290650Shselasky u8 reserved_0[0x8]; 8200290650Shselasky u8 local_port[0x8]; 8201290650Shselasky u8 reserved_1[0x10]; 8202290650Shselasky 8203290650Shselasky u8 dic[0x1]; 8204290650Shselasky u8 reserved_2[0x19]; 8205290650Shselasky u8 ipg[0x4]; 8206290650Shselasky u8 reserved_3[0x2]; 8207290650Shselasky}; 8208290650Shselasky 8209290650Shselaskystruct mlx5_ifc_pifr_reg_bits { 8210290650Shselasky u8 reserved_0[0x8]; 8211290650Shselasky u8 local_port[0x8]; 8212290650Shselasky u8 reserved_1[0x10]; 8213290650Shselasky 8214290650Shselasky u8 reserved_2[0xe0]; 8215290650Shselasky 8216290650Shselasky u8 port_filter[8][0x20]; 8217290650Shselasky 8218290650Shselasky u8 port_filter_update_en[8][0x20]; 8219290650Shselasky}; 8220290650Shselasky 8221290650Shselaskystruct mlx5_ifc_phys_layer_cntrs_bits { 8222290650Shselasky u8 time_since_last_clear_high[0x20]; 8223290650Shselasky 8224290650Shselasky u8 time_since_last_clear_low[0x20]; 8225290650Shselasky 8226290650Shselasky u8 symbol_errors_high[0x20]; 8227290650Shselasky 8228290650Shselasky u8 symbol_errors_low[0x20]; 8229290650Shselasky 8230290650Shselasky u8 sync_headers_errors_high[0x20]; 8231290650Shselasky 8232290650Shselasky u8 sync_headers_errors_low[0x20]; 8233290650Shselasky 8234290650Shselasky u8 edpl_bip_errors_lane0_high[0x20]; 8235290650Shselasky 8236290650Shselasky u8 edpl_bip_errors_lane0_low[0x20]; 8237290650Shselasky 8238290650Shselasky u8 edpl_bip_errors_lane1_high[0x20]; 8239290650Shselasky 8240290650Shselasky u8 edpl_bip_errors_lane1_low[0x20]; 8241290650Shselasky 8242290650Shselasky u8 edpl_bip_errors_lane2_high[0x20]; 8243290650Shselasky 8244290650Shselasky u8 edpl_bip_errors_lane2_low[0x20]; 8245290650Shselasky 8246290650Shselasky u8 edpl_bip_errors_lane3_high[0x20]; 8247290650Shselasky 8248290650Shselasky u8 edpl_bip_errors_lane3_low[0x20]; 8249290650Shselasky 8250290650Shselasky u8 fc_fec_corrected_blocks_lane0_high[0x20]; 8251290650Shselasky 8252290650Shselasky u8 fc_fec_corrected_blocks_lane0_low[0x20]; 8253290650Shselasky 8254290650Shselasky u8 fc_fec_corrected_blocks_lane1_high[0x20]; 8255290650Shselasky 8256290650Shselasky u8 fc_fec_corrected_blocks_lane1_low[0x20]; 8257290650Shselasky 8258290650Shselasky u8 fc_fec_corrected_blocks_lane2_high[0x20]; 8259290650Shselasky 8260290650Shselasky u8 fc_fec_corrected_blocks_lane2_low[0x20]; 8261290650Shselasky 8262290650Shselasky u8 fc_fec_corrected_blocks_lane3_high[0x20]; 8263290650Shselasky 8264290650Shselasky u8 fc_fec_corrected_blocks_lane3_low[0x20]; 8265290650Shselasky 8266290650Shselasky u8 fc_fec_uncorrectable_blocks_lane0_high[0x20]; 8267290650Shselasky 8268290650Shselasky u8 fc_fec_uncorrectable_blocks_lane0_low[0x20]; 8269290650Shselasky 8270290650Shselasky u8 fc_fec_uncorrectable_blocks_lane1_high[0x20]; 8271290650Shselasky 8272290650Shselasky u8 fc_fec_uncorrectable_blocks_lane1_low[0x20]; 8273290650Shselasky 8274290650Shselasky u8 fc_fec_uncorrectable_blocks_lane2_high[0x20]; 8275290650Shselasky 8276290650Shselasky u8 fc_fec_uncorrectable_blocks_lane2_low[0x20]; 8277290650Shselasky 8278290650Shselasky u8 fc_fec_uncorrectable_blocks_lane3_high[0x20]; 8279290650Shselasky 8280290650Shselasky u8 fc_fec_uncorrectable_blocks_lane3_low[0x20]; 8281290650Shselasky 8282290650Shselasky u8 rs_fec_corrected_blocks_high[0x20]; 8283290650Shselasky 8284290650Shselasky u8 rs_fec_corrected_blocks_low[0x20]; 8285290650Shselasky 8286290650Shselasky u8 rs_fec_uncorrectable_blocks_high[0x20]; 8287290650Shselasky 8288290650Shselasky u8 rs_fec_uncorrectable_blocks_low[0x20]; 8289290650Shselasky 8290290650Shselasky u8 rs_fec_no_errors_blocks_high[0x20]; 8291290650Shselasky 8292290650Shselasky u8 rs_fec_no_errors_blocks_low[0x20]; 8293290650Shselasky 8294290650Shselasky u8 rs_fec_single_error_blocks_high[0x20]; 8295290650Shselasky 8296290650Shselasky u8 rs_fec_single_error_blocks_low[0x20]; 8297290650Shselasky 8298290650Shselasky u8 rs_fec_corrected_symbols_total_high[0x20]; 8299290650Shselasky 8300290650Shselasky u8 rs_fec_corrected_symbols_total_low[0x20]; 8301290650Shselasky 8302290650Shselasky u8 rs_fec_corrected_symbols_lane0_high[0x20]; 8303290650Shselasky 8304290650Shselasky u8 rs_fec_corrected_symbols_lane0_low[0x20]; 8305290650Shselasky 8306290650Shselasky u8 rs_fec_corrected_symbols_lane1_high[0x20]; 8307290650Shselasky 8308290650Shselasky u8 rs_fec_corrected_symbols_lane1_low[0x20]; 8309290650Shselasky 8310290650Shselasky u8 rs_fec_corrected_symbols_lane2_high[0x20]; 8311290650Shselasky 8312290650Shselasky u8 rs_fec_corrected_symbols_lane2_low[0x20]; 8313290650Shselasky 8314290650Shselasky u8 rs_fec_corrected_symbols_lane3_high[0x20]; 8315290650Shselasky 8316290650Shselasky u8 rs_fec_corrected_symbols_lane3_low[0x20]; 8317290650Shselasky 8318290650Shselasky u8 link_down_events[0x20]; 8319290650Shselasky 8320290650Shselasky u8 successful_recovery_events[0x20]; 8321290650Shselasky 8322290650Shselasky u8 reserved_0[0x180]; 8323290650Shselasky}; 8324290650Shselasky 8325329204Shselaskystruct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits { 8326329204Shselasky u8 symbol_error_counter[0x10]; 8327329204Shselasky 8328329204Shselasky u8 link_error_recovery_counter[0x8]; 8329329204Shselasky 8330329204Shselasky u8 link_downed_counter[0x8]; 8331329204Shselasky 8332329204Shselasky u8 port_rcv_errors[0x10]; 8333329204Shselasky 8334329204Shselasky u8 port_rcv_remote_physical_errors[0x10]; 8335329204Shselasky 8336329204Shselasky u8 port_rcv_switch_relay_errors[0x10]; 8337329204Shselasky 8338329204Shselasky u8 port_xmit_discards[0x10]; 8339329204Shselasky 8340329204Shselasky u8 port_xmit_constraint_errors[0x8]; 8341329204Shselasky 8342329204Shselasky u8 port_rcv_constraint_errors[0x8]; 8343329204Shselasky 8344329204Shselasky u8 reserved_at_70[0x8]; 8345329204Shselasky 8346329204Shselasky u8 link_overrun_errors[0x8]; 8347329204Shselasky 8348329204Shselasky u8 reserved_at_80[0x10]; 8349329204Shselasky 8350329204Shselasky u8 vl_15_dropped[0x10]; 8351329204Shselasky 8352329204Shselasky u8 reserved_at_a0[0xa0]; 8353329204Shselasky}; 8354329204Shselasky 8355321992Shselaskystruct mlx5_ifc_phys_layer_statistical_cntrs_bits { 8356321992Shselasky u8 time_since_last_clear_high[0x20]; 8357321992Shselasky 8358321992Shselasky u8 time_since_last_clear_low[0x20]; 8359321992Shselasky 8360321992Shselasky u8 phy_received_bits_high[0x20]; 8361321992Shselasky 8362321992Shselasky u8 phy_received_bits_low[0x20]; 8363321992Shselasky 8364321992Shselasky u8 phy_symbol_errors_high[0x20]; 8365321992Shselasky 8366321992Shselasky u8 phy_symbol_errors_low[0x20]; 8367321992Shselasky 8368321992Shselasky u8 phy_corrected_bits_high[0x20]; 8369321992Shselasky 8370321992Shselasky u8 phy_corrected_bits_low[0x20]; 8371321992Shselasky 8372321992Shselasky u8 phy_corrected_bits_lane0_high[0x20]; 8373321992Shselasky 8374321992Shselasky u8 phy_corrected_bits_lane0_low[0x20]; 8375321992Shselasky 8376321992Shselasky u8 phy_corrected_bits_lane1_high[0x20]; 8377321992Shselasky 8378321992Shselasky u8 phy_corrected_bits_lane1_low[0x20]; 8379321992Shselasky 8380321992Shselasky u8 phy_corrected_bits_lane2_high[0x20]; 8381321992Shselasky 8382321992Shselasky u8 phy_corrected_bits_lane2_low[0x20]; 8383321992Shselasky 8384321992Shselasky u8 phy_corrected_bits_lane3_high[0x20]; 8385321992Shselasky 8386321992Shselasky u8 phy_corrected_bits_lane3_low[0x20]; 8387321992Shselasky 8388321992Shselasky u8 reserved_at_200[0x5c0]; 8389321992Shselasky}; 8390321992Shselasky 8391308678Shselaskystruct mlx5_ifc_infiniband_port_cntrs_bits { 8392308678Shselasky u8 symbol_error_counter[0x10]; 8393308678Shselasky u8 link_error_recovery_counter[0x8]; 8394308678Shselasky u8 link_downed_counter[0x8]; 8395308678Shselasky 8396308678Shselasky u8 port_rcv_errors[0x10]; 8397308678Shselasky u8 port_rcv_remote_physical_errors[0x10]; 8398308678Shselasky 8399308678Shselasky u8 port_rcv_switch_relay_errors[0x10]; 8400308678Shselasky u8 port_xmit_discards[0x10]; 8401308678Shselasky 8402308678Shselasky u8 port_xmit_constraint_errors[0x8]; 8403308678Shselasky u8 port_rcv_constraint_errors[0x8]; 8404308678Shselasky u8 reserved_0[0x8]; 8405308678Shselasky u8 local_link_integrity_errors[0x4]; 8406308678Shselasky u8 excessive_buffer_overrun_errors[0x4]; 8407308678Shselasky 8408308678Shselasky u8 reserved_1[0x10]; 8409308678Shselasky u8 vl_15_dropped[0x10]; 8410308678Shselasky 8411308678Shselasky u8 port_xmit_data[0x20]; 8412308678Shselasky 8413308678Shselasky u8 port_rcv_data[0x20]; 8414308678Shselasky 8415308678Shselasky u8 port_xmit_pkts[0x20]; 8416308678Shselasky 8417308678Shselasky u8 port_rcv_pkts[0x20]; 8418308678Shselasky 8419308678Shselasky u8 port_xmit_wait[0x20]; 8420308678Shselasky 8421308678Shselasky u8 reserved_2[0x680]; 8422308678Shselasky}; 8423308678Shselasky 8424290650Shselaskystruct mlx5_ifc_phrr_reg_bits { 8425290650Shselasky u8 clr[0x1]; 8426290650Shselasky u8 reserved_0[0x7]; 8427290650Shselasky u8 local_port[0x8]; 8428290650Shselasky u8 reserved_1[0x10]; 8429290650Shselasky 8430290650Shselasky u8 hist_group[0x8]; 8431290650Shselasky u8 reserved_2[0x10]; 8432290650Shselasky u8 hist_id[0x8]; 8433290650Shselasky 8434290650Shselasky u8 reserved_3[0x40]; 8435290650Shselasky 8436290650Shselasky u8 time_since_last_clear_high[0x20]; 8437290650Shselasky 8438290650Shselasky u8 time_since_last_clear_low[0x20]; 8439290650Shselasky 8440290650Shselasky u8 bin[10][0x20]; 8441290650Shselasky}; 8442290650Shselasky 8443290650Shselaskystruct mlx5_ifc_phbr_for_prio_reg_bits { 8444290650Shselasky u8 reserved_0[0x18]; 8445290650Shselasky u8 prio[0x8]; 8446290650Shselasky}; 8447290650Shselasky 8448290650Shselaskystruct mlx5_ifc_phbr_for_port_tclass_reg_bits { 8449290650Shselasky u8 reserved_0[0x18]; 8450290650Shselasky u8 tclass[0x8]; 8451290650Shselasky}; 8452290650Shselasky 8453290650Shselaskystruct mlx5_ifc_phbr_binding_reg_bits { 8454290650Shselasky u8 opcode[0x4]; 8455290650Shselasky u8 reserved_0[0x4]; 8456290650Shselasky u8 local_port[0x8]; 8457290650Shselasky u8 pnat[0x2]; 8458290650Shselasky u8 reserved_1[0xe]; 8459290650Shselasky 8460290650Shselasky u8 hist_group[0x8]; 8461290650Shselasky u8 reserved_2[0x10]; 8462290650Shselasky u8 hist_id[0x8]; 8463290650Shselasky 8464290650Shselasky u8 reserved_3[0x10]; 8465290650Shselasky u8 hist_type[0x10]; 8466290650Shselasky 8467290650Shselasky u8 hist_parameters[0x20]; 8468290650Shselasky 8469290650Shselasky u8 hist_min_value[0x20]; 8470290650Shselasky 8471290650Shselasky u8 hist_max_value[0x20]; 8472290650Shselasky 8473290650Shselasky u8 sample_time[0x20]; 8474290650Shselasky}; 8475290650Shselasky 8476290650Shselaskyenum { 8477290650Shselasky MLX5_PFCC_REG_PPAN_DISABLED = 0x0, 8478290650Shselasky MLX5_PFCC_REG_PPAN_ENABLED = 0x1, 8479290650Shselasky}; 8480290650Shselasky 8481290650Shselaskystruct mlx5_ifc_pfcc_reg_bits { 8482306233Shselasky u8 dcbx_operation_type[0x2]; 8483306233Shselasky u8 cap_local_admin[0x1]; 8484306233Shselasky u8 cap_remote_admin[0x1]; 8485306233Shselasky u8 reserved_0[0x4]; 8486290650Shselasky u8 local_port[0x8]; 8487290650Shselasky u8 pnat[0x2]; 8488290650Shselasky u8 reserved_1[0xc]; 8489290650Shselasky u8 shl_cap[0x1]; 8490290650Shselasky u8 shl_opr[0x1]; 8491290650Shselasky 8492290650Shselasky u8 ppan[0x4]; 8493290650Shselasky u8 reserved_2[0x4]; 8494290650Shselasky u8 prio_mask_tx[0x8]; 8495290650Shselasky u8 reserved_3[0x8]; 8496290650Shselasky u8 prio_mask_rx[0x8]; 8497290650Shselasky 8498290650Shselasky u8 pptx[0x1]; 8499290650Shselasky u8 aptx[0x1]; 8500290650Shselasky u8 reserved_4[0x6]; 8501290650Shselasky u8 pfctx[0x8]; 8502306233Shselasky u8 reserved_5[0x8]; 8503306233Shselasky u8 cbftx[0x8]; 8504290650Shselasky 8505290650Shselasky u8 pprx[0x1]; 8506290650Shselasky u8 aprx[0x1]; 8507290650Shselasky u8 reserved_6[0x6]; 8508290650Shselasky u8 pfcrx[0x8]; 8509306233Shselasky u8 reserved_7[0x8]; 8510306233Shselasky u8 cbfrx[0x8]; 8511290650Shselasky 8512308678Shselasky u8 device_stall_minor_watermark[0x10]; 8513308678Shselasky u8 device_stall_critical_watermark[0x10]; 8514308678Shselasky 8515308678Shselasky u8 reserved_8[0x60]; 8516290650Shselasky}; 8517290650Shselasky 8518290650Shselaskystruct mlx5_ifc_pelc_reg_bits { 8519290650Shselasky u8 op[0x4]; 8520290650Shselasky u8 reserved_0[0x4]; 8521290650Shselasky u8 local_port[0x8]; 8522290650Shselasky u8 reserved_1[0x10]; 8523290650Shselasky 8524290650Shselasky u8 op_admin[0x8]; 8525290650Shselasky u8 op_capability[0x8]; 8526290650Shselasky u8 op_request[0x8]; 8527290650Shselasky u8 op_active[0x8]; 8528290650Shselasky 8529290650Shselasky u8 admin[0x40]; 8530290650Shselasky 8531290650Shselasky u8 capability[0x40]; 8532290650Shselasky 8533290650Shselasky u8 request[0x40]; 8534290650Shselasky 8535290650Shselasky u8 active[0x40]; 8536290650Shselasky 8537290650Shselasky u8 reserved_2[0x80]; 8538290650Shselasky}; 8539290650Shselasky 8540290650Shselaskystruct mlx5_ifc_peir_reg_bits { 8541290650Shselasky u8 reserved_0[0x8]; 8542290650Shselasky u8 local_port[0x8]; 8543290650Shselasky u8 reserved_1[0x10]; 8544290650Shselasky 8545290650Shselasky u8 reserved_2[0xc]; 8546290650Shselasky u8 error_count[0x4]; 8547290650Shselasky u8 reserved_3[0x10]; 8548290650Shselasky 8549290650Shselasky u8 reserved_4[0xc]; 8550290650Shselasky u8 lane[0x4]; 8551290650Shselasky u8 reserved_5[0x8]; 8552290650Shselasky u8 error_type[0x8]; 8553290650Shselasky}; 8554290650Shselasky 8555337098Shselaskystruct mlx5_ifc_qcam_access_reg_cap_mask { 8556337098Shselasky u8 qcam_access_reg_cap_mask_127_to_20[0x6C]; 8557337098Shselasky u8 qpdpm[0x1]; 8558337098Shselasky u8 qcam_access_reg_cap_mask_18_to_4[0x0F]; 8559337098Shselasky u8 qdpm[0x1]; 8560337098Shselasky u8 qpts[0x1]; 8561337098Shselasky u8 qcap[0x1]; 8562337098Shselasky u8 qcam_access_reg_cap_mask_0[0x1]; 8563337098Shselasky}; 8564337098Shselasky 8565337098Shselaskystruct mlx5_ifc_qcam_qos_feature_cap_mask { 8566337098Shselasky u8 qcam_qos_feature_cap_mask_127_to_1[0x7F]; 8567337098Shselasky u8 qpts_trust_both[0x1]; 8568337098Shselasky}; 8569337098Shselasky 8570337098Shselaskystruct mlx5_ifc_qcam_reg_bits { 8571337098Shselasky u8 reserved_at_0[0x8]; 8572337098Shselasky u8 feature_group[0x8]; 8573337098Shselasky u8 reserved_at_10[0x8]; 8574337098Shselasky u8 access_reg_group[0x8]; 8575337098Shselasky u8 reserved_at_20[0x20]; 8576337098Shselasky 8577337098Shselasky union { 8578337098Shselasky struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap; 8579337098Shselasky u8 reserved_at_0[0x80]; 8580337098Shselasky } qos_access_reg_cap_mask; 8581337098Shselasky 8582337098Shselasky u8 reserved_at_c0[0x80]; 8583337098Shselasky 8584337098Shselasky union { 8585337098Shselasky struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap; 8586337098Shselasky u8 reserved_at_0[0x80]; 8587337098Shselasky } qos_feature_cap_mask; 8588337098Shselasky 8589337098Shselasky u8 reserved_at_1c0[0x80]; 8590337098Shselasky}; 8591337098Shselasky 8592347820Shselaskystruct mlx5_ifc_pcam_enhanced_features_bits { 8593347855Shselasky u8 reserved_at_0[0x6d]; 8594347855Shselasky u8 rx_icrc_encapsulated_counter[0x1]; 8595347855Shselasky u8 reserved_at_6e[0x4]; 8596347855Shselasky u8 ptys_extended_ethernet[0x1]; 8597347855Shselasky u8 reserved_at_73[0x3]; 8598347855Shselasky u8 pfcc_mask[0x1]; 8599347855Shselasky u8 reserved_at_77[0x3]; 8600347855Shselasky u8 per_lane_error_counters[0x1]; 8601347855Shselasky u8 rx_buffer_fullness_counters[0x1]; 8602347855Shselasky u8 ptys_connector_type[0x1]; 8603347855Shselasky u8 reserved_at_7d[0x1]; 8604347820Shselasky u8 ppcnt_discard_group[0x1]; 8605347820Shselasky u8 ppcnt_statistical_group[0x1]; 8606347820Shselasky}; 8607347820Shselasky 8608353244Shselaskystruct mlx5_ifc_pcam_regs_5000_to_507f_bits { 8609353244Shselasky u8 port_access_reg_cap_mask_127_to_96[0x20]; 8610353244Shselasky u8 port_access_reg_cap_mask_95_to_64[0x20]; 8611353244Shselasky 8612365410Skib u8 reserved_at_40[0xe]; 8613365410Skib u8 pddr[0x1]; 8614365410Skib u8 reserved_at_4f[0xd]; 8615365410Skib 8616353244Shselasky u8 pplm[0x1]; 8617353244Shselasky u8 port_access_reg_cap_mask_34_to_32[0x3]; 8618353244Shselasky 8619353244Shselasky u8 port_access_reg_cap_mask_31_to_13[0x13]; 8620353244Shselasky u8 pbmc[0x1]; 8621353244Shselasky u8 pptb[0x1]; 8622353244Shselasky u8 port_access_reg_cap_mask_10_to_09[0x2]; 8623353244Shselasky u8 ppcnt[0x1]; 8624353244Shselasky u8 port_access_reg_cap_mask_07_to_00[0x8]; 8625353244Shselasky}; 8626353244Shselasky 8627347820Shselaskystruct mlx5_ifc_pcam_reg_bits { 8628347820Shselasky u8 reserved_at_0[0x8]; 8629347820Shselasky u8 feature_group[0x8]; 8630347820Shselasky u8 reserved_at_10[0x8]; 8631347820Shselasky u8 access_reg_group[0x8]; 8632347820Shselasky 8633347820Shselasky u8 reserved_at_20[0x20]; 8634347820Shselasky 8635347820Shselasky union { 8636353244Shselasky struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f; 8637347820Shselasky u8 reserved_at_0[0x80]; 8638347820Shselasky } port_access_reg_cap_mask; 8639347820Shselasky 8640347820Shselasky u8 reserved_at_c0[0x80]; 8641347820Shselasky 8642347820Shselasky union { 8643347820Shselasky struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features; 8644347820Shselasky u8 reserved_at_0[0x80]; 8645347820Shselasky } feature_cap_mask; 8646347820Shselasky 8647347820Shselasky u8 reserved_at_1c0[0xc0]; 8648347820Shselasky}; 8649347820Shselasky 8650347820Shselaskystruct mlx5_ifc_mcam_enhanced_features_bits { 8651347862Shselasky u8 reserved_at_0[0x6e]; 8652347862Shselasky u8 pcie_status_and_power[0x1]; 8653347862Shselasky u8 reserved_at_111[0x10]; 8654347820Shselasky u8 pcie_performance_group[0x1]; 8655347820Shselasky}; 8656347820Shselasky 8657347825Shselaskystruct mlx5_ifc_mcam_access_reg_bits { 8658347825Shselasky u8 reserved_at_0[0x1c]; 8659347825Shselasky u8 mcda[0x1]; 8660347825Shselasky u8 mcc[0x1]; 8661347825Shselasky u8 mcqi[0x1]; 8662347825Shselasky u8 reserved_at_1f[0x1]; 8663347825Shselasky 8664347825Shselasky u8 regs_95_to_64[0x20]; 8665347825Shselasky u8 regs_63_to_32[0x20]; 8666347825Shselasky u8 regs_31_to_0[0x20]; 8667347825Shselasky}; 8668347825Shselasky 8669347820Shselaskystruct mlx5_ifc_mcam_reg_bits { 8670347820Shselasky u8 reserved_at_0[0x8]; 8671347820Shselasky u8 feature_group[0x8]; 8672347820Shselasky u8 reserved_at_10[0x8]; 8673347820Shselasky u8 access_reg_group[0x8]; 8674347820Shselasky 8675347820Shselasky u8 reserved_at_20[0x20]; 8676347820Shselasky 8677347820Shselasky union { 8678347825Shselasky struct mlx5_ifc_mcam_access_reg_bits access_regs; 8679347820Shselasky u8 reserved_at_0[0x80]; 8680347820Shselasky } mng_access_reg_cap_mask; 8681347820Shselasky 8682347820Shselasky u8 reserved_at_c0[0x80]; 8683347820Shselasky 8684347820Shselasky union { 8685347820Shselasky struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features; 8686347820Shselasky u8 reserved_at_0[0x80]; 8687347820Shselasky } mng_feature_cap_mask; 8688347820Shselasky 8689347820Shselasky u8 reserved_at_1c0[0x80]; 8690347820Shselasky}; 8691347820Shselasky 8692290650Shselaskystruct mlx5_ifc_pcap_reg_bits { 8693290650Shselasky u8 reserved_0[0x8]; 8694290650Shselasky u8 local_port[0x8]; 8695290650Shselasky u8 reserved_1[0x10]; 8696290650Shselasky 8697290650Shselasky u8 port_capability_mask[4][0x20]; 8698290650Shselasky}; 8699290650Shselasky 8700290650Shselaskystruct mlx5_ifc_pbmc_reg_bits { 8701353232Shselasky u8 reserved_at_0[0x8]; 8702290650Shselasky u8 local_port[0x8]; 8703353232Shselasky u8 reserved_at_10[0x10]; 8704290650Shselasky 8705290650Shselasky u8 xoff_timer_value[0x10]; 8706290650Shselasky u8 xoff_refresh[0x10]; 8707290650Shselasky 8708353232Shselasky u8 reserved_at_40[0x9]; 8709353232Shselasky u8 fullness_threshold[0x7]; 8710290650Shselasky u8 port_buffer_size[0x10]; 8711290650Shselasky 8712290650Shselasky struct mlx5_ifc_bufferx_reg_bits buffer[10]; 8713290650Shselasky 8714353232Shselasky u8 reserved_at_2e0[0x40]; 8715290650Shselasky}; 8716290650Shselasky 8717290650Shselaskystruct mlx5_ifc_paos_reg_bits { 8718290650Shselasky u8 swid[0x8]; 8719290650Shselasky u8 local_port[0x8]; 8720290650Shselasky u8 reserved_0[0x4]; 8721290650Shselasky u8 admin_status[0x4]; 8722290650Shselasky u8 reserved_1[0x4]; 8723290650Shselasky u8 oper_status[0x4]; 8724290650Shselasky 8725290650Shselasky u8 ase[0x1]; 8726290650Shselasky u8 ee[0x1]; 8727290650Shselasky u8 reserved_2[0x1c]; 8728290650Shselasky u8 e[0x2]; 8729290650Shselasky 8730290650Shselasky u8 reserved_3[0x40]; 8731290650Shselasky}; 8732290650Shselasky 8733290650Shselaskystruct mlx5_ifc_pamp_reg_bits { 8734290650Shselasky u8 reserved_0[0x8]; 8735290650Shselasky u8 opamp_group[0x8]; 8736290650Shselasky u8 reserved_1[0xc]; 8737290650Shselasky u8 opamp_group_type[0x4]; 8738290650Shselasky 8739290650Shselasky u8 start_index[0x10]; 8740290650Shselasky u8 reserved_2[0x4]; 8741290650Shselasky u8 num_of_indices[0xc]; 8742290650Shselasky 8743290650Shselasky u8 index_data[18][0x10]; 8744290650Shselasky}; 8745290650Shselasky 8746290650Shselaskystruct mlx5_ifc_link_level_retrans_cntr_grp_date_bits { 8747290650Shselasky u8 llr_rx_cells_high[0x20]; 8748290650Shselasky 8749290650Shselasky u8 llr_rx_cells_low[0x20]; 8750290650Shselasky 8751290650Shselasky u8 llr_rx_error_high[0x20]; 8752290650Shselasky 8753290650Shselasky u8 llr_rx_error_low[0x20]; 8754290650Shselasky 8755290650Shselasky u8 llr_rx_crc_error_high[0x20]; 8756290650Shselasky 8757290650Shselasky u8 llr_rx_crc_error_low[0x20]; 8758290650Shselasky 8759290650Shselasky u8 llr_tx_cells_high[0x20]; 8760290650Shselasky 8761290650Shselasky u8 llr_tx_cells_low[0x20]; 8762290650Shselasky 8763290650Shselasky u8 llr_tx_ret_cells_high[0x20]; 8764290650Shselasky 8765290650Shselasky u8 llr_tx_ret_cells_low[0x20]; 8766290650Shselasky 8767290650Shselasky u8 llr_tx_ret_events_high[0x20]; 8768290650Shselasky 8769290650Shselasky u8 llr_tx_ret_events_low[0x20]; 8770290650Shselasky 8771290650Shselasky u8 reserved_0[0x640]; 8772290650Shselasky}; 8773290650Shselasky 8774341964Shselaskystruct mlx5_ifc_mtmp_reg_bits { 8775341964Shselasky u8 i[0x1]; 8776341964Shselasky u8 reserved_at_1[0x18]; 8777341964Shselasky u8 sensor_index[0x7]; 8778341964Shselasky 8779341964Shselasky u8 reserved_at_20[0x10]; 8780341964Shselasky u8 temperature[0x10]; 8781341964Shselasky 8782341964Shselasky u8 mte[0x1]; 8783341964Shselasky u8 mtr[0x1]; 8784341964Shselasky u8 reserved_at_42[0x0e]; 8785341964Shselasky u8 max_temperature[0x10]; 8786341964Shselasky 8787341964Shselasky u8 tee[0x2]; 8788341964Shselasky u8 reserved_at_62[0x0e]; 8789341964Shselasky u8 temperature_threshold_hi[0x10]; 8790341964Shselasky 8791341964Shselasky u8 reserved_at_80[0x10]; 8792341964Shselasky u8 temperature_threshold_lo[0x10]; 8793341964Shselasky 8794341964Shselasky u8 reserved_at_100[0x20]; 8795341964Shselasky 8796341964Shselasky u8 sensor_name[0x40]; 8797341964Shselasky}; 8798341964Shselasky 8799290650Shselaskystruct mlx5_ifc_lane_2_module_mapping_bits { 8800290650Shselasky u8 reserved_0[0x6]; 8801290650Shselasky u8 rx_lane[0x2]; 8802290650Shselasky u8 reserved_1[0x6]; 8803290650Shselasky u8 tx_lane[0x2]; 8804290650Shselasky u8 reserved_2[0x8]; 8805290650Shselasky u8 module[0x8]; 8806290650Shselasky}; 8807290650Shselasky 8808290650Shselaskystruct mlx5_ifc_eth_per_traffic_class_layout_bits { 8809290650Shselasky u8 transmit_queue_high[0x20]; 8810290650Shselasky 8811290650Shselasky u8 transmit_queue_low[0x20]; 8812290650Shselasky 8813290650Shselasky u8 reserved_0[0x780]; 8814290650Shselasky}; 8815290650Shselasky 8816290650Shselaskystruct mlx5_ifc_eth_per_traffic_class_cong_layout_bits { 8817290650Shselasky u8 no_buffer_discard_uc_high[0x20]; 8818290650Shselasky 8819290650Shselasky u8 no_buffer_discard_uc_low[0x20]; 8820290650Shselasky 8821290650Shselasky u8 wred_discard_high[0x20]; 8822290650Shselasky 8823290650Shselasky u8 wred_discard_low[0x20]; 8824290650Shselasky 8825290650Shselasky u8 reserved_0[0x740]; 8826290650Shselasky}; 8827290650Shselasky 8828290650Shselaskystruct mlx5_ifc_eth_per_prio_grp_data_layout_bits { 8829290650Shselasky u8 rx_octets_high[0x20]; 8830290650Shselasky 8831290650Shselasky u8 rx_octets_low[0x20]; 8832290650Shselasky 8833290650Shselasky u8 reserved_0[0xc0]; 8834290650Shselasky 8835290650Shselasky u8 rx_frames_high[0x20]; 8836290650Shselasky 8837290650Shselasky u8 rx_frames_low[0x20]; 8838290650Shselasky 8839290650Shselasky u8 tx_octets_high[0x20]; 8840290650Shselasky 8841290650Shselasky u8 tx_octets_low[0x20]; 8842290650Shselasky 8843290650Shselasky u8 reserved_1[0xc0]; 8844290650Shselasky 8845290650Shselasky u8 tx_frames_high[0x20]; 8846290650Shselasky 8847290650Shselasky u8 tx_frames_low[0x20]; 8848290650Shselasky 8849290650Shselasky u8 rx_pause_high[0x20]; 8850290650Shselasky 8851290650Shselasky u8 rx_pause_low[0x20]; 8852290650Shselasky 8853290650Shselasky u8 rx_pause_duration_high[0x20]; 8854290650Shselasky 8855290650Shselasky u8 rx_pause_duration_low[0x20]; 8856290650Shselasky 8857290650Shselasky u8 tx_pause_high[0x20]; 8858290650Shselasky 8859290650Shselasky u8 tx_pause_low[0x20]; 8860290650Shselasky 8861290650Shselasky u8 tx_pause_duration_high[0x20]; 8862290650Shselasky 8863290650Shselasky u8 tx_pause_duration_low[0x20]; 8864290650Shselasky 8865290650Shselasky u8 rx_pause_transition_high[0x20]; 8866290650Shselasky 8867290650Shselasky u8 rx_pause_transition_low[0x20]; 8868290650Shselasky 8869308678Shselasky u8 rx_discards_high[0x20]; 8870308678Shselasky 8871308678Shselasky u8 rx_discards_low[0x20]; 8872308678Shselasky 8873308678Shselasky u8 device_stall_minor_watermark_cnt_high[0x20]; 8874308678Shselasky 8875308678Shselasky u8 device_stall_minor_watermark_cnt_low[0x20]; 8876308678Shselasky 8877308678Shselasky u8 device_stall_critical_watermark_cnt_high[0x20]; 8878308678Shselasky 8879308678Shselasky u8 device_stall_critical_watermark_cnt_low[0x20]; 8880308678Shselasky 8881308678Shselasky u8 reserved_2[0x340]; 8882290650Shselasky}; 8883290650Shselasky 8884290650Shselaskystruct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits { 8885290650Shselasky u8 port_transmit_wait_high[0x20]; 8886290650Shselasky 8887290650Shselasky u8 port_transmit_wait_low[0x20]; 8888290650Shselasky 8889290650Shselasky u8 ecn_marked_high[0x20]; 8890290650Shselasky 8891290650Shselasky u8 ecn_marked_low[0x20]; 8892290650Shselasky 8893290650Shselasky u8 no_buffer_discard_mc_high[0x20]; 8894290650Shselasky 8895290650Shselasky u8 no_buffer_discard_mc_low[0x20]; 8896290650Shselasky 8897347804Shselasky u8 rx_ebp_high[0x20]; 8898347804Shselasky 8899347804Shselasky u8 rx_ebp_low[0x20]; 8900347804Shselasky 8901347804Shselasky u8 tx_ebp_high[0x20]; 8902347804Shselasky 8903347804Shselasky u8 tx_ebp_low[0x20]; 8904347804Shselasky 8905347804Shselasky u8 rx_buffer_almost_full_high[0x20]; 8906347804Shselasky 8907347804Shselasky u8 rx_buffer_almost_full_low[0x20]; 8908347804Shselasky 8909347804Shselasky u8 rx_buffer_full_high[0x20]; 8910347804Shselasky 8911347804Shselasky u8 rx_buffer_full_low[0x20]; 8912347804Shselasky 8913347804Shselasky u8 rx_icrc_encapsulated_high[0x20]; 8914347804Shselasky 8915347804Shselasky u8 rx_icrc_encapsulated_low[0x20]; 8916347804Shselasky 8917347804Shselasky u8 reserved_0[0x80]; 8918347804Shselasky 8919347804Shselasky u8 tx_stats_pkts64octets_high[0x20]; 8920347804Shselasky 8921347804Shselasky u8 tx_stats_pkts64octets_low[0x20]; 8922347804Shselasky 8923347804Shselasky u8 tx_stats_pkts65to127octets_high[0x20]; 8924347804Shselasky 8925347804Shselasky u8 tx_stats_pkts65to127octets_low[0x20]; 8926347804Shselasky 8927347804Shselasky u8 tx_stats_pkts128to255octets_high[0x20]; 8928347804Shselasky 8929347804Shselasky u8 tx_stats_pkts128to255octets_low[0x20]; 8930347804Shselasky 8931347804Shselasky u8 tx_stats_pkts256to511octets_high[0x20]; 8932347804Shselasky 8933347804Shselasky u8 tx_stats_pkts256to511octets_low[0x20]; 8934347804Shselasky 8935347804Shselasky u8 tx_stats_pkts512to1023octets_high[0x20]; 8936347804Shselasky 8937347804Shselasky u8 tx_stats_pkts512to1023octets_low[0x20]; 8938347804Shselasky 8939347804Shselasky u8 tx_stats_pkts1024to1518octets_high[0x20]; 8940347804Shselasky 8941347804Shselasky u8 tx_stats_pkts1024to1518octets_low[0x20]; 8942347804Shselasky 8943347804Shselasky u8 tx_stats_pkts1519to2047octets_high[0x20]; 8944347804Shselasky 8945347804Shselasky u8 tx_stats_pkts1519to2047octets_low[0x20]; 8946347804Shselasky 8947347804Shselasky u8 tx_stats_pkts2048to4095octets_high[0x20]; 8948347804Shselasky 8949347804Shselasky u8 tx_stats_pkts2048to4095octets_low[0x20]; 8950347804Shselasky 8951347804Shselasky u8 tx_stats_pkts4096to8191octets_high[0x20]; 8952347804Shselasky 8953347804Shselasky u8 tx_stats_pkts4096to8191octets_low[0x20]; 8954347804Shselasky 8955347804Shselasky u8 tx_stats_pkts8192to10239octets_high[0x20]; 8956347804Shselasky 8957347804Shselasky u8 tx_stats_pkts8192to10239octets_low[0x20]; 8958347804Shselasky 8959347804Shselasky u8 reserved_1[0x2C0]; 8960290650Shselasky}; 8961290650Shselasky 8962290650Shselaskystruct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits { 8963290650Shselasky u8 a_frames_transmitted_ok_high[0x20]; 8964290650Shselasky 8965290650Shselasky u8 a_frames_transmitted_ok_low[0x20]; 8966290650Shselasky 8967290650Shselasky u8 a_frames_received_ok_high[0x20]; 8968290650Shselasky 8969290650Shselasky u8 a_frames_received_ok_low[0x20]; 8970290650Shselasky 8971290650Shselasky u8 a_frame_check_sequence_errors_high[0x20]; 8972290650Shselasky 8973290650Shselasky u8 a_frame_check_sequence_errors_low[0x20]; 8974290650Shselasky 8975290650Shselasky u8 a_alignment_errors_high[0x20]; 8976290650Shselasky 8977290650Shselasky u8 a_alignment_errors_low[0x20]; 8978290650Shselasky 8979290650Shselasky u8 a_octets_transmitted_ok_high[0x20]; 8980290650Shselasky 8981290650Shselasky u8 a_octets_transmitted_ok_low[0x20]; 8982290650Shselasky 8983290650Shselasky u8 a_octets_received_ok_high[0x20]; 8984290650Shselasky 8985290650Shselasky u8 a_octets_received_ok_low[0x20]; 8986290650Shselasky 8987290650Shselasky u8 a_multicast_frames_xmitted_ok_high[0x20]; 8988290650Shselasky 8989290650Shselasky u8 a_multicast_frames_xmitted_ok_low[0x20]; 8990290650Shselasky 8991290650Shselasky u8 a_broadcast_frames_xmitted_ok_high[0x20]; 8992290650Shselasky 8993290650Shselasky u8 a_broadcast_frames_xmitted_ok_low[0x20]; 8994290650Shselasky 8995290650Shselasky u8 a_multicast_frames_received_ok_high[0x20]; 8996290650Shselasky 8997290650Shselasky u8 a_multicast_frames_received_ok_low[0x20]; 8998290650Shselasky 8999290650Shselasky u8 a_broadcast_frames_recieved_ok_high[0x20]; 9000290650Shselasky 9001290650Shselasky u8 a_broadcast_frames_recieved_ok_low[0x20]; 9002290650Shselasky 9003290650Shselasky u8 a_in_range_length_errors_high[0x20]; 9004290650Shselasky 9005290650Shselasky u8 a_in_range_length_errors_low[0x20]; 9006290650Shselasky 9007290650Shselasky u8 a_out_of_range_length_field_high[0x20]; 9008290650Shselasky 9009290650Shselasky u8 a_out_of_range_length_field_low[0x20]; 9010290650Shselasky 9011290650Shselasky u8 a_frame_too_long_errors_high[0x20]; 9012290650Shselasky 9013290650Shselasky u8 a_frame_too_long_errors_low[0x20]; 9014290650Shselasky 9015290650Shselasky u8 a_symbol_error_during_carrier_high[0x20]; 9016290650Shselasky 9017290650Shselasky u8 a_symbol_error_during_carrier_low[0x20]; 9018290650Shselasky 9019290650Shselasky u8 a_mac_control_frames_transmitted_high[0x20]; 9020290650Shselasky 9021290650Shselasky u8 a_mac_control_frames_transmitted_low[0x20]; 9022290650Shselasky 9023290650Shselasky u8 a_mac_control_frames_received_high[0x20]; 9024290650Shselasky 9025290650Shselasky u8 a_mac_control_frames_received_low[0x20]; 9026290650Shselasky 9027290650Shselasky u8 a_unsupported_opcodes_received_high[0x20]; 9028290650Shselasky 9029290650Shselasky u8 a_unsupported_opcodes_received_low[0x20]; 9030290650Shselasky 9031290650Shselasky u8 a_pause_mac_ctrl_frames_received_high[0x20]; 9032290650Shselasky 9033290650Shselasky u8 a_pause_mac_ctrl_frames_received_low[0x20]; 9034290650Shselasky 9035290650Shselasky u8 a_pause_mac_ctrl_frames_transmitted_high[0x20]; 9036290650Shselasky 9037290650Shselasky u8 a_pause_mac_ctrl_frames_transmitted_low[0x20]; 9038290650Shselasky 9039290650Shselasky u8 reserved_0[0x300]; 9040290650Shselasky}; 9041290650Shselasky 9042290650Shselaskystruct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits { 9043290650Shselasky u8 dot3stats_alignment_errors_high[0x20]; 9044290650Shselasky 9045290650Shselasky u8 dot3stats_alignment_errors_low[0x20]; 9046290650Shselasky 9047290650Shselasky u8 dot3stats_fcs_errors_high[0x20]; 9048290650Shselasky 9049290650Shselasky u8 dot3stats_fcs_errors_low[0x20]; 9050290650Shselasky 9051290650Shselasky u8 dot3stats_single_collision_frames_high[0x20]; 9052290650Shselasky 9053290650Shselasky u8 dot3stats_single_collision_frames_low[0x20]; 9054290650Shselasky 9055290650Shselasky u8 dot3stats_multiple_collision_frames_high[0x20]; 9056290650Shselasky 9057290650Shselasky u8 dot3stats_multiple_collision_frames_low[0x20]; 9058290650Shselasky 9059290650Shselasky u8 dot3stats_sqe_test_errors_high[0x20]; 9060290650Shselasky 9061290650Shselasky u8 dot3stats_sqe_test_errors_low[0x20]; 9062290650Shselasky 9063290650Shselasky u8 dot3stats_deferred_transmissions_high[0x20]; 9064290650Shselasky 9065290650Shselasky u8 dot3stats_deferred_transmissions_low[0x20]; 9066290650Shselasky 9067290650Shselasky u8 dot3stats_late_collisions_high[0x20]; 9068290650Shselasky 9069290650Shselasky u8 dot3stats_late_collisions_low[0x20]; 9070290650Shselasky 9071290650Shselasky u8 dot3stats_excessive_collisions_high[0x20]; 9072290650Shselasky 9073290650Shselasky u8 dot3stats_excessive_collisions_low[0x20]; 9074290650Shselasky 9075290650Shselasky u8 dot3stats_internal_mac_transmit_errors_high[0x20]; 9076290650Shselasky 9077290650Shselasky u8 dot3stats_internal_mac_transmit_errors_low[0x20]; 9078290650Shselasky 9079290650Shselasky u8 dot3stats_carrier_sense_errors_high[0x20]; 9080290650Shselasky 9081290650Shselasky u8 dot3stats_carrier_sense_errors_low[0x20]; 9082290650Shselasky 9083290650Shselasky u8 dot3stats_frame_too_longs_high[0x20]; 9084290650Shselasky 9085290650Shselasky u8 dot3stats_frame_too_longs_low[0x20]; 9086290650Shselasky 9087290650Shselasky u8 dot3stats_internal_mac_receive_errors_high[0x20]; 9088290650Shselasky 9089290650Shselasky u8 dot3stats_internal_mac_receive_errors_low[0x20]; 9090290650Shselasky 9091290650Shselasky u8 dot3stats_symbol_errors_high[0x20]; 9092290650Shselasky 9093290650Shselasky u8 dot3stats_symbol_errors_low[0x20]; 9094290650Shselasky 9095290650Shselasky u8 dot3control_in_unknown_opcodes_high[0x20]; 9096290650Shselasky 9097290650Shselasky u8 dot3control_in_unknown_opcodes_low[0x20]; 9098290650Shselasky 9099290650Shselasky u8 dot3in_pause_frames_high[0x20]; 9100290650Shselasky 9101290650Shselasky u8 dot3in_pause_frames_low[0x20]; 9102290650Shselasky 9103290650Shselasky u8 dot3out_pause_frames_high[0x20]; 9104290650Shselasky 9105290650Shselasky u8 dot3out_pause_frames_low[0x20]; 9106290650Shselasky 9107290650Shselasky u8 reserved_0[0x3c0]; 9108290650Shselasky}; 9109290650Shselasky 9110290650Shselaskystruct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits { 9111290650Shselasky u8 if_in_octets_high[0x20]; 9112290650Shselasky 9113290650Shselasky u8 if_in_octets_low[0x20]; 9114290650Shselasky 9115290650Shselasky u8 if_in_ucast_pkts_high[0x20]; 9116290650Shselasky 9117290650Shselasky u8 if_in_ucast_pkts_low[0x20]; 9118290650Shselasky 9119290650Shselasky u8 if_in_discards_high[0x20]; 9120290650Shselasky 9121290650Shselasky u8 if_in_discards_low[0x20]; 9122290650Shselasky 9123290650Shselasky u8 if_in_errors_high[0x20]; 9124290650Shselasky 9125290650Shselasky u8 if_in_errors_low[0x20]; 9126290650Shselasky 9127290650Shselasky u8 if_in_unknown_protos_high[0x20]; 9128290650Shselasky 9129290650Shselasky u8 if_in_unknown_protos_low[0x20]; 9130290650Shselasky 9131290650Shselasky u8 if_out_octets_high[0x20]; 9132290650Shselasky 9133290650Shselasky u8 if_out_octets_low[0x20]; 9134290650Shselasky 9135290650Shselasky u8 if_out_ucast_pkts_high[0x20]; 9136290650Shselasky 9137290650Shselasky u8 if_out_ucast_pkts_low[0x20]; 9138290650Shselasky 9139290650Shselasky u8 if_out_discards_high[0x20]; 9140290650Shselasky 9141290650Shselasky u8 if_out_discards_low[0x20]; 9142290650Shselasky 9143290650Shselasky u8 if_out_errors_high[0x20]; 9144290650Shselasky 9145290650Shselasky u8 if_out_errors_low[0x20]; 9146290650Shselasky 9147290650Shselasky u8 if_in_multicast_pkts_high[0x20]; 9148290650Shselasky 9149290650Shselasky u8 if_in_multicast_pkts_low[0x20]; 9150290650Shselasky 9151290650Shselasky u8 if_in_broadcast_pkts_high[0x20]; 9152290650Shselasky 9153290650Shselasky u8 if_in_broadcast_pkts_low[0x20]; 9154290650Shselasky 9155290650Shselasky u8 if_out_multicast_pkts_high[0x20]; 9156290650Shselasky 9157290650Shselasky u8 if_out_multicast_pkts_low[0x20]; 9158290650Shselasky 9159290650Shselasky u8 if_out_broadcast_pkts_high[0x20]; 9160290650Shselasky 9161290650Shselasky u8 if_out_broadcast_pkts_low[0x20]; 9162290650Shselasky 9163290650Shselasky u8 reserved_0[0x480]; 9164290650Shselasky}; 9165290650Shselasky 9166290650Shselaskystruct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits { 9167290650Shselasky u8 ether_stats_drop_events_high[0x20]; 9168290650Shselasky 9169290650Shselasky u8 ether_stats_drop_events_low[0x20]; 9170290650Shselasky 9171290650Shselasky u8 ether_stats_octets_high[0x20]; 9172290650Shselasky 9173290650Shselasky u8 ether_stats_octets_low[0x20]; 9174290650Shselasky 9175290650Shselasky u8 ether_stats_pkts_high[0x20]; 9176290650Shselasky 9177290650Shselasky u8 ether_stats_pkts_low[0x20]; 9178290650Shselasky 9179290650Shselasky u8 ether_stats_broadcast_pkts_high[0x20]; 9180290650Shselasky 9181290650Shselasky u8 ether_stats_broadcast_pkts_low[0x20]; 9182290650Shselasky 9183290650Shselasky u8 ether_stats_multicast_pkts_high[0x20]; 9184290650Shselasky 9185290650Shselasky u8 ether_stats_multicast_pkts_low[0x20]; 9186290650Shselasky 9187290650Shselasky u8 ether_stats_crc_align_errors_high[0x20]; 9188290650Shselasky 9189290650Shselasky u8 ether_stats_crc_align_errors_low[0x20]; 9190290650Shselasky 9191290650Shselasky u8 ether_stats_undersize_pkts_high[0x20]; 9192290650Shselasky 9193290650Shselasky u8 ether_stats_undersize_pkts_low[0x20]; 9194290650Shselasky 9195290650Shselasky u8 ether_stats_oversize_pkts_high[0x20]; 9196290650Shselasky 9197290650Shselasky u8 ether_stats_oversize_pkts_low[0x20]; 9198290650Shselasky 9199290650Shselasky u8 ether_stats_fragments_high[0x20]; 9200290650Shselasky 9201290650Shselasky u8 ether_stats_fragments_low[0x20]; 9202290650Shselasky 9203290650Shselasky u8 ether_stats_jabbers_high[0x20]; 9204290650Shselasky 9205290650Shselasky u8 ether_stats_jabbers_low[0x20]; 9206290650Shselasky 9207290650Shselasky u8 ether_stats_collisions_high[0x20]; 9208290650Shselasky 9209290650Shselasky u8 ether_stats_collisions_low[0x20]; 9210290650Shselasky 9211290650Shselasky u8 ether_stats_pkts64octets_high[0x20]; 9212290650Shselasky 9213290650Shselasky u8 ether_stats_pkts64octets_low[0x20]; 9214290650Shselasky 9215290650Shselasky u8 ether_stats_pkts65to127octets_high[0x20]; 9216290650Shselasky 9217290650Shselasky u8 ether_stats_pkts65to127octets_low[0x20]; 9218290650Shselasky 9219290650Shselasky u8 ether_stats_pkts128to255octets_high[0x20]; 9220290650Shselasky 9221290650Shselasky u8 ether_stats_pkts128to255octets_low[0x20]; 9222290650Shselasky 9223290650Shselasky u8 ether_stats_pkts256to511octets_high[0x20]; 9224290650Shselasky 9225290650Shselasky u8 ether_stats_pkts256to511octets_low[0x20]; 9226290650Shselasky 9227290650Shselasky u8 ether_stats_pkts512to1023octets_high[0x20]; 9228290650Shselasky 9229290650Shselasky u8 ether_stats_pkts512to1023octets_low[0x20]; 9230290650Shselasky 9231290650Shselasky u8 ether_stats_pkts1024to1518octets_high[0x20]; 9232290650Shselasky 9233290650Shselasky u8 ether_stats_pkts1024to1518octets_low[0x20]; 9234290650Shselasky 9235290650Shselasky u8 ether_stats_pkts1519to2047octets_high[0x20]; 9236290650Shselasky 9237290650Shselasky u8 ether_stats_pkts1519to2047octets_low[0x20]; 9238290650Shselasky 9239290650Shselasky u8 ether_stats_pkts2048to4095octets_high[0x20]; 9240290650Shselasky 9241290650Shselasky u8 ether_stats_pkts2048to4095octets_low[0x20]; 9242290650Shselasky 9243290650Shselasky u8 ether_stats_pkts4096to8191octets_high[0x20]; 9244290650Shselasky 9245290650Shselasky u8 ether_stats_pkts4096to8191octets_low[0x20]; 9246290650Shselasky 9247290650Shselasky u8 ether_stats_pkts8192to10239octets_high[0x20]; 9248290650Shselasky 9249290650Shselasky u8 ether_stats_pkts8192to10239octets_low[0x20]; 9250290650Shselasky 9251290650Shselasky u8 reserved_0[0x280]; 9252290650Shselasky}; 9253290650Shselasky 9254290650Shselaskystruct mlx5_ifc_ib_portcntrs_attribute_grp_data_bits { 9255290650Shselasky u8 symbol_error_counter[0x10]; 9256290650Shselasky u8 link_error_recovery_counter[0x8]; 9257290650Shselasky u8 link_downed_counter[0x8]; 9258290650Shselasky 9259290650Shselasky u8 port_rcv_errors[0x10]; 9260290650Shselasky u8 port_rcv_remote_physical_errors[0x10]; 9261290650Shselasky 9262290650Shselasky u8 port_rcv_switch_relay_errors[0x10]; 9263290650Shselasky u8 port_xmit_discards[0x10]; 9264290650Shselasky 9265290650Shselasky u8 port_xmit_constraint_errors[0x8]; 9266290650Shselasky u8 port_rcv_constraint_errors[0x8]; 9267290650Shselasky u8 reserved_0[0x8]; 9268290650Shselasky u8 local_link_integrity_errors[0x4]; 9269290650Shselasky u8 excessive_buffer_overrun_errors[0x4]; 9270290650Shselasky 9271290650Shselasky u8 reserved_1[0x10]; 9272290650Shselasky u8 vl_15_dropped[0x10]; 9273290650Shselasky 9274290650Shselasky u8 port_xmit_data[0x20]; 9275290650Shselasky 9276290650Shselasky u8 port_rcv_data[0x20]; 9277290650Shselasky 9278290650Shselasky u8 port_xmit_pkts[0x20]; 9279290650Shselasky 9280290650Shselasky u8 port_rcv_pkts[0x20]; 9281290650Shselasky 9282290650Shselasky u8 port_xmit_wait[0x20]; 9283290650Shselasky 9284290650Shselasky u8 reserved_2[0x680]; 9285290650Shselasky}; 9286290650Shselasky 9287290650Shselaskystruct mlx5_ifc_trc_tlb_reg_bits { 9288290650Shselasky u8 reserved_0[0x80]; 9289290650Shselasky 9290290650Shselasky u8 tlb_addr[0][0x40]; 9291290650Shselasky}; 9292290650Shselasky 9293290650Shselaskystruct mlx5_ifc_trc_read_fifo_reg_bits { 9294290650Shselasky u8 reserved_0[0x10]; 9295290650Shselasky u8 requested_event_num[0x10]; 9296290650Shselasky 9297290650Shselasky u8 reserved_1[0x20]; 9298290650Shselasky 9299290650Shselasky u8 reserved_2[0x10]; 9300290650Shselasky u8 acual_event_num[0x10]; 9301290650Shselasky 9302290650Shselasky u8 reserved_3[0x20]; 9303290650Shselasky 9304290650Shselasky u8 event[0][0x40]; 9305290650Shselasky}; 9306290650Shselasky 9307290650Shselaskystruct mlx5_ifc_trc_lock_reg_bits { 9308290650Shselasky u8 reserved_0[0x1f]; 9309290650Shselasky u8 lock[0x1]; 9310290650Shselasky 9311290650Shselasky u8 reserved_1[0x60]; 9312290650Shselasky}; 9313290650Shselasky 9314290650Shselaskystruct mlx5_ifc_trc_filter_reg_bits { 9315290650Shselasky u8 status[0x1]; 9316290650Shselasky u8 reserved_0[0xf]; 9317290650Shselasky u8 filter_index[0x10]; 9318290650Shselasky 9319290650Shselasky u8 reserved_1[0x20]; 9320290650Shselasky 9321290650Shselasky u8 filter_val[0x20]; 9322290650Shselasky 9323290650Shselasky u8 reserved_2[0x1a0]; 9324290650Shselasky}; 9325290650Shselasky 9326290650Shselaskystruct mlx5_ifc_trc_event_reg_bits { 9327290650Shselasky u8 status[0x1]; 9328290650Shselasky u8 reserved_0[0xf]; 9329290650Shselasky u8 event_index[0x10]; 9330290650Shselasky 9331290650Shselasky u8 reserved_1[0x20]; 9332290650Shselasky 9333290650Shselasky u8 event_id[0x20]; 9334290650Shselasky 9335290650Shselasky u8 event_selector_val[0x10]; 9336290650Shselasky u8 event_selector_size[0x10]; 9337290650Shselasky 9338290650Shselasky u8 reserved_2[0x180]; 9339290650Shselasky}; 9340290650Shselasky 9341290650Shselaskystruct mlx5_ifc_trc_conf_reg_bits { 9342290650Shselasky u8 limit_en[0x1]; 9343290650Shselasky u8 reserved_0[0x3]; 9344290650Shselasky u8 dump_mode[0x4]; 9345290650Shselasky u8 reserved_1[0x15]; 9346290650Shselasky u8 state[0x3]; 9347290650Shselasky 9348290650Shselasky u8 reserved_2[0x20]; 9349290650Shselasky 9350290650Shselasky u8 limit_event_index[0x20]; 9351290650Shselasky 9352290650Shselasky u8 mkey[0x20]; 9353290650Shselasky 9354290650Shselasky u8 fifo_ready_ev_num[0x20]; 9355290650Shselasky 9356290650Shselasky u8 reserved_3[0x160]; 9357290650Shselasky}; 9358290650Shselasky 9359290650Shselaskystruct mlx5_ifc_trc_cap_reg_bits { 9360290650Shselasky u8 reserved_0[0x18]; 9361290650Shselasky u8 dump_mode[0x8]; 9362290650Shselasky 9363290650Shselasky u8 reserved_1[0x20]; 9364290650Shselasky 9365290650Shselasky u8 num_of_events[0x10]; 9366290650Shselasky u8 num_of_filters[0x10]; 9367290650Shselasky 9368290650Shselasky u8 fifo_size[0x20]; 9369290650Shselasky 9370290650Shselasky u8 tlb_size[0x10]; 9371290650Shselasky u8 event_size[0x10]; 9372290650Shselasky 9373290650Shselasky u8 reserved_2[0x160]; 9374290650Shselasky}; 9375290650Shselasky 9376290650Shselaskystruct mlx5_ifc_set_node_in_bits { 9377290650Shselasky u8 node_description[64][0x8]; 9378290650Shselasky}; 9379290650Shselasky 9380290650Shselaskystruct mlx5_ifc_register_power_settings_bits { 9381290650Shselasky u8 reserved_0[0x18]; 9382290650Shselasky u8 power_settings_level[0x8]; 9383290650Shselasky 9384290650Shselasky u8 reserved_1[0x60]; 9385290650Shselasky}; 9386290650Shselasky 9387290650Shselaskystruct mlx5_ifc_register_host_endianess_bits { 9388290650Shselasky u8 he[0x1]; 9389290650Shselasky u8 reserved_0[0x1f]; 9390290650Shselasky 9391290650Shselasky u8 reserved_1[0x60]; 9392290650Shselasky}; 9393290650Shselasky 9394290650Shselaskystruct mlx5_ifc_register_diag_buffer_ctrl_bits { 9395290650Shselasky u8 physical_address[0x40]; 9396290650Shselasky}; 9397290650Shselasky 9398290650Shselaskystruct mlx5_ifc_qtct_reg_bits { 9399306233Shselasky u8 operation_type[0x2]; 9400306233Shselasky u8 cap_local_admin[0x1]; 9401306233Shselasky u8 cap_remote_admin[0x1]; 9402306233Shselasky u8 reserved_0[0x4]; 9403290650Shselasky u8 port_number[0x8]; 9404290650Shselasky u8 reserved_1[0xd]; 9405290650Shselasky u8 prio[0x3]; 9406290650Shselasky 9407290650Shselasky u8 reserved_2[0x1d]; 9408290650Shselasky u8 tclass[0x3]; 9409290650Shselasky}; 9410290650Shselasky 9411290650Shselaskystruct mlx5_ifc_qpdp_reg_bits { 9412290650Shselasky u8 reserved_0[0x8]; 9413290650Shselasky u8 port_number[0x8]; 9414290650Shselasky u8 reserved_1[0x10]; 9415290650Shselasky 9416290650Shselasky u8 reserved_2[0x1d]; 9417290650Shselasky u8 pprio[0x3]; 9418290650Shselasky}; 9419290650Shselasky 9420290650Shselaskystruct mlx5_ifc_port_info_ro_fields_param_bits { 9421290650Shselasky u8 reserved_0[0x8]; 9422290650Shselasky u8 port[0x8]; 9423290650Shselasky u8 max_gid[0x10]; 9424290650Shselasky 9425290650Shselasky u8 reserved_1[0x20]; 9426290650Shselasky 9427290650Shselasky u8 port_guid[0x40]; 9428290650Shselasky}; 9429290650Shselasky 9430290650Shselaskystruct mlx5_ifc_nvqc_reg_bits { 9431290650Shselasky u8 type[0x20]; 9432290650Shselasky 9433290650Shselasky u8 reserved_0[0x18]; 9434290650Shselasky u8 version[0x4]; 9435290650Shselasky u8 reserved_1[0x2]; 9436290650Shselasky u8 support_wr[0x1]; 9437290650Shselasky u8 support_rd[0x1]; 9438290650Shselasky}; 9439290650Shselasky 9440290650Shselaskystruct mlx5_ifc_nvia_reg_bits { 9441290650Shselasky u8 reserved_0[0x1d]; 9442290650Shselasky u8 target[0x3]; 9443290650Shselasky 9444290650Shselasky u8 reserved_1[0x20]; 9445290650Shselasky}; 9446290650Shselasky 9447290650Shselaskystruct mlx5_ifc_nvdi_reg_bits { 9448290650Shselasky struct mlx5_ifc_config_item_bits configuration_item_header; 9449290650Shselasky}; 9450290650Shselasky 9451290650Shselaskystruct mlx5_ifc_nvda_reg_bits { 9452290650Shselasky struct mlx5_ifc_config_item_bits configuration_item_header; 9453290650Shselasky 9454290650Shselasky u8 configuration_item_data[0x20]; 9455290650Shselasky}; 9456290650Shselasky 9457290650Shselaskystruct mlx5_ifc_node_info_ro_fields_param_bits { 9458290650Shselasky u8 system_image_guid[0x40]; 9459290650Shselasky 9460290650Shselasky u8 reserved_0[0x40]; 9461290650Shselasky 9462290650Shselasky u8 node_guid[0x40]; 9463290650Shselasky 9464290650Shselasky u8 reserved_1[0x10]; 9465290650Shselasky u8 max_pkey[0x10]; 9466290650Shselasky 9467290650Shselasky u8 reserved_2[0x20]; 9468290650Shselasky}; 9469290650Shselasky 9470290650Shselaskystruct mlx5_ifc_ets_tcn_config_reg_bits { 9471290650Shselasky u8 g[0x1]; 9472290650Shselasky u8 b[0x1]; 9473290650Shselasky u8 r[0x1]; 9474290650Shselasky u8 reserved_0[0x9]; 9475290650Shselasky u8 group[0x4]; 9476290650Shselasky u8 reserved_1[0x9]; 9477290650Shselasky u8 bw_allocation[0x7]; 9478290650Shselasky 9479290650Shselasky u8 reserved_2[0xc]; 9480290650Shselasky u8 max_bw_units[0x4]; 9481290650Shselasky u8 reserved_3[0x8]; 9482290650Shselasky u8 max_bw_value[0x8]; 9483290650Shselasky}; 9484290650Shselasky 9485290650Shselaskystruct mlx5_ifc_ets_global_config_reg_bits { 9486290650Shselasky u8 reserved_0[0x2]; 9487290650Shselasky u8 r[0x1]; 9488290650Shselasky u8 reserved_1[0x1d]; 9489290650Shselasky 9490290650Shselasky u8 reserved_2[0xc]; 9491290650Shselasky u8 max_bw_units[0x4]; 9492290650Shselasky u8 reserved_3[0x8]; 9493290650Shselasky u8 max_bw_value[0x8]; 9494290650Shselasky}; 9495290650Shselasky 9496331577Shselaskystruct mlx5_ifc_qetc_reg_bits { 9497331577Shselasky u8 reserved_at_0[0x8]; 9498331577Shselasky u8 port_number[0x8]; 9499331577Shselasky u8 reserved_at_10[0x30]; 9500331577Shselasky 9501331577Shselasky struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8]; 9502331577Shselasky struct mlx5_ifc_ets_global_config_reg_bits global_configuration; 9503331577Shselasky}; 9504331577Shselasky 9505290650Shselaskystruct mlx5_ifc_nodnic_mac_filters_bits { 9506290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter0; 9507290650Shselasky 9508290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter1; 9509290650Shselasky 9510290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter2; 9511290650Shselasky 9512290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter3; 9513290650Shselasky 9514290650Shselasky struct mlx5_ifc_mac_address_layout_bits mac_filter4; 9515290650Shselasky 9516290650Shselasky u8 reserved_0[0xc0]; 9517290650Shselasky}; 9518290650Shselasky 9519290650Shselaskystruct mlx5_ifc_nodnic_gid_filters_bits { 9520290650Shselasky u8 mgid_filter0[16][0x8]; 9521290650Shselasky 9522290650Shselasky u8 mgid_filter1[16][0x8]; 9523290650Shselasky 9524290650Shselasky u8 mgid_filter2[16][0x8]; 9525290650Shselasky 9526290650Shselasky u8 mgid_filter3[16][0x8]; 9527290650Shselasky}; 9528290650Shselasky 9529290650Shselaskyenum { 9530290650Shselasky MLX5_NODNIC_CONFIG_REG_NUM_PORTS_SINGLE_PORT = 0x0, 9531290650Shselasky MLX5_NODNIC_CONFIG_REG_NUM_PORTS_DUAL_PORT = 0x1, 9532290650Shselasky}; 9533290650Shselasky 9534290650Shselaskyenum { 9535290650Shselasky MLX5_NODNIC_CONFIG_REG_CQE_FORMAT_LEGACY_CQE = 0x0, 9536290650Shselasky MLX5_NODNIC_CONFIG_REG_CQE_FORMAT_NEW_CQE = 0x1, 9537290650Shselasky}; 9538290650Shselasky 9539290650Shselaskystruct mlx5_ifc_nodnic_config_reg_bits { 9540290650Shselasky u8 no_dram_nic_revision[0x8]; 9541290650Shselasky u8 hardware_format[0x8]; 9542290650Shselasky u8 support_receive_filter[0x1]; 9543290650Shselasky u8 support_promisc_filter[0x1]; 9544290650Shselasky u8 support_promisc_multicast_filter[0x1]; 9545290650Shselasky u8 reserved_0[0x2]; 9546290650Shselasky u8 log_working_buffer_size[0x3]; 9547290650Shselasky u8 log_pkey_table_size[0x4]; 9548290650Shselasky u8 reserved_1[0x3]; 9549290650Shselasky u8 num_ports[0x1]; 9550290650Shselasky 9551290650Shselasky u8 reserved_2[0x2]; 9552290650Shselasky u8 log_max_ring_size[0x6]; 9553290650Shselasky u8 reserved_3[0x18]; 9554290650Shselasky 9555290650Shselasky u8 lkey[0x20]; 9556290650Shselasky 9557290650Shselasky u8 cqe_format[0x4]; 9558290650Shselasky u8 reserved_4[0x1c]; 9559290650Shselasky 9560290650Shselasky u8 node_guid[0x40]; 9561290650Shselasky 9562290650Shselasky u8 reserved_5[0x740]; 9563290650Shselasky 9564290650Shselasky struct mlx5_ifc_nodnic_port_config_reg_bits port1_settings; 9565290650Shselasky 9566290650Shselasky struct mlx5_ifc_nodnic_port_config_reg_bits port2_settings; 9567290650Shselasky}; 9568290650Shselasky 9569290650Shselaskystruct mlx5_ifc_vlan_layout_bits { 9570290650Shselasky u8 reserved_0[0x14]; 9571290650Shselasky u8 vlan[0xc]; 9572290650Shselasky 9573290650Shselasky u8 reserved_1[0x20]; 9574290650Shselasky}; 9575290650Shselasky 9576290650Shselaskystruct mlx5_ifc_umr_pointer_desc_argument_bits { 9577290650Shselasky u8 reserved_0[0x20]; 9578290650Shselasky 9579290650Shselasky u8 mkey[0x20]; 9580290650Shselasky 9581290650Shselasky u8 addressh_63_32[0x20]; 9582290650Shselasky 9583290650Shselasky u8 addressl_31_0[0x20]; 9584290650Shselasky}; 9585290650Shselasky 9586290650Shselaskystruct mlx5_ifc_ud_adrs_vector_bits { 9587290650Shselasky u8 dc_key[0x40]; 9588290650Shselasky 9589290650Shselasky u8 ext[0x1]; 9590290650Shselasky u8 reserved_0[0x7]; 9591290650Shselasky u8 destination_qp_dct[0x18]; 9592290650Shselasky 9593290650Shselasky u8 static_rate[0x4]; 9594290650Shselasky u8 sl_eth_prio[0x4]; 9595290650Shselasky u8 fl[0x1]; 9596290650Shselasky u8 mlid[0x7]; 9597290650Shselasky u8 rlid_udp_sport[0x10]; 9598290650Shselasky 9599290650Shselasky u8 reserved_1[0x20]; 9600290650Shselasky 9601290650Shselasky u8 rmac_47_16[0x20]; 9602290650Shselasky 9603290650Shselasky u8 rmac_15_0[0x10]; 9604290650Shselasky u8 tclass[0x8]; 9605290650Shselasky u8 hop_limit[0x8]; 9606290650Shselasky 9607290650Shselasky u8 reserved_2[0x1]; 9608290650Shselasky u8 grh[0x1]; 9609290650Shselasky u8 reserved_3[0x2]; 9610290650Shselasky u8 src_addr_index[0x8]; 9611290650Shselasky u8 flow_label[0x14]; 9612290650Shselasky 9613290650Shselasky u8 rgid_rip[16][0x8]; 9614290650Shselasky}; 9615290650Shselasky 9616290650Shselaskystruct mlx5_ifc_port_module_event_bits { 9617290650Shselasky u8 reserved_0[0x8]; 9618290650Shselasky u8 module[0x8]; 9619290650Shselasky u8 reserved_1[0xc]; 9620290650Shselasky u8 module_status[0x4]; 9621290650Shselasky 9622290650Shselasky u8 reserved_2[0x14]; 9623290650Shselasky u8 error_type[0x4]; 9624290650Shselasky u8 reserved_3[0x8]; 9625290650Shselasky 9626290650Shselasky u8 reserved_4[0xa0]; 9627290650Shselasky}; 9628290650Shselasky 9629290650Shselaskystruct mlx5_ifc_icmd_control_bits { 9630290650Shselasky u8 opcode[0x10]; 9631290650Shselasky u8 status[0x8]; 9632290650Shselasky u8 reserved_0[0x7]; 9633290650Shselasky u8 busy[0x1]; 9634290650Shselasky}; 9635290650Shselasky 9636290650Shselaskystruct mlx5_ifc_eqe_bits { 9637290650Shselasky u8 reserved_0[0x8]; 9638290650Shselasky u8 event_type[0x8]; 9639290650Shselasky u8 reserved_1[0x8]; 9640290650Shselasky u8 event_sub_type[0x8]; 9641290650Shselasky 9642290650Shselasky u8 reserved_2[0xe0]; 9643290650Shselasky 9644290650Shselasky union mlx5_ifc_event_auto_bits event_data; 9645290650Shselasky 9646290650Shselasky u8 reserved_3[0x10]; 9647290650Shselasky u8 signature[0x8]; 9648290650Shselasky u8 reserved_4[0x7]; 9649290650Shselasky u8 owner[0x1]; 9650290650Shselasky}; 9651290650Shselasky 9652290650Shselaskyenum { 9653290650Shselasky MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7, 9654290650Shselasky}; 9655290650Shselasky 9656290650Shselaskystruct mlx5_ifc_cmd_queue_entry_bits { 9657290650Shselasky u8 type[0x8]; 9658290650Shselasky u8 reserved_0[0x18]; 9659290650Shselasky 9660290650Shselasky u8 input_length[0x20]; 9661290650Shselasky 9662290650Shselasky u8 input_mailbox_pointer_63_32[0x20]; 9663290650Shselasky 9664290650Shselasky u8 input_mailbox_pointer_31_9[0x17]; 9665290650Shselasky u8 reserved_1[0x9]; 9666290650Shselasky 9667290650Shselasky u8 command_input_inline_data[16][0x8]; 9668290650Shselasky 9669290650Shselasky u8 command_output_inline_data[16][0x8]; 9670290650Shselasky 9671290650Shselasky u8 output_mailbox_pointer_63_32[0x20]; 9672290650Shselasky 9673290650Shselasky u8 output_mailbox_pointer_31_9[0x17]; 9674290650Shselasky u8 reserved_2[0x9]; 9675290650Shselasky 9676290650Shselasky u8 output_length[0x20]; 9677290650Shselasky 9678290650Shselasky u8 token[0x8]; 9679290650Shselasky u8 signature[0x8]; 9680290650Shselasky u8 reserved_3[0x8]; 9681290650Shselasky u8 status[0x7]; 9682290650Shselasky u8 ownership[0x1]; 9683290650Shselasky}; 9684290650Shselasky 9685290650Shselaskystruct mlx5_ifc_cmd_out_bits { 9686290650Shselasky u8 status[0x8]; 9687290650Shselasky u8 reserved_0[0x18]; 9688290650Shselasky 9689290650Shselasky u8 syndrome[0x20]; 9690290650Shselasky 9691290650Shselasky u8 command_output[0x20]; 9692290650Shselasky}; 9693290650Shselasky 9694290650Shselaskystruct mlx5_ifc_cmd_in_bits { 9695290650Shselasky u8 opcode[0x10]; 9696290650Shselasky u8 reserved_0[0x10]; 9697290650Shselasky 9698290650Shselasky u8 reserved_1[0x10]; 9699290650Shselasky u8 op_mod[0x10]; 9700290650Shselasky 9701290650Shselasky u8 command[0][0x20]; 9702290650Shselasky}; 9703290650Shselasky 9704290650Shselaskystruct mlx5_ifc_cmd_if_box_bits { 9705290650Shselasky u8 mailbox_data[512][0x8]; 9706290650Shselasky 9707290650Shselasky u8 reserved_0[0x180]; 9708290650Shselasky 9709290650Shselasky u8 next_pointer_63_32[0x20]; 9710290650Shselasky 9711290650Shselasky u8 next_pointer_31_10[0x16]; 9712290650Shselasky u8 reserved_1[0xa]; 9713290650Shselasky 9714290650Shselasky u8 block_number[0x20]; 9715290650Shselasky 9716290650Shselasky u8 reserved_2[0x8]; 9717290650Shselasky u8 token[0x8]; 9718290650Shselasky u8 ctrl_signature[0x8]; 9719290650Shselasky u8 signature[0x8]; 9720290650Shselasky}; 9721290650Shselasky 9722290650Shselaskystruct mlx5_ifc_mtt_bits { 9723290650Shselasky u8 ptag_63_32[0x20]; 9724290650Shselasky 9725290650Shselasky u8 ptag_31_8[0x18]; 9726290650Shselasky u8 reserved_0[0x6]; 9727290650Shselasky u8 wr_en[0x1]; 9728290650Shselasky u8 rd_en[0x1]; 9729290650Shselasky}; 9730290650Shselasky 9731331585Shselasky/* Vendor Specific Capabilities, VSC */ 9732331585Shselaskyenum { 9733331585Shselasky MLX5_VSC_DOMAIN_ICMD = 0x1, 9734331585Shselasky MLX5_VSC_DOMAIN_PROTECTED_CRSPACE = 0x6, 9735353214Shselasky MLX5_VSC_DOMAIN_SCAN_CRSPACE = 0x7, 9736331585Shselasky MLX5_VSC_DOMAIN_SEMAPHORES = 0xA, 9737331585Shselasky}; 9738331585Shselasky 9739290650Shselaskystruct mlx5_ifc_vendor_specific_cap_bits { 9740290650Shselasky u8 type[0x8]; 9741290650Shselasky u8 length[0x8]; 9742290650Shselasky u8 next_pointer[0x8]; 9743290650Shselasky u8 capability_id[0x8]; 9744290650Shselasky 9745290650Shselasky u8 status[0x3]; 9746290650Shselasky u8 reserved_0[0xd]; 9747290650Shselasky u8 space[0x10]; 9748290650Shselasky 9749290650Shselasky u8 counter[0x20]; 9750290650Shselasky 9751290650Shselasky u8 semaphore[0x20]; 9752290650Shselasky 9753290650Shselasky u8 flag[0x1]; 9754290650Shselasky u8 reserved_1[0x1]; 9755290650Shselasky u8 address[0x1e]; 9756290650Shselasky 9757290650Shselasky u8 data[0x20]; 9758290650Shselasky}; 9759290650Shselasky 9760353210Shselaskystruct mlx5_ifc_vsc_space_bits { 9761353210Shselasky u8 status[0x3]; 9762353210Shselasky u8 reserved0[0xd]; 9763353210Shselasky u8 space[0x10]; 9764353210Shselasky}; 9765353210Shselasky 9766353210Shselaskystruct mlx5_ifc_vsc_addr_bits { 9767353210Shselasky u8 flag[0x1]; 9768353210Shselasky u8 reserved0[0x1]; 9769353210Shselasky u8 address[0x1e]; 9770353210Shselasky}; 9771353210Shselasky 9772290650Shselaskyenum { 9773290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0, 9774290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1, 9775290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2, 9776290650Shselasky}; 9777290650Shselasky 9778290650Shselaskyenum { 9779290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0, 9780290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1, 9781290650Shselasky MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2, 9782290650Shselasky}; 9783290650Shselasky 9784290650Shselaskyenum { 9785290650Shselasky MLX5_HEALTH_SYNDR_FW_ERR = 0x1, 9786290650Shselasky MLX5_HEALTH_SYNDR_IRISC_ERR = 0x7, 9787290650Shselasky MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR = 0x8, 9788290650Shselasky MLX5_HEALTH_SYNDR_CRC_ERR = 0x9, 9789290650Shselasky MLX5_HEALTH_SYNDR_FETCH_PCI_ERR = 0xa, 9790290650Shselasky MLX5_HEALTH_SYNDR_HW_FTL_ERR = 0xb, 9791290650Shselasky MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR = 0xc, 9792290650Shselasky MLX5_HEALTH_SYNDR_EQ_ERR = 0xd, 9793290650Shselasky MLX5_HEALTH_SYNDR_EQ_INV = 0xe, 9794290650Shselasky MLX5_HEALTH_SYNDR_FFSER_ERR = 0xf, 9795290650Shselasky MLX5_HEALTH_SYNDR_HIGH_TEMP = 0x10, 9796290650Shselasky}; 9797290650Shselasky 9798290650Shselaskystruct mlx5_ifc_initial_seg_bits { 9799290650Shselasky u8 fw_rev_minor[0x10]; 9800290650Shselasky u8 fw_rev_major[0x10]; 9801290650Shselasky 9802290650Shselasky u8 cmd_interface_rev[0x10]; 9803290650Shselasky u8 fw_rev_subminor[0x10]; 9804290650Shselasky 9805290650Shselasky u8 reserved_0[0x40]; 9806290650Shselasky 9807290650Shselasky u8 cmdq_phy_addr_63_32[0x20]; 9808290650Shselasky 9809290650Shselasky u8 cmdq_phy_addr_31_12[0x14]; 9810290650Shselasky u8 reserved_1[0x2]; 9811290650Shselasky u8 nic_interface[0x2]; 9812290650Shselasky u8 log_cmdq_size[0x4]; 9813290650Shselasky u8 log_cmdq_stride[0x4]; 9814290650Shselasky 9815290650Shselasky u8 command_doorbell_vector[0x20]; 9816290650Shselasky 9817290650Shselasky u8 reserved_2[0xf00]; 9818290650Shselasky 9819290650Shselasky u8 initializing[0x1]; 9820290650Shselasky u8 reserved_3[0x4]; 9821290650Shselasky u8 nic_interface_supported[0x3]; 9822290650Shselasky u8 reserved_4[0x18]; 9823290650Shselasky 9824290650Shselasky struct mlx5_ifc_health_buffer_bits health_buffer; 9825290650Shselasky 9826290650Shselasky u8 no_dram_nic_offset[0x20]; 9827290650Shselasky 9828290650Shselasky u8 reserved_5[0x6de0]; 9829290650Shselasky 9830290650Shselasky u8 internal_timer_h[0x20]; 9831290650Shselasky 9832290650Shselasky u8 internal_timer_l[0x20]; 9833290650Shselasky 9834290650Shselasky u8 reserved_6[0x20]; 9835290650Shselasky 9836290650Shselasky u8 reserved_7[0x1f]; 9837290650Shselasky u8 clear_int[0x1]; 9838290650Shselasky 9839290650Shselasky u8 health_syndrome[0x8]; 9840290650Shselasky u8 health_counter[0x18]; 9841290650Shselasky 9842290650Shselasky u8 reserved_8[0x17fc0]; 9843290650Shselasky}; 9844290650Shselasky 9845290650Shselaskyunion mlx5_ifc_icmd_interface_document_bits { 9846290650Shselasky struct mlx5_ifc_fw_version_bits fw_version; 9847290650Shselasky struct mlx5_ifc_icmd_access_reg_in_bits icmd_access_reg_in; 9848290650Shselasky struct mlx5_ifc_icmd_access_reg_out_bits icmd_access_reg_out; 9849290650Shselasky struct mlx5_ifc_icmd_init_ocsd_in_bits icmd_init_ocsd_in; 9850290650Shselasky struct mlx5_ifc_icmd_ocbb_init_in_bits icmd_ocbb_init_in; 9851290650Shselasky struct mlx5_ifc_icmd_ocbb_query_etoc_stats_out_bits icmd_ocbb_query_etoc_stats_out; 9852290650Shselasky struct mlx5_ifc_icmd_ocbb_query_header_stats_out_bits icmd_ocbb_query_header_stats_out; 9853290650Shselasky struct mlx5_ifc_icmd_query_cap_general_bits icmd_query_cap_general; 9854290650Shselasky struct mlx5_ifc_icmd_query_cap_in_bits icmd_query_cap_in; 9855290650Shselasky struct mlx5_ifc_icmd_query_fw_info_out_bits icmd_query_fw_info_out; 9856290650Shselasky struct mlx5_ifc_icmd_query_virtual_mac_out_bits icmd_query_virtual_mac_out; 9857290650Shselasky struct mlx5_ifc_icmd_set_virtual_mac_in_bits icmd_set_virtual_mac_in; 9858290650Shselasky struct mlx5_ifc_icmd_set_wol_rol_in_bits icmd_set_wol_rol_in; 9859290650Shselasky struct mlx5_ifc_icmd_set_wol_rol_out_bits icmd_set_wol_rol_out; 9860290650Shselasky u8 reserved_0[0x42c0]; 9861290650Shselasky}; 9862290650Shselasky 9863290650Shselaskyunion mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits { 9864290650Shselasky struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout; 9865290650Shselasky struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout; 9866290650Shselasky struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout; 9867290650Shselasky struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout; 9868290650Shselasky struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout; 9869308678Shselasky struct mlx5_ifc_eth_discard_cntrs_grp_bits eth_discard_cntrs_grp; 9870290650Shselasky struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout; 9871290650Shselasky struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs; 9872321992Shselasky struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs; 9873308678Shselasky struct mlx5_ifc_infiniband_port_cntrs_bits infiniband_port_cntrs; 9874290650Shselasky u8 reserved_0[0x7c0]; 9875290650Shselasky}; 9876290650Shselasky 9877290650Shselaskystruct mlx5_ifc_ppcnt_reg_bits { 9878290650Shselasky u8 swid[0x8]; 9879290650Shselasky u8 local_port[0x8]; 9880290650Shselasky u8 pnat[0x2]; 9881290650Shselasky u8 reserved_0[0x8]; 9882290650Shselasky u8 grp[0x6]; 9883290650Shselasky 9884290650Shselasky u8 clr[0x1]; 9885290650Shselasky u8 reserved_1[0x1c]; 9886290650Shselasky u8 prio_tc[0x3]; 9887290650Shselasky 9888290650Shselasky union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set; 9889290650Shselasky}; 9890290650Shselasky 9891347863Shselaskystruct mlx5_ifc_pcie_lanes_counters_bits { 9892306233Shselasky u8 life_time_counter_high[0x20]; 9893306233Shselasky 9894306233Shselasky u8 life_time_counter_low[0x20]; 9895306233Shselasky 9896347863Shselasky u8 error_counter_lane0[0x20]; 9897347863Shselasky 9898347863Shselasky u8 error_counter_lane1[0x20]; 9899347863Shselasky 9900347863Shselasky u8 error_counter_lane2[0x20]; 9901347863Shselasky 9902347863Shselasky u8 error_counter_lane3[0x20]; 9903347863Shselasky 9904347863Shselasky u8 error_counter_lane4[0x20]; 9905347863Shselasky 9906347863Shselasky u8 error_counter_lane5[0x20]; 9907347863Shselasky 9908347863Shselasky u8 error_counter_lane6[0x20]; 9909347863Shselasky 9910347863Shselasky u8 error_counter_lane7[0x20]; 9911347863Shselasky 9912347863Shselasky u8 error_counter_lane8[0x20]; 9913347863Shselasky 9914347863Shselasky u8 error_counter_lane9[0x20]; 9915347863Shselasky 9916347863Shselasky u8 error_counter_lane10[0x20]; 9917347863Shselasky 9918347863Shselasky u8 error_counter_lane11[0x20]; 9919347863Shselasky 9920347863Shselasky u8 error_counter_lane12[0x20]; 9921347863Shselasky 9922347863Shselasky u8 error_counter_lane13[0x20]; 9923347863Shselasky 9924347863Shselasky u8 error_counter_lane14[0x20]; 9925347863Shselasky 9926347863Shselasky u8 error_counter_lane15[0x20]; 9927347863Shselasky 9928347863Shselasky u8 reserved_at_240[0x580]; 9929347863Shselasky}; 9930347863Shselasky 9931347863Shselaskystruct mlx5_ifc_pcie_lanes_counters_ext_bits { 9932347863Shselasky u8 reserved_at_0[0x40]; 9933347863Shselasky 9934347863Shselasky u8 error_counter_lane0[0x20]; 9935347863Shselasky 9936347863Shselasky u8 error_counter_lane1[0x20]; 9937347863Shselasky 9938347863Shselasky u8 error_counter_lane2[0x20]; 9939347863Shselasky 9940347863Shselasky u8 error_counter_lane3[0x20]; 9941347863Shselasky 9942347863Shselasky u8 error_counter_lane4[0x20]; 9943347863Shselasky 9944347863Shselasky u8 error_counter_lane5[0x20]; 9945347863Shselasky 9946347863Shselasky u8 error_counter_lane6[0x20]; 9947347863Shselasky 9948347863Shselasky u8 error_counter_lane7[0x20]; 9949347863Shselasky 9950347863Shselasky u8 error_counter_lane8[0x20]; 9951347863Shselasky 9952347863Shselasky u8 error_counter_lane9[0x20]; 9953347863Shselasky 9954347863Shselasky u8 error_counter_lane10[0x20]; 9955347863Shselasky 9956347863Shselasky u8 error_counter_lane11[0x20]; 9957347863Shselasky 9958347863Shselasky u8 error_counter_lane12[0x20]; 9959347863Shselasky 9960347863Shselasky u8 error_counter_lane13[0x20]; 9961347863Shselasky 9962347863Shselasky u8 error_counter_lane14[0x20]; 9963347863Shselasky 9964347863Shselasky u8 error_counter_lane15[0x20]; 9965347863Shselasky 9966347863Shselasky u8 reserved_at_240[0x580]; 9967347863Shselasky}; 9968347863Shselasky 9969347863Shselaskystruct mlx5_ifc_pcie_perf_counters_bits { 9970347863Shselasky u8 life_time_counter_high[0x20]; 9971347863Shselasky 9972347863Shselasky u8 life_time_counter_low[0x20]; 9973347863Shselasky 9974306233Shselasky u8 rx_errors[0x20]; 9975306233Shselasky 9976306233Shselasky u8 tx_errors[0x20]; 9977306233Shselasky 9978306233Shselasky u8 l0_to_recovery_eieos[0x20]; 9979306233Shselasky 9980306233Shselasky u8 l0_to_recovery_ts[0x20]; 9981306233Shselasky 9982306233Shselasky u8 l0_to_recovery_framing[0x20]; 9983306233Shselasky 9984306233Shselasky u8 l0_to_recovery_retrain[0x20]; 9985306233Shselasky 9986306233Shselasky u8 crc_error_dllp[0x20]; 9987306233Shselasky 9988306233Shselasky u8 crc_error_tlp[0x20]; 9989306233Shselasky 9990347863Shselasky u8 tx_overflow_buffer_pkt[0x40]; 9991347863Shselasky 9992347863Shselasky u8 outbound_stalled_reads[0x20]; 9993347863Shselasky 9994347863Shselasky u8 outbound_stalled_writes[0x20]; 9995347863Shselasky 9996347863Shselasky u8 outbound_stalled_reads_events[0x20]; 9997347863Shselasky 9998347863Shselasky u8 outbound_stalled_writes_events[0x20]; 9999347863Shselasky 10000347863Shselasky u8 tx_overflow_buffer_marked_pkt[0x40]; 10001347863Shselasky 10002347863Shselasky u8 reserved_at_240[0x580]; 10003306233Shselasky}; 10004306233Shselasky 10005347863Shselaskystruct mlx5_ifc_pcie_perf_counters_ext_bits { 10006347863Shselasky u8 reserved_at_0[0x40]; 10007347863Shselasky 10008347863Shselasky u8 rx_errors[0x20]; 10009347863Shselasky 10010347863Shselasky u8 tx_errors[0x20]; 10011347863Shselasky 10012347863Shselasky u8 reserved_at_80[0xc0]; 10013347863Shselasky 10014347863Shselasky u8 tx_overflow_buffer_pkt[0x40]; 10015347863Shselasky 10016347863Shselasky u8 outbound_stalled_reads[0x20]; 10017347863Shselasky 10018347863Shselasky u8 outbound_stalled_writes[0x20]; 10019347863Shselasky 10020347863Shselasky u8 outbound_stalled_reads_events[0x20]; 10021347863Shselasky 10022347863Shselasky u8 outbound_stalled_writes_events[0x20]; 10023347863Shselasky 10024347863Shselasky u8 tx_overflow_buffer_marked_pkt[0x40]; 10025347863Shselasky 10026347863Shselasky u8 reserved_at_240[0x580]; 10027347863Shselasky}; 10028347863Shselasky 10029347863Shselaskystruct mlx5_ifc_pcie_timers_states_bits { 10030306233Shselasky u8 life_time_counter_high[0x20]; 10031306233Shselasky 10032306233Shselasky u8 life_time_counter_low[0x20]; 10033306233Shselasky 10034306233Shselasky u8 time_to_boot_image_start[0x20]; 10035306233Shselasky 10036306233Shselasky u8 time_to_link_image[0x20]; 10037306233Shselasky 10038306233Shselasky u8 calibration_time[0x20]; 10039306233Shselasky 10040306233Shselasky u8 time_to_first_perst[0x20]; 10041306233Shselasky 10042306233Shselasky u8 time_to_detect_state[0x20]; 10043306233Shselasky 10044306233Shselasky u8 time_to_l0[0x20]; 10045306233Shselasky 10046306233Shselasky u8 time_to_crs_en[0x20]; 10047306233Shselasky 10048306233Shselasky u8 time_to_plastic_image_start[0x20]; 10049306233Shselasky 10050306233Shselasky u8 time_to_iron_image_start[0x20]; 10051306233Shselasky 10052306233Shselasky u8 perst_handler[0x20]; 10053306233Shselasky 10054306233Shselasky u8 times_in_l1[0x20]; 10055306233Shselasky 10056306233Shselasky u8 times_in_l23[0x20]; 10057306233Shselasky 10058306233Shselasky u8 dl_down[0x20]; 10059306233Shselasky 10060306233Shselasky u8 config_cycle1usec[0x20]; 10061306233Shselasky 10062306233Shselasky u8 config_cycle2to7usec[0x20]; 10063306233Shselasky 10064306233Shselasky u8 config_cycle8to15usec[0x20]; 10065306233Shselasky 10066306233Shselasky u8 config_cycle16to63usec[0x20]; 10067306233Shselasky 10068306233Shselasky u8 config_cycle64usec[0x20]; 10069306233Shselasky 10070306233Shselasky u8 correctable_err_msg_sent[0x20]; 10071306233Shselasky 10072306233Shselasky u8 non_fatal_err_msg_sent[0x20]; 10073306233Shselasky 10074306233Shselasky u8 fatal_err_msg_sent[0x20]; 10075306233Shselasky 10076347863Shselasky u8 reserved_at_2e0[0x4e0]; 10077306233Shselasky}; 10078306233Shselasky 10079347863Shselaskystruct mlx5_ifc_pcie_timers_states_ext_bits { 10080347863Shselasky u8 reserved_at_0[0x40]; 10081306233Shselasky 10082347863Shselasky u8 time_to_boot_image_start[0x20]; 10083306233Shselasky 10084347863Shselasky u8 time_to_link_image[0x20]; 10085306233Shselasky 10086347863Shselasky u8 calibration_time[0x20]; 10087306233Shselasky 10088347863Shselasky u8 time_to_first_perst[0x20]; 10089306233Shselasky 10090347863Shselasky u8 time_to_detect_state[0x20]; 10091306233Shselasky 10092347863Shselasky u8 time_to_l0[0x20]; 10093306233Shselasky 10094347863Shselasky u8 time_to_crs_en[0x20]; 10095306233Shselasky 10096347863Shselasky u8 time_to_plastic_image_start[0x20]; 10097306233Shselasky 10098347863Shselasky u8 time_to_iron_image_start[0x20]; 10099306233Shselasky 10100347863Shselasky u8 perst_handler[0x20]; 10101306233Shselasky 10102347863Shselasky u8 times_in_l1[0x20]; 10103306233Shselasky 10104347863Shselasky u8 times_in_l23[0x20]; 10105306233Shselasky 10106347863Shselasky u8 dl_down[0x20]; 10107306233Shselasky 10108347863Shselasky u8 config_cycle1usec[0x20]; 10109306233Shselasky 10110347863Shselasky u8 config_cycle2to7usec[0x20]; 10111306233Shselasky 10112347863Shselasky u8 config_cycle8to15usec[0x20]; 10113306233Shselasky 10114347863Shselasky u8 config_cycle16to63usec[0x20]; 10115306233Shselasky 10116347863Shselasky u8 config_cycle64usec[0x20]; 10117347863Shselasky 10118347863Shselasky u8 correctable_err_msg_sent[0x20]; 10119347863Shselasky 10120347863Shselasky u8 non_fatal_err_msg_sent[0x20]; 10121347863Shselasky 10122347863Shselasky u8 fatal_err_msg_sent[0x20]; 10123347863Shselasky 10124347863Shselasky u8 reserved_at_2e0[0x4e0]; 10125306233Shselasky}; 10126306233Shselasky 10127347863Shselaskyunion mlx5_ifc_mpcnt_reg_counter_set_auto_bits { 10128347863Shselasky struct mlx5_ifc_pcie_perf_counters_bits pcie_perf_counters; 10129347863Shselasky struct mlx5_ifc_pcie_lanes_counters_bits pcie_lanes_counters; 10130347863Shselasky struct mlx5_ifc_pcie_timers_states_bits pcie_timers_states; 10131347863Shselasky u8 reserved_at_0[0x7c0]; 10132306233Shselasky}; 10133306233Shselasky 10134347863Shselaskyunion mlx5_ifc_mpcnt_reg_counter_set_auto_ext_bits { 10135347863Shselasky struct mlx5_ifc_pcie_perf_counters_ext_bits pcie_perf_counters_ext; 10136347863Shselasky struct mlx5_ifc_pcie_lanes_counters_ext_bits pcie_lanes_counters_ext; 10137347863Shselasky struct mlx5_ifc_pcie_timers_states_ext_bits pcie_timers_states_ext; 10138347863Shselasky u8 reserved_at_0[0x7c0]; 10139347863Shselasky}; 10140347863Shselasky 10141306233Shselaskystruct mlx5_ifc_mpcnt_reg_bits { 10142347863Shselasky u8 reserved_at_0[0x2]; 10143347863Shselasky u8 depth[0x6]; 10144306233Shselasky u8 pcie_index[0x8]; 10145347863Shselasky u8 node[0x8]; 10146347863Shselasky u8 reserved_at_18[0x2]; 10147306233Shselasky u8 grp[0x6]; 10148306233Shselasky 10149306233Shselasky u8 clr[0x1]; 10150347863Shselasky u8 reserved_at_21[0x1f]; 10151306233Shselasky 10152347863Shselasky union mlx5_ifc_mpcnt_reg_counter_set_auto_bits counter_set; 10153306233Shselasky}; 10154306233Shselasky 10155347863Shselaskystruct mlx5_ifc_mpcnt_reg_ext_bits { 10156347863Shselasky u8 reserved_at_0[0x2]; 10157347863Shselasky u8 depth[0x6]; 10158347863Shselasky u8 pcie_index[0x8]; 10159347863Shselasky u8 node[0x8]; 10160347863Shselasky u8 reserved_at_18[0x2]; 10161347863Shselasky u8 grp[0x6]; 10162347863Shselasky 10163347863Shselasky u8 clr[0x1]; 10164347863Shselasky u8 reserved_at_21[0x1f]; 10165347863Shselasky 10166347863Shselasky union mlx5_ifc_mpcnt_reg_counter_set_auto_ext_bits counter_set; 10167347863Shselasky}; 10168347863Shselasky 10169365410Skibstruct mlx5_ifc_monitor_opcodes_layout_bits { 10170365410Skib u8 reserved_at_0[0x10]; 10171365410Skib u8 monitor_opcode[0x10]; 10172365410Skib}; 10173365410Skib 10174365410Skibunion mlx5_ifc_pddr_status_opcode_bits { 10175365410Skib struct mlx5_ifc_monitor_opcodes_layout_bits monitor_opcodes; 10176365410Skib u8 reserved_at_0[0x20]; 10177365410Skib}; 10178365410Skib 10179365410Skibstruct mlx5_ifc_troubleshooting_info_page_layout_bits { 10180365410Skib u8 reserved_at_0[0x10]; 10181365410Skib u8 group_opcode[0x10]; 10182365410Skib 10183365410Skib union mlx5_ifc_pddr_status_opcode_bits status_opcode; 10184365410Skib 10185365410Skib u8 user_feedback_data[0x10]; 10186365410Skib u8 user_feedback_index[0x10]; 10187365410Skib 10188365410Skib u8 status_message[0x760]; 10189365410Skib}; 10190365410Skib 10191365410Skibunion mlx5_ifc_pddr_page_data_bits { 10192365410Skib struct mlx5_ifc_troubleshooting_info_page_layout_bits troubleshooting_info_page; 10193365410Skib struct mlx5_ifc_pddr_module_info_bits pddr_module_info; 10194365410Skib u8 reserved_at_0[0x7c0]; 10195365410Skib}; 10196365410Skib 10197365410Skibstruct mlx5_ifc_pddr_reg_bits { 10198365410Skib u8 reserved_at_0[0x8]; 10199365410Skib u8 local_port[0x8]; 10200365410Skib u8 pnat[0x2]; 10201365410Skib u8 reserved_at_12[0xe]; 10202365410Skib 10203365410Skib u8 reserved_at_20[0x18]; 10204365410Skib u8 page_select[0x8]; 10205365410Skib 10206365410Skib union mlx5_ifc_pddr_page_data_bits page_data; 10207365410Skib}; 10208365410Skib 10209347862Shselaskyenum { 10210347862Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MPEIN = 0x9050, 10211347862Shselasky MLX5_MPEIN_PWR_STATUS_INVALID = 0, 10212347862Shselasky MLX5_MPEIN_PWR_STATUS_SUFFICIENT = 1, 10213347862Shselasky MLX5_MPEIN_PWR_STATUS_INSUFFICIENT = 2, 10214347862Shselasky}; 10215347862Shselasky 10216347862Shselaskystruct mlx5_ifc_mpein_reg_bits { 10217347862Shselasky u8 reserved_at_0[0x2]; 10218347862Shselasky u8 depth[0x6]; 10219347862Shselasky u8 pcie_index[0x8]; 10220347862Shselasky u8 node[0x8]; 10221347862Shselasky u8 reserved_at_18[0x8]; 10222347862Shselasky 10223347862Shselasky u8 capability_mask[0x20]; 10224347862Shselasky 10225347862Shselasky u8 reserved_at_40[0x8]; 10226347862Shselasky u8 link_width_enabled[0x8]; 10227347862Shselasky u8 link_speed_enabled[0x10]; 10228347862Shselasky 10229347862Shselasky u8 lane0_physical_position[0x8]; 10230347862Shselasky u8 link_width_active[0x8]; 10231347862Shselasky u8 link_speed_active[0x10]; 10232347862Shselasky 10233347862Shselasky u8 num_of_pfs[0x10]; 10234347862Shselasky u8 num_of_vfs[0x10]; 10235347862Shselasky 10236347862Shselasky u8 bdf0[0x10]; 10237347862Shselasky u8 reserved_at_b0[0x10]; 10238347862Shselasky 10239347862Shselasky u8 max_read_request_size[0x4]; 10240347862Shselasky u8 max_payload_size[0x4]; 10241347862Shselasky u8 reserved_at_c8[0x5]; 10242347862Shselasky u8 pwr_status[0x3]; 10243347862Shselasky u8 port_type[0x4]; 10244347862Shselasky u8 reserved_at_d4[0xb]; 10245347862Shselasky u8 lane_reversal[0x1]; 10246347862Shselasky 10247347862Shselasky u8 reserved_at_e0[0x14]; 10248347862Shselasky u8 pci_power[0xc]; 10249347862Shselasky 10250347862Shselasky u8 reserved_at_100[0x20]; 10251347862Shselasky 10252347862Shselasky u8 device_status[0x10]; 10253347862Shselasky u8 port_state[0x8]; 10254347862Shselasky u8 reserved_at_138[0x8]; 10255347862Shselasky 10256347862Shselasky u8 reserved_at_140[0x10]; 10257347862Shselasky u8 receiver_detect_result[0x10]; 10258347862Shselasky 10259347862Shselasky u8 reserved_at_160[0x20]; 10260347862Shselasky}; 10261347862Shselasky 10262347862Shselaskystruct mlx5_ifc_mpein_reg_ext_bits { 10263347862Shselasky u8 reserved_at_0[0x2]; 10264347862Shselasky u8 depth[0x6]; 10265347862Shselasky u8 pcie_index[0x8]; 10266347862Shselasky u8 node[0x8]; 10267347862Shselasky u8 reserved_at_18[0x8]; 10268347862Shselasky 10269347862Shselasky u8 reserved_at_20[0x20]; 10270347862Shselasky 10271347862Shselasky u8 reserved_at_40[0x8]; 10272347862Shselasky u8 link_width_enabled[0x8]; 10273347862Shselasky u8 link_speed_enabled[0x10]; 10274347862Shselasky 10275347862Shselasky u8 lane0_physical_position[0x8]; 10276347862Shselasky u8 link_width_active[0x8]; 10277347862Shselasky u8 link_speed_active[0x10]; 10278347862Shselasky 10279347862Shselasky u8 num_of_pfs[0x10]; 10280347862Shselasky u8 num_of_vfs[0x10]; 10281347862Shselasky 10282347862Shselasky u8 bdf0[0x10]; 10283347862Shselasky u8 reserved_at_b0[0x10]; 10284347862Shselasky 10285347862Shselasky u8 max_read_request_size[0x4]; 10286347862Shselasky u8 max_payload_size[0x4]; 10287347862Shselasky u8 reserved_at_c8[0x5]; 10288347862Shselasky u8 pwr_status[0x3]; 10289347862Shselasky u8 port_type[0x4]; 10290347862Shselasky u8 reserved_at_d4[0xb]; 10291347862Shselasky u8 lane_reversal[0x1]; 10292347862Shselasky}; 10293347862Shselasky 10294347824Shselaskystruct mlx5_ifc_mcqi_cap_bits { 10295347824Shselasky u8 supported_info_bitmask[0x20]; 10296347824Shselasky 10297347824Shselasky u8 component_size[0x20]; 10298347824Shselasky 10299347824Shselasky u8 max_component_size[0x20]; 10300347824Shselasky 10301347824Shselasky u8 log_mcda_word_size[0x4]; 10302347824Shselasky u8 reserved_at_64[0xc]; 10303347824Shselasky u8 mcda_max_write_size[0x10]; 10304347824Shselasky 10305347824Shselasky u8 rd_en[0x1]; 10306347824Shselasky u8 reserved_at_81[0x1]; 10307347824Shselasky u8 match_chip_id[0x1]; 10308347824Shselasky u8 match_psid[0x1]; 10309347824Shselasky u8 check_user_timestamp[0x1]; 10310347824Shselasky u8 match_base_guid_mac[0x1]; 10311347824Shselasky u8 reserved_at_86[0x1a]; 10312347824Shselasky}; 10313347824Shselasky 10314347824Shselaskystruct mlx5_ifc_mcqi_reg_bits { 10315347824Shselasky u8 read_pending_component[0x1]; 10316347824Shselasky u8 reserved_at_1[0xf]; 10317347824Shselasky u8 component_index[0x10]; 10318347824Shselasky 10319347824Shselasky u8 reserved_at_20[0x20]; 10320347824Shselasky 10321347824Shselasky u8 reserved_at_40[0x1b]; 10322347824Shselasky u8 info_type[0x5]; 10323347824Shselasky 10324347824Shselasky u8 info_size[0x20]; 10325347824Shselasky 10326347824Shselasky u8 offset[0x20]; 10327347824Shselasky 10328347824Shselasky u8 reserved_at_a0[0x10]; 10329347824Shselasky u8 data_size[0x10]; 10330347824Shselasky 10331347824Shselasky u8 data[0][0x20]; 10332347824Shselasky}; 10333347824Shselasky 10334347824Shselaskystruct mlx5_ifc_mcc_reg_bits { 10335347824Shselasky u8 reserved_at_0[0x4]; 10336347824Shselasky u8 time_elapsed_since_last_cmd[0xc]; 10337347824Shselasky u8 reserved_at_10[0x8]; 10338347824Shselasky u8 instruction[0x8]; 10339347824Shselasky 10340347824Shselasky u8 reserved_at_20[0x10]; 10341347824Shselasky u8 component_index[0x10]; 10342347824Shselasky 10343347824Shselasky u8 reserved_at_40[0x8]; 10344347824Shselasky u8 update_handle[0x18]; 10345347824Shselasky 10346347824Shselasky u8 handle_owner_type[0x4]; 10347347824Shselasky u8 handle_owner_host_id[0x4]; 10348347824Shselasky u8 reserved_at_68[0x1]; 10349347824Shselasky u8 control_progress[0x7]; 10350347824Shselasky u8 error_code[0x8]; 10351347824Shselasky u8 reserved_at_78[0x4]; 10352347824Shselasky u8 control_state[0x4]; 10353347824Shselasky 10354347824Shselasky u8 component_size[0x20]; 10355347824Shselasky 10356347824Shselasky u8 reserved_at_a0[0x60]; 10357347824Shselasky}; 10358347824Shselasky 10359347824Shselaskystruct mlx5_ifc_mcda_reg_bits { 10360347824Shselasky u8 reserved_at_0[0x8]; 10361347824Shselasky u8 update_handle[0x18]; 10362347824Shselasky 10363347824Shselasky u8 offset[0x20]; 10364347824Shselasky 10365347824Shselasky u8 reserved_at_40[0x10]; 10366347824Shselasky u8 size[0x10]; 10367347824Shselasky 10368347824Shselasky u8 reserved_at_60[0x20]; 10369347824Shselasky 10370347824Shselasky u8 data[0][0x20]; 10371347824Shselasky}; 10372347824Shselasky 10373290650Shselaskyunion mlx5_ifc_ports_control_registers_document_bits { 10374290650Shselasky struct mlx5_ifc_ib_portcntrs_attribute_grp_data_bits ib_portcntrs_attribute_grp_data; 10375290650Shselasky struct mlx5_ifc_bufferx_reg_bits bufferx_reg; 10376290650Shselasky struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout; 10377290650Shselasky struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout; 10378290650Shselasky struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout; 10379290650Shselasky struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout; 10380308678Shselasky struct mlx5_ifc_eth_discard_cntrs_grp_bits eth_discard_cntrs_grp; 10381290650Shselasky struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout; 10382290650Shselasky struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout; 10383290650Shselasky struct mlx5_ifc_eth_per_traffic_class_cong_layout_bits eth_per_traffic_class_cong_layout; 10384290650Shselasky struct mlx5_ifc_eth_per_traffic_class_layout_bits eth_per_traffic_class_layout; 10385290650Shselasky struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping; 10386290650Shselasky struct mlx5_ifc_link_level_retrans_cntr_grp_date_bits link_level_retrans_cntr_grp_date; 10387290650Shselasky struct mlx5_ifc_pamp_reg_bits pamp_reg; 10388290650Shselasky struct mlx5_ifc_paos_reg_bits paos_reg; 10389290650Shselasky struct mlx5_ifc_pbmc_reg_bits pbmc_reg; 10390290650Shselasky struct mlx5_ifc_pcap_reg_bits pcap_reg; 10391290650Shselasky struct mlx5_ifc_peir_reg_bits peir_reg; 10392290650Shselasky struct mlx5_ifc_pelc_reg_bits pelc_reg; 10393290650Shselasky struct mlx5_ifc_pfcc_reg_bits pfcc_reg; 10394290650Shselasky struct mlx5_ifc_phbr_binding_reg_bits phbr_binding_reg; 10395290650Shselasky struct mlx5_ifc_phbr_for_port_tclass_reg_bits phbr_for_port_tclass_reg; 10396290650Shselasky struct mlx5_ifc_phbr_for_prio_reg_bits phbr_for_prio_reg; 10397290650Shselasky struct mlx5_ifc_phrr_reg_bits phrr_reg; 10398290650Shselasky struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs; 10399290650Shselasky struct mlx5_ifc_pifr_reg_bits pifr_reg; 10400290650Shselasky struct mlx5_ifc_pipg_reg_bits pipg_reg; 10401290650Shselasky struct mlx5_ifc_plbf_reg_bits plbf_reg; 10402290650Shselasky struct mlx5_ifc_plib_reg_bits plib_reg; 10403290650Shselasky struct mlx5_ifc_pll_status_data_bits pll_status_data; 10404290650Shselasky struct mlx5_ifc_plpc_reg_bits plpc_reg; 10405290650Shselasky struct mlx5_ifc_pmaos_reg_bits pmaos_reg; 10406290650Shselasky struct mlx5_ifc_pmlp_reg_bits pmlp_reg; 10407290650Shselasky struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg; 10408290650Shselasky struct mlx5_ifc_pmpc_reg_bits pmpc_reg; 10409290650Shselasky struct mlx5_ifc_pmpe_reg_bits pmpe_reg; 10410290650Shselasky struct mlx5_ifc_pmpr_reg_bits pmpr_reg; 10411290650Shselasky struct mlx5_ifc_pmtu_reg_bits pmtu_reg; 10412290650Shselasky struct mlx5_ifc_ppad_reg_bits ppad_reg; 10413290650Shselasky struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg; 10414290650Shselasky struct mlx5_ifc_ppll_reg_bits ppll_reg; 10415290650Shselasky struct mlx5_ifc_pplm_reg_bits pplm_reg; 10416290650Shselasky struct mlx5_ifc_pplr_reg_bits pplr_reg; 10417290650Shselasky struct mlx5_ifc_ppsc_reg_bits ppsc_reg; 10418290650Shselasky struct mlx5_ifc_pspa_reg_bits pspa_reg; 10419290650Shselasky struct mlx5_ifc_ptas_reg_bits ptas_reg; 10420290650Shselasky struct mlx5_ifc_ptys_reg_bits ptys_reg; 10421290650Shselasky struct mlx5_ifc_pude_reg_bits pude_reg; 10422290650Shselasky struct mlx5_ifc_pvlc_reg_bits pvlc_reg; 10423290650Shselasky struct mlx5_ifc_slrg_reg_bits slrg_reg; 10424290650Shselasky struct mlx5_ifc_slrp_reg_bits slrp_reg; 10425290650Shselasky struct mlx5_ifc_sltp_reg_bits sltp_reg; 10426290650Shselasky u8 reserved_0[0x7880]; 10427290650Shselasky}; 10428290650Shselasky 10429290650Shselaskyunion mlx5_ifc_debug_enhancements_document_bits { 10430290650Shselasky struct mlx5_ifc_health_buffer_bits health_buffer; 10431290650Shselasky u8 reserved_0[0x200]; 10432290650Shselasky}; 10433290650Shselasky 10434290650Shselaskyunion mlx5_ifc_no_dram_nic_document_bits { 10435290650Shselasky struct mlx5_ifc_nodnic_config_reg_bits nodnic_config_reg; 10436290650Shselasky struct mlx5_ifc_nodnic_cq_arming_word_bits nodnic_cq_arming_word; 10437290650Shselasky struct mlx5_ifc_nodnic_event_word_bits nodnic_event_word; 10438290650Shselasky struct mlx5_ifc_nodnic_gid_filters_bits nodnic_gid_filters; 10439290650Shselasky struct mlx5_ifc_nodnic_mac_filters_bits nodnic_mac_filters; 10440290650Shselasky struct mlx5_ifc_nodnic_port_config_reg_bits nodnic_port_config_reg; 10441290650Shselasky struct mlx5_ifc_nodnic_ring_config_reg_bits nodnic_ring_config_reg; 10442290650Shselasky struct mlx5_ifc_nodnic_ring_doorbell_bits nodnic_ring_doorbell; 10443290650Shselasky u8 reserved_0[0x3160]; 10444290650Shselasky}; 10445290650Shselasky 10446290650Shselaskyunion mlx5_ifc_uplink_pci_interface_document_bits { 10447290650Shselasky struct mlx5_ifc_initial_seg_bits initial_seg; 10448290650Shselasky struct mlx5_ifc_vendor_specific_cap_bits vendor_specific_cap; 10449290650Shselasky u8 reserved_0[0x20120]; 10450290650Shselasky}; 10451290650Shselasky 10452337098Shselaskystruct mlx5_ifc_qpdpm_dscp_reg_bits { 10453337098Shselasky u8 e[0x1]; 10454337098Shselasky u8 reserved_at_01[0x0b]; 10455337098Shselasky u8 prio[0x04]; 10456337098Shselasky}; 10457290650Shselasky 10458337098Shselaskystruct mlx5_ifc_qpdpm_reg_bits { 10459337098Shselasky u8 reserved_at_0[0x8]; 10460337098Shselasky u8 local_port[0x8]; 10461337098Shselasky u8 reserved_at_10[0x10]; 10462337098Shselasky struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64]; 10463337098Shselasky}; 10464337098Shselasky 10465337098Shselaskystruct mlx5_ifc_qpts_reg_bits { 10466337098Shselasky u8 reserved_at_0[0x8]; 10467337098Shselasky u8 local_port[0x8]; 10468337098Shselasky u8 reserved_at_10[0x2d]; 10469337098Shselasky u8 trust_state[0x3]; 10470337098Shselasky}; 10471337098Shselasky 10472347868Shselaskystruct mlx5_ifc_mfrl_reg_bits { 10473347868Shselasky u8 reserved_at_0[0x38]; 10474347868Shselasky u8 reset_level[0x8]; 10475347868Shselasky}; 10476347868Shselasky 10477361171Shselaskyenum { 10478361171Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTCAP = 0x9009, 10479361171Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTECR = 0x9109, 10480361171Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTMP = 0x900a, 10481361171Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTWE = 0x900b, 10482361171Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTBR = 0x900f, 10483361171Shselasky MLX5_ACCESS_REG_SUMMARY_CTRL_ID_MTEWE = 0x910b, 10484361171Shselasky MLX5_MAX_TEMPERATURE = 16, 10485361171Shselasky}; 10486361171Shselasky 10487361171Shselaskystruct mlx5_ifc_mtbr_temp_record_bits { 10488361171Shselasky u8 max_temperature[0x10]; 10489361171Shselasky u8 temperature[0x10]; 10490361171Shselasky}; 10491361171Shselasky 10492361171Shselaskystruct mlx5_ifc_mtbr_reg_bits { 10493361171Shselasky u8 reserved_at_0[0x14]; 10494361171Shselasky u8 base_sensor_index[0xc]; 10495361171Shselasky 10496361171Shselasky u8 reserved_at_20[0x18]; 10497361171Shselasky u8 num_rec[0x8]; 10498361171Shselasky 10499361171Shselasky u8 reserved_at_40[0x40]; 10500361171Shselasky 10501361171Shselasky struct mlx5_ifc_mtbr_temp_record_bits temperature_record[MLX5_MAX_TEMPERATURE]; 10502361171Shselasky}; 10503361171Shselasky 10504361171Shselaskystruct mlx5_ifc_mtbr_reg_ext_bits { 10505361171Shselasky u8 reserved_at_0[0x14]; 10506361171Shselasky u8 base_sensor_index[0xc]; 10507361171Shselasky 10508361171Shselasky u8 reserved_at_20[0x18]; 10509361171Shselasky u8 num_rec[0x8]; 10510361171Shselasky 10511361171Shselasky u8 reserved_at_40[0x40]; 10512361171Shselasky 10513361171Shselasky struct mlx5_ifc_mtbr_temp_record_bits temperature_record[MLX5_MAX_TEMPERATURE]; 10514361171Shselasky}; 10515361171Shselasky 10516361171Shselaskystruct mlx5_ifc_mtcap_bits { 10517361171Shselasky u8 reserved_at_0[0x19]; 10518361171Shselasky u8 sensor_count[0x7]; 10519361171Shselasky 10520361171Shselasky u8 reserved_at_20[0x19]; 10521361171Shselasky u8 internal_sensor_count[0x7]; 10522361171Shselasky 10523361171Shselasky u8 sensor_map[0x40]; 10524361171Shselasky}; 10525361171Shselasky 10526361171Shselaskystruct mlx5_ifc_mtcap_ext_bits { 10527361171Shselasky u8 reserved_at_0[0x19]; 10528361171Shselasky u8 sensor_count[0x7]; 10529361171Shselasky 10530361171Shselasky u8 reserved_at_20[0x20]; 10531361171Shselasky 10532361171Shselasky u8 sensor_map[0x40]; 10533361171Shselasky}; 10534361171Shselasky 10535361171Shselaskystruct mlx5_ifc_mtecr_bits { 10536361171Shselasky u8 reserved_at_0[0x4]; 10537361171Shselasky u8 last_sensor[0xc]; 10538361171Shselasky u8 reserved_at_10[0x4]; 10539361171Shselasky u8 sensor_count[0xc]; 10540361171Shselasky 10541361171Shselasky u8 reserved_at_20[0x19]; 10542361171Shselasky u8 internal_sensor_count[0x7]; 10543361171Shselasky 10544361171Shselasky u8 sensor_map_0[0x20]; 10545361171Shselasky 10546361171Shselasky u8 reserved_at_60[0x2a0]; 10547361171Shselasky}; 10548361171Shselasky 10549361171Shselaskystruct mlx5_ifc_mtecr_ext_bits { 10550361171Shselasky u8 reserved_at_0[0x4]; 10551361171Shselasky u8 last_sensor[0xc]; 10552361171Shselasky u8 reserved_at_10[0x4]; 10553361171Shselasky u8 sensor_count[0xc]; 10554361171Shselasky 10555361171Shselasky u8 reserved_at_20[0x20]; 10556361171Shselasky 10557361171Shselasky u8 sensor_map_0[0x20]; 10558361171Shselasky 10559361171Shselasky u8 reserved_at_60[0x2a0]; 10560361171Shselasky}; 10561361171Shselasky 10562361171Shselaskystruct mlx5_ifc_mtewe_bits { 10563361171Shselasky u8 reserved_at_0[0x4]; 10564361171Shselasky u8 last_sensor[0xc]; 10565361171Shselasky u8 reserved_at_10[0x4]; 10566361171Shselasky u8 sensor_count[0xc]; 10567361171Shselasky 10568361171Shselasky u8 sensor_warning_0[0x20]; 10569361171Shselasky 10570361171Shselasky u8 reserved_at_40[0x2a0]; 10571361171Shselasky}; 10572361171Shselasky 10573361171Shselaskystruct mlx5_ifc_mtewe_ext_bits { 10574361171Shselasky u8 reserved_at_0[0x4]; 10575361171Shselasky u8 last_sensor[0xc]; 10576361171Shselasky u8 reserved_at_10[0x4]; 10577361171Shselasky u8 sensor_count[0xc]; 10578361171Shselasky 10579361171Shselasky u8 sensor_warning_0[0x20]; 10580361171Shselasky 10581361171Shselasky u8 reserved_at_40[0x2a0]; 10582361171Shselasky}; 10583361171Shselasky 10584361171Shselaskystruct mlx5_ifc_mtmp_bits { 10585361171Shselasky u8 reserved_at_0[0x14]; 10586361171Shselasky u8 sensor_index[0xc]; 10587361171Shselasky 10588361171Shselasky u8 reserved_at_20[0x10]; 10589361171Shselasky u8 temperature[0x10]; 10590361171Shselasky 10591361171Shselasky u8 mte[0x1]; 10592361171Shselasky u8 mtr[0x1]; 10593361171Shselasky u8 reserved_at_42[0xe]; 10594361171Shselasky u8 max_temperature[0x10]; 10595361171Shselasky 10596361171Shselasky u8 tee[0x2]; 10597361171Shselasky u8 reserved_at_62[0xe]; 10598361171Shselasky u8 temperature_threshold_hi[0x10]; 10599361171Shselasky 10600361171Shselasky u8 reserved_at_80[0x10]; 10601361171Shselasky u8 temperature_threshold_lo[0x10]; 10602361171Shselasky 10603361171Shselasky u8 reserved_at_a0[0x20]; 10604361171Shselasky 10605361171Shselasky u8 sensor_name_hi[0x20]; 10606361171Shselasky 10607361171Shselasky u8 sensor_name_lo[0x20]; 10608361171Shselasky}; 10609361171Shselasky 10610361171Shselaskystruct mlx5_ifc_mtmp_ext_bits { 10611361171Shselasky u8 reserved_at_0[0x14]; 10612361171Shselasky u8 sensor_index[0xc]; 10613361171Shselasky 10614361171Shselasky u8 reserved_at_20[0x10]; 10615361171Shselasky u8 temperature[0x10]; 10616361171Shselasky 10617361171Shselasky u8 mte[0x1]; 10618361171Shselasky u8 mtr[0x1]; 10619361171Shselasky u8 reserved_at_42[0xe]; 10620361171Shselasky u8 max_temperature[0x10]; 10621361171Shselasky 10622361171Shselasky u8 tee[0x2]; 10623361171Shselasky u8 reserved_at_62[0xe]; 10624361171Shselasky u8 temperature_threshold_hi[0x10]; 10625361171Shselasky 10626361171Shselasky u8 reserved_at_80[0x10]; 10627361171Shselasky u8 temperature_threshold_lo[0x10]; 10628361171Shselasky 10629361171Shselasky u8 reserved_at_a0[0x20]; 10630361171Shselasky 10631361171Shselasky u8 sensor_name_hi[0x20]; 10632361171Shselasky 10633361171Shselasky u8 sensor_name_lo[0x20]; 10634361171Shselasky}; 10635361171Shselasky 10636290650Shselasky#endif /* MLX5_IFC_H */ 10637