Searched refs:sq_config (Results 1 - 8 of 8) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/radeon/
H A Devergreen_blit_kms.c283 u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2, sq_gpr_resource_mgmt_3; local
520 sq_config = 0;
522 sq_config = VC_ENABLE;
524 sq_config |= (EXPORT_SRC_C |
566 radeon_ring_write(ring, sq_config);
H A Dr600_blit_kms.c319 u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; local
446 sq_config = 0;
448 sq_config = VC_ENABLE;
450 sq_config |= (DX9_CONSTS |
486 radeon_ring_write(ring, sq_config);
H A Drv770.c385 u32 sq_config; local
686 sq_config = RREG32(SQ_CONFIG);
687 sq_config &= ~(PS_PRIO(3) |
691 sq_config |= (DX9_CONSTS |
700 sq_config &= ~VC_ENABLE;
702 WREG32(SQ_CONFIG, sq_config);
H A Dr600_cs.c55 u32 sq_config; member in struct:r600_cs_track
315 track->sq_config = DX9_CONSTS;
1109 track->sq_config = radeon_get_ib_value(p, idx);
2104 if (track->sq_config & DX9_CONSTS) {
H A Dr600.c1533 u32 sq_config; local
1746 sq_config = RREG32(SQ_CONFIG);
1747 sq_config &= ~(PS_PRIO(3) |
1751 sq_config |= (DX9_CONSTS |
1777 sq_config &= ~VC_ENABLE;
1823 WREG32(SQ_CONFIG, sq_config);
H A Devergreen.c1814 u32 sq_config; local
2223 sq_config = RREG32(SQ_CONFIG);
2224 sq_config &= ~(PS_PRIO(3) |
2228 sq_config |= (VC_ENABLE |
2242 sq_config &= ~VC_ENABLE;
2284 WREG32(SQ_CONFIG, sq_config);
/freebsd-11-stable/sys/dev/drm/
H A Dr600_cp.c678 u32 sq_config; local
896 sq_config = RADEON_READ(R600_SQ_CONFIG);
897 sq_config &= ~(R600_PS_PRIO(3) |
901 sq_config |= (R600_DX9_CONSTS |
927 sq_config &= ~R600_VC_ENABLE;
973 RADEON_WRITE(R600_SQ_CONFIG, sq_config);
1223 u32 sq_config; local
1484 sq_config = RADEON_READ(R600_SQ_CONFIG);
1485 sq_config &= ~(R600_PS_PRIO(3) |
1489 sq_config |
[all...]
H A Dr600_blit.c1470 u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; local
1596 sq_config = 0;
1598 sq_config = R600_VC_ENABLE;
1600 sq_config |= (R600_DX9_CONSTS |
1637 OUT_RING(sq_config);

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