Searched refs:nand (Results 1 - 25 of 43) sorted by relevance

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/freebsd-11-stable/sys/modules/nand/
H A DMakefile1 # $FreeBSD: stable/11/sys/modules/nand/Makefile 319182 2017-05-30 04:11:12Z ngie $
3 .PATH: ${SRCTOP}/sys/dev/nand
5 KMOD = nand
6 SRCS= nand.c nand_bbt.c nand_cdev.c nand_generic.c nand_geom.c \
/freebsd-11-stable/sys/dev/nand/
H A Dnandsim_log.h32 #include <dev/nand/nandsim_chip.h>
H A Dnand_generic.c46 #include <dev/nand/nand.h>
47 #include <dev/nand/nandbus.h>
226 chip->nand = device_get_softc(nfc);
407 send_read_page(device_t nand, uint8_t start_command, uint8_t end_command, argument
410 device_t nandbus = device_get_parent(nand);
415 if (nand_send_address(nand, row, column, -1))
428 generic_read_page(device_t nand, uint32_t page, void *buf, uint32_t len, argument
436 nand_debug(NDBG_GEN,"%p raw read page %x[%x] at %x", nand, page, len, offset);
437 chip = device_get_softc(nand);
463 generic_read_oob(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
498 send_start_program_page(device_t nand, uint32_t row, uint32_t column) argument
525 generic_program_page(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
566 generic_program_page_intlv(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
606 generic_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
644 send_erase_block(device_t nand, uint32_t row, uint8_t second_command) argument
664 generic_erase_block(device_t nand, uint32_t block) argument
700 generic_erase_block_intlv(device_t nand, uint32_t block) argument
777 send_small_read_page(device_t nand, uint8_t start_command, uint32_t row, uint32_t column) argument
796 small_read_page(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
836 small_read_oob(device_t nand, uint32_t page, void *buf, uint32_t len, uint32_t offset) argument
870 small_program_page(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
914 small_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len, uint32_t offset) argument
953 nand_send_address(device_t nand, int32_t row, int32_t col, int8_t id) argument
[all...]
H A Dnandsim_chip.h34 #include <dev/nand/nand.h>
35 #include <dev/nand/nandsim.h>
36 #include <dev/nand/nandsim_swap.h>
H A Dnand_id.c33 #include <dev/nand/nand.h>
H A Dnand.h44 #include <dev/nand/nand_dev.h>
144 /* nand debug levels */
312 struct nand_softc *nand; member in struct:nand_chip
350 int nand_read_parameter(struct nand_softc *nand, struct onfi_params *param);
351 int nand_synch_reset(struct nand_softc *nand);
371 int nand_write_ecc(struct nand_softc *nand, uint32_t page, uint8_t *data);
372 int nand_read_ecc(struct nand_softc *nand, uint32_t page, uint8_t *data);
379 void nand_init(struct nand_softc *nand, device_t dev, int ecc_mode,
381 void nand_detach(struct nand_softc *nand);
H A Dnand.c42 #include <dev/nand/nand.h>
43 #include <dev/nand/nandbus.h>
44 #include <dev/nand/nand_ecc_pos.h>
90 nand_init(struct nand_softc *nand, device_t dev, int ecc_mode, argument
94 nand->ecc.eccmode = ecc_mode;
95 nand->chip_cdev_name = cdev_name;
98 nand->ecc.eccbytes = SOFTECC_BYTES;
99 nand->ecc.eccsize = SOFTECC_SIZE;
101 nand
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H A Dnfc_at91.c31 * set up the EBI and SMC registers appropriately for whatever type of nand part
55 #include <dev/nand/nand.h>
56 #include <dev/nand/nandbus.h>
59 #include <dev/nand/nfc_at91.h>
120 if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-nand"))
254 * at higher layers, all the nand code uses status commands.
282 "nand",
H A Dnandsim_ctrl.c44 #include <dev/nand/nand.h>
45 #include <dev/nand/nandbus.h>
46 #include <dev/nand/nandsim.h>
47 #include <dev/nand/nandsim_log.h>
48 #include <dev/nand/nandsim_chip.h>
H A Dnfc_mv.c53 #include <dev/nand/nand.h>
54 #include <dev/nand/nandbus.h>
95 "nand",
H A Dnfc_rb.c30 __FBSDID("$FreeBSD: stable/11/sys/dev/nand/nfc_rb.c 318158 2017-05-10 21:42:12Z marius $");
48 #include <dev/nand/nand.h>
49 #include <dev/nand/nandbus.h>
95 "nand",
153 if (!device_type || strcmp(device_type, "rb,nand"))
H A Dnandsim.c30 __FBSDID("$FreeBSD: stable/11/sys/dev/nand/nandsim.c 349658 2019-07-03 17:35:23Z emaste $");
41 #include <dev/nand/nand.h>
42 #include <dev/nand/nandsim.h>
43 #include <dev/nand/nandsim_chip.h>
44 #include <dev/nand/nandsim_log.h>
45 #include <dev/nand/nandsim_swap.h>
667 MODULE_DEPEND(nandsim, nand, 1, 1, 1);
H A Dnandbus.c42 #include <dev/nand/nand.h>
43 #include <dev/nand/nandbus.h>
118 DRIVER_MODULE(nandbus, nand, nandbus_driver, nandbus_devclass, 0, 0);
180 /* Check each possible CS for existing nand devices */
H A Dnand_geom.c28 __FBSDID("$FreeBSD: stable/11/sys/dev/nand/nand_geom.c 312858 2017-01-27 03:44:50Z kan $");
40 #include <dev/nand/nand.h>
41 #include <dev/nand/nandbus.h>
42 #include <dev/nand/nand_dev.h>
396 "nand: Man:0x%02x Dev:0x%02x", chip->id.man_id, chip->id.dev_id);
432 taskqueue_start_threads(&chip->tq, 1, PI_DISK, "nand taskq");
H A Dnand_cdev.c28 __FBSDID("$FreeBSD: stable/11/sys/dev/nand/nand_cdev.c 350226 2019-07-22 20:33:19Z emaste $");
38 #include <dev/nand/nand.h>
39 #include <dev/nand/nandbus.h>
40 #include <dev/nand/nand_dev.h>
53 .d_name = "nand",
95 name = "nand";
/freebsd-11-stable/sys/modules/nandsim/
H A DMakefile3 .PATH: ${SRCTOP}/sys/dev/nand
/freebsd-11-stable/usr.sbin/nandtool/
H A Dnand_readoob.c39 #include <dev/nand/nand_dev.h>
H A Dnand_writeoob.c38 #include <dev/nand/nand_dev.h>
H A Dnand_info.c38 #include <dev/nand/nand_dev.h>
H A Dnand_erase.c38 #include <dev/nand/nand_dev.h>
H A Dnand_read.c38 #include <dev/nand/nand_dev.h>
H A Dnand_write.c38 #include <dev/nand/nand_dev.h>
/freebsd-11-stable/sys/arm/at91/
H A Dboard_hl201.c39 #include <dev/nand/nfc_at91.h>
H A Dboard_sam9260ek.c43 #include <dev/nand/nfc_at91.h>
/freebsd-11-stable/sys/contrib/octeon-sdk/
H A Dcvmx-ciu-defs.h3536 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_s
3546 uint64_t nand : 1;
3616 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn52xx
3628 uint64_t nand : 1;
3692 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn61xx
3700 uint64_t nand : 1;
3763 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn63xx
3771 uint64_t nand : 1;
3839 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cn66xx
3847 uint64_t nand
3912 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en1::cvmx_ciu_intx_en1_cnf71xx
3997 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_s
4050 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn52xx
4115 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn61xx
4188 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn63xx
4266 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cn66xx
4341 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1c::cvmx_ciu_intx_en1_w1c_cnf71xx
4427 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_s
4480 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn52xx
4545 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn61xx
4618 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn63xx
4696 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cn66xx
4771 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en1_w1s::cvmx_ciu_intx_en1_w1s_cnf71xx
5964 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_s
6024 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn52xx
6108 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn61xx
6179 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn63xx
6255 uint64_t nand : 1; /**< NAND Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cn66xx
6328 uint64_t nand : 1; /**< EMMC Flash Controller interrupt enable */ member in struct:cvmx_ciu_intx_en4_1::cvmx_ciu_intx_en4_1_cnf71xx
6413 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_s
6466 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn52xx
6531 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn61xx
6604 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn63xx
6682 uint64_t nand : 1; /**< Write 1 to clear NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cn66xx
6757 uint64_t nand : 1; /**< Write 1 to clear EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1c::cvmx_ciu_intx_en4_1_w1c_cnf71xx
6843 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_s
6896 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn52xx
6961 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn61xx
7034 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn63xx
7112 uint64_t nand : 1; /**< Write 1 to set NAND Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cn66xx
7187 uint64_t nand : 1; /**< Write 1 to set EMMC Flash Controller interrupt member in struct:cvmx_ciu_intx_en4_1_w1s::cvmx_ciu_intx_en4_1_w1s_cnf71xx
9174 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_s
9254 uint64_t nand : 1; /**< NAND Flash Controller */ member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn52xx
9354 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn61xx
9452 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn63xx
9560 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cn66xx
9654 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_int_sum1::cvmx_ciu_int_sum1_cnf71xx
11066 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_s
11172 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn61xx
11279 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cn66xx
11376 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_iox_int::cvmx_ciu_sum1_iox_int_cnf71xx
11496 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_s
11602 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn61xx
11709 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cn66xx
11806 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip2::cvmx_ciu_sum1_ppx_ip2_cnf71xx
11926 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_s
12032 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn61xx
12139 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cn66xx
12236 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip3::cvmx_ciu_sum1_ppx_ip3_cnf71xx
12356 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_s
12462 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn61xx
12569 uint64_t nand : 1; /**< NAND Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cn66xx
12666 uint64_t nand : 1; /**< EMMC Flash Controller interrupt member in struct:cvmx_ciu_sum1_ppx_ip4::cvmx_ciu_sum1_ppx_ip4_cnf71xx
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